[Mesa-dev] [PATCH] radeonsi: enable 32-bit denormals on VI+

[Samuel Pitoiset]

Only VI can do 32-bit denormals at full rate while previous
generations can do it only for 64-bit and 16-bit.

This fixes some dEQP tests with the highp type qualifier.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99343
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
---
 src/gallium/drivers/radeonsi/si_shader.c | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 5dfbd6603a..e9cb11883f 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -6361,8 +6361,10 @@ int si_compile_llvm(struct si_screen *sscreen,
 
 	si_shader_binary_read_config(binary, conf, 0);
 
-	/* Enable 64-bit and 16-bit denormals, because there is no performance
-	 * cost.
+	/* Enable denormals when there is no performance cost.
+	 *
+	 * Only VI can do 32-bit denormals at full rate while previous
+	 * generations can do it only for 64-bit and 16-bit.
 	 *
 	 * If denormals are enabled, all floating-point output modifiers are
 	 * ignored.
@@ -6373,7 +6375,10 @@ int si_compile_llvm(struct si_screen *sscreen,
 	 *   have to stop using those.
 	 * - SI & CI would be very slow.
 	 */
-	conf->float_mode |= V_00B028_FP_64_DENORMS;
+	if (sscreen->b.chip_class >= VI)
+		conf->float_mode |= V_00B028_FP_ALL_DENORMS;
+	else
+		conf->float_mode |= V_00B028_FP_64_DENORMS;
 
 	FREE(binary->config);
 	FREE(binary->global_symbol_offsets);
-- 
2.11.0