[Mesa-dev] [PATCH 14/22] i965/vec4: fix double_to_single() for IVB/VLV

[Samuel Iglesias Gonsálvez]

On Fri, 2017-01-13 at 14:40 -0800, Matt Turner wrote:
> On Thu, Jan 5, 2017 at 5:07 AM, Samuel Iglesias Gonsálvez
> <siglesias at igalia.com> wrote:
> > From: "Juan A. Suarez Romero" <jasuarez at igalia.com>
> > 
> > In the generator we must generate slightly different code for
> > Ivybridge/Valleview, because of the way the stride works in
> > this hardware.
> > ---
> >  src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 26
> > +++++++++++++++++++++---
> >  1 file changed, 23 insertions(+), 3 deletions(-)
> > 
> > diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
> > b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
> > index 0eaa91b..a68e14c 100644
> > --- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
> > +++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
> > @@ -1936,13 +1936,28 @@ generate_code(struct brw_codegen *p,
> > 
> >           brw_set_default_access_mode(p, BRW_ALIGN_1);
> > 
> > -         dst.hstride = BRW_HORIZONTAL_STRIDE_2;
> > +         /* When converting from DF->F, we set destination's
> > stride as 2 as an
> > +          * aligment requirement. But in IVB/VLV, each DF
> > implicitly writes
> 
> Typo: alignment
> 
> > +          * two floats, being the first one the converted value.
> > So we don't
> > +          * need to explicitly set stride 2, but 1.
> > +          */
> > +         if (devinfo->gen == 7 && !devinfo->is_haswell)
> > +            dst.hstride = BRW_HORIZONTAL_STRIDE_1;
> > +         else
> > +            dst.hstride = BRW_HORIZONTAL_STRIDE_2;
> > +
> >           dst.width = BRW_WIDTH_4;
> >           src[0].vstride = BRW_VERTICAL_STRIDE_4;
> >           src[0].width = BRW_WIDTH_4;
> >           brw_MOV(p, dst, src[0]);
> > 
> >           struct brw_reg dst_as_src = dst;
> > +         /* As we have set horizontal stride 1 instead of 2 in
> > IVB/VLV, we
> > +          * need to fix it here to have the expected value.
> > +          */
> > +         if (devinfo->gen == 7 && !devinfo->is_haswell)
> > +            dst_as_src.hstride = BRW_HORIZONTAL_STRIDE_2;
> > +
> >           dst.hstride = BRW_HORIZONTAL_STRIDE_1;
> >           dst.width = BRW_WIDTH_8;
> >           brw_MOV(p, dst, dst_as_src);
> > @@ -1965,8 +1980,13 @@ generate_code(struct brw_codegen *p,
> >           src[0].width = BRW_WIDTH_4;
> >           brw_MOV(p, tmp, src[0]);
> > 
> > -         tmp.vstride = BRW_VERTICAL_STRIDE_8;
> > -         tmp.hstride = BRW_HORIZONTAL_STRIDE_2;
> > +         if (devinfo->gen == 7 && !devinfo->is_haswell) {
> > +            tmp.vstride = BRW_VERTICAL_STRIDE_4;
> > +            tmp.hstride = BRW_HORIZONTAL_STRIDE_1;
> > +         } else {
> > +            tmp.vstride = BRW_VERTICAL_STRIDE_8;
> > +            tmp.hstride = BRW_HORIZONTAL_STRIDE_2;
> > +         }
> 
> With the patch I sent to replace 09/22, there should be no changes
> needed to VEC4_OPCODE_TO_DOUBLE. :)
> 
> Please change double_to_single() to VEC4_OPCODE_FROM_DOUBLE in the
> title.
> 

OK, thanks!

Sam