[Mesa-dev] [PATCH 15/27] i965/gen6: Drop miptrees in depth/stencil offset resolvers

[Topi Pohjolainen]

Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/mesa/drivers/dri/i965/brw_blorp.c         |  8 ++++----
 src/mesa/drivers/dri/i965/brw_tex_layout.c    | 19 +------------------
 src/mesa/drivers/dri/i965/gen6_depth_state.c  |  4 ++--
 src/mesa/drivers/dri/i965/intel_mipmap_tree.h |  5 +----
 4 files changed, 8 insertions(+), 28 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c
index 632f5f3..6cc8b2e 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.c
+++ b/src/mesa/drivers/dri/i965/brw_blorp.c
@@ -161,10 +161,9 @@ blorp_surf_for_miptree(struct brw_context *brw,
        * it any further.  See blorp_emit_depth_stencil_config().
        */
       surf->addr.offset += brw_stencil_all_slices_at_each_lod_offset(
-                              surf->surf, mt, *level);
+                              surf->surf, *level);
 
-      assert(brw_stencil_all_slices_at_each_lod_offset(
-                surf->surf, mt, *level) ==
+      assert(brw_stencil_all_slices_at_each_lod_offset(surf->surf, *level) ==
              mt->level[*level].level_y * mt->pitch +
              mt->level[*level].level_x * 64);
 
@@ -247,7 +246,8 @@ blorp_surf_for_miptree(struct brw_context *brw,
              */
             surf->aux_addr.offset = brw_hiz_all_slices_at_each_lod_offset(
                &surf->surf->phys_level0_sa, surf->surf->dim,
-               surf->surf->levels, surf->surf->format, hiz_mt, *level);
+               surf->surf->levels, surf->surf->format, *level);
+
             assert(surf->aux_addr.offset ==
                    intel_miptree_get_aligned_offset(
                       hiz_mt,
diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c
index 6f1c228..0c1d952 100644
--- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
+++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
@@ -323,11 +323,8 @@ all_slices_at_each_lod_y_offset(const struct isl_extent4d *phys_level0_sa,
 
 uint32_t
 brw_stencil_all_slices_at_each_lod_offset(const struct isl_surf *surf,
-                                          const struct intel_mipmap_tree *mt,
                                           unsigned level)
 {
-   assert(mt->array_layout == ALL_SLICES_AT_EACH_LOD);
-
    const unsigned halign = 64;
    const unsigned valign = 64;
    const unsigned level_x = all_slices_at_each_lod_x_offset(
@@ -335,9 +332,6 @@ brw_stencil_all_slices_at_each_lod_offset(const struct isl_surf *surf,
    const unsigned level_y = all_slices_at_each_lod_y_offset(
       &surf->phys_level0_sa, surf->dim, valign, level);
 
-   assert(level_x == mt->level[level].level_x);
-   assert(level_y == mt->level[level].level_y);
-
    /* From Vol 2a, 11.5.6.2.1 3DSTATE_STENCIL_BUFFER, field "Surface Pitch":
     *    The pitch must be set to 2x the value computed based on width, as
     *    the stencil buffer is stored with two rows interleaved.
@@ -348,8 +342,6 @@ brw_stencil_all_slices_at_each_lod_offset(const struct isl_surf *surf,
     */
    const unsigned two_rows_interleaved_pitch = surf->row_pitch / 2;
 
-   assert(two_rows_interleaved_pitch == mt->pitch);
-
    return level_y * two_rows_interleaved_pitch + level_x * 64;
 }
 
@@ -373,12 +365,8 @@ uint32_t
 brw_hiz_all_slices_at_each_lod_offset(
    const struct isl_extent4d *phys_level0_sa,
    enum isl_surf_dim dim, unsigned num_levels,
-   enum isl_format format,
-   const struct intel_mipmap_tree *mt,
-   unsigned level)
+   enum isl_format format, unsigned level)
 {
-   assert(mt->array_layout == ALL_SLICES_AT_EACH_LOD);
-
    const uint32_t cpp = isl_format_get_layout(format)->bpb / 8;
    const uint32_t halign = 128 / cpp;
    const uint32_t valign = 32;
@@ -389,11 +377,6 @@ brw_hiz_all_slices_at_each_lod_offset(
    const uint32_t pitch = brw_get_mipmap_total_width(
                              phys_level0_sa->width, num_levels, halign) * cpp;
 
-   assert(level_x == mt->level[level].level_x);
-   assert(level_y == mt->level[level].level_y);
-   assert(pitch == mt->pitch);
-   assert(cpp == mt->cpp);
-
    return level_y * pitch + level_x / halign * 4096;
 }
 
diff --git a/src/mesa/drivers/dri/i965/gen6_depth_state.c b/src/mesa/drivers/dri/i965/gen6_depth_state.c
index 05565de..78683b4 100644
--- a/src/mesa/drivers/dri/i965/gen6_depth_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_depth_state.c
@@ -173,7 +173,7 @@ gen6_emit_depth_stencil_hiz(struct brw_context *brw,
           */
          const uint32_t offset = brw_hiz_all_slices_at_each_lod_offset(
             &temp_surf.phys_level0_sa, temp_surf.dim, temp_surf.levels,
-            temp_surf.format, hiz_mt, lod);
+            temp_surf.format, lod);
 
          assert(offset == intel_miptree_get_aligned_offset(
                              hiz_mt,
@@ -205,7 +205,7 @@ gen6_emit_depth_stencil_hiz(struct brw_context *brw,
          if (stencil_mt->array_layout == ALL_SLICES_AT_EACH_LOD) {
             assert(stencil_mt->format == MESA_FORMAT_S_UINT8);
             offset = brw_stencil_all_slices_at_each_lod_offset(
-                        &temp_surf, stencil_mt, lod);
+                        &temp_surf, lod);
 
             assert(offset ==
                    stencil_mt->level[lod].level_y * stencil_mt->pitch +
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
index 11c61c2..d77431a 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
@@ -988,16 +988,13 @@ brw_get_mipmap_total_width(unsigned w0, unsigned num_levels, unsigned halign);
 
 uint32_t
 brw_stencil_all_slices_at_each_lod_offset(const struct isl_surf *surf,
-                                          const struct intel_mipmap_tree *mt,
                                           uint32_t level);
 
 uint32_t
 brw_hiz_all_slices_at_each_lod_offset(
    const struct isl_extent4d *phys_level0_sa, 
    enum isl_surf_dim dim, unsigned num_levels,
-   enum isl_format format,
-   const struct intel_mipmap_tree *mt,
-   unsigned level);
+   enum isl_format format, unsigned level);
 
 void
 brw_miptree_layout(struct brw_context *brw,
-- 
2.5.5