[Mesa-dev] [PATCH 5/7] i965: Use a CPU mapping for the program cache BO on LLC platforms.

[Kenneth Graunke]

In 2014 (commit 02ca66fbc3e2b272), I changed the program cache code
to use a persistent mapping for the cache BO.

For some reason, I used drm_intel_gem_bo_unsynchronized.  This is
rather pointless - we're mapping a freshly allocated, idle BO, so
a regular mapping won't stall.  I have no idea why I did that.

drm_intel_gem_bo_unsynchronized does a GTT mapping, though, which
is also unnecessary - on LLC platforms, we can map linear buffers
via the CPU and the LLC ensures coherency.

Switch to regular drm_intel_bo_map().

Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
---
 src/mesa/drivers/dri/i965/brw_program_cache.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_program_cache.c b/src/mesa/drivers/dri/i965/brw_program_cache.c
index 4d249ba6f93..0c1da172588 100644
--- a/src/mesa/drivers/dri/i965/brw_program_cache.c
+++ b/src/mesa/drivers/dri/i965/brw_program_cache.c
@@ -214,7 +214,7 @@ brw_cache_new_bo(struct brw_cache *cache, uint32_t new_size)
 
    new_bo = drm_intel_bo_alloc(brw->bufmgr, "program cache", new_size, 64);
    if (brw->has_llc)
-      drm_intel_gem_bo_map_unsynchronized(new_bo);
+      drm_intel_bo_map(new_bo, true);
 
    /* Copy any existing data that needs to be saved. */
    if (cache->next_offset != 0) {
@@ -405,7 +405,7 @@ brw_init_caches(struct brw_context *brw)
 
    cache->bo = drm_intel_bo_alloc(brw->bufmgr, "program cache",  4096, 64);
    if (brw->has_llc)
-      drm_intel_gem_bo_map_unsynchronized(cache->bo);
+      drm_intel_bo_map(cache->bo, true);
 }
 
 static void
-- 
2.11.0