[Mesa-dev] [PATCH] radeonsi: for the tess barrier, only use emit_waitcnt on SI and LLVM 3.9+

[Nicolai Hähnle]

Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

On 17.01.2017 13:49, Marek Olšák wrote:
> From: Marek Olšák <marek.olsak at amd.com>
>
> Cc: 17.0 13.0 <mesa-stable at lists.freedesktop.org>
> ---
>  src/gallium/drivers/radeonsi/si_shader.c | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
> index f404273..10f40a9 100644
> --- a/src/gallium/drivers/radeonsi/si_shader.c
> +++ b/src/gallium/drivers/radeonsi/si_shader.c
> @@ -5433,24 +5433,27 @@ static void si_llvm_emit_primitive(
>  			   ctx->voidt, args, 2, 0);
>  }
>
>  static void si_llvm_emit_barrier(const struct lp_build_tgsi_action *action,
>  				 struct lp_build_tgsi_context *bld_base,
>  				 struct lp_build_emit_data *emit_data)
>  {
>  	struct si_shader_context *ctx = si_shader_context(bld_base);
>  	struct gallivm_state *gallivm = bld_base->base.gallivm;
>
> -	/* The real barrier instruction isn’t needed, because an entire patch
> +	/* SI only (thanks to a hw bug workaround):
> +	 * The real barrier instruction isn’t needed, because an entire patch
>  	 * always fits into a single wave.
>  	 */
> -	if (ctx->type == PIPE_SHADER_TESS_CTRL) {
> +	if (HAVE_LLVM >= 0x0309 &&
> +	    ctx->screen->b.chip_class == SI &&
> +	    ctx->type == PIPE_SHADER_TESS_CTRL) {
>  		emit_waitcnt(ctx, LGKM_CNT & VM_CNT);
>  		return;
>  	}
>
>  	lp_build_intrinsic(gallivm->builder,
>  			   HAVE_LLVM >= 0x0309 ? "llvm.amdgcn.s.barrier"
>  					       : "llvm.AMDGPU.barrier.local",
>  			   ctx->voidt, NULL, 0, 0);
>  }
>
>