[Mesa-dev] [PATCH] radeonsi: don't forget to add HTILE to the buffer list for texturing

[Samuel Pitoiset]

On 01/19/2017 11:41 AM, Samuel Pitoiset wrote:
>
>
> On 01/19/2017 11:29 AM, Samuel Pitoiset wrote:
>>
>>
>> On 01/19/2017 10:51 AM, Samuel Pitoiset wrote:
>>>
>>>
>>> On 01/18/2017 10:21 PM, Marek Olšák wrote:
>>>> From: Marek Olšák <marek.olsak at amd.com>
>>>>
>>>> This fixes VM faults. Discovered by Samuel Pitoiset.
>>>>
>>>> Cc: 17.0 13.0 <mesa-stable at lists.freedesktop.org>
>>>
>>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98975
>>
>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98856
>
> https://bugs.freedesktop.org/show_bug.cgi?id=99450
>
> (I use vm_debug=1 to make sure)

One more, CS:GO.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90217

>
>>
>> :)
>>
>>>
>>>> ---
>>>>  src/gallium/drivers/radeonsi/si_descriptors.c | 19 +++++++++++++------
>>>>  1 file changed, 13 insertions(+), 6 deletions(-)
>>>>
>>>> diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c
>>>> b/src/gallium/drivers/radeonsi/si_descriptors.c
>>>> index df0905d..4a9fcd0 100644
>>>> --- a/src/gallium/drivers/radeonsi/si_descriptors.c
>>>> +++ b/src/gallium/drivers/radeonsi/si_descriptors.c
>>>> @@ -313,28 +313,35 @@ static void si_sampler_view_add_buffer(struct
>>>> si_context *sctx,
>>>>      rres = (struct r600_resource*)resource;
>>>>      priority = r600_get_sampler_view_priority(rres);
>>>>
>>>>      radeon_add_to_buffer_list_check_mem(&sctx->b, &sctx->b.gfx,
>>>>                          rres, usage, priority,
>>>>                          check_mem);
>>>>
>>>>      if (resource->target == PIPE_BUFFER)
>>>>          return;
>>>>
>>>> -    /* Now add separate DCC if it's present. */
>>>> +    /* Now add separate DCC or HTILE. */
>>>>      rtex = (struct r600_texture*)resource;
>>>> -    if (!rtex->dcc_separate_buffer)
>>>> -        return;
>>>> +    if (rtex->dcc_separate_buffer) {
>>>> +        radeon_add_to_buffer_list_check_mem(&sctx->b, &sctx->b.gfx,
>>>> +                            rtex->dcc_separate_buffer, usage,
>>>> +                            RADEON_PRIO_DCC, check_mem);
>>>> +    }
>>>>
>>>> -    radeon_add_to_buffer_list_check_mem(&sctx->b, &sctx->b.gfx,
>>>> -                        rtex->dcc_separate_buffer, usage,
>>>> -                        RADEON_PRIO_DCC, check_mem);
>>>> +    if (rtex->htile_buffer &&
>>>> +        rtex->tc_compatible_htile &&
>>>> +        !is_stencil_sampler) {
>>>> +        radeon_add_to_buffer_list_check_mem(&sctx->b, &sctx->b.gfx,
>>>> +                            rtex->htile_buffer, usage,
>>>> +                            RADEON_PRIO_HTILE, check_mem);
>>>> +    }
>>>>  }
>>>>
>>>>  static void si_sampler_views_begin_new_cs(struct si_context *sctx,
>>>>                        struct si_sampler_views *views)
>>>>  {
>>>>      unsigned mask = views->enabled_mask;
>>>>
>>>>      /* Add buffers to the CS. */
>>>>      while (mask) {
>>>>          int i = u_bit_scan(&mask);
>>>>