[Mesa-dev] [PATCH v2 0/5] r600/radeonsi/st/mesa: use DDIV instead of DRCP + DMUL

[James Harvey]

Hi Nicolai,
 I tested your branch against mesa-13.0.3 on my CYPRESS HD5850.  It's an
r600 with doubles, but looks like this code might be only for cayman and
up? Either way, all the fs-op-div tests pass.

./piglit -o -s -c run all -t fs-op-div*

summary:
       name: fs-op-div-pre fs-op-div-post
       ----  ------------- --------------
       pass:           142            142
       fail:             0              0
      crash:             0              0
       skip:            10             10

Thanks,
James Harvey


On 01/19/2017 05:59 AM, Nicolai Hähnle wrote:
> Hi all,
> 
> here's a v2 without the pipe cap. Reminder: this requires DDIV support in
> nvc0, r600, and radeonsi.
> 
> Ilia took care of nvc0, and I already did radeonsi. The thing is, it turns
> out I don't have an R600 that does double-precision. So testing would be
> very much appreciated, e.g. using
> 
>  piglit/generated_tests/spec/arb_gpu_shader_fp64/execution/built-in-functions/fs-op-div-*.shader_test
> 
> You can find this series at https://cgit.freedesktop.org/~nh/mesa/log/?h=ddiv
> Otherwise, I may have to go back to the pipe cap variant :/
> 
> Please review!
> Nicolai
> 
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