[Mesa-dev] [PATCH] radv/ac: implement txs for buffer textures.
Dave Airlie
airlied at gmail.com
Mon Jan 30 19:21:16 UTC 2017
From: Dave Airlie <airlied at redhat.com>
This fixes a bunch of buffer related:
dEQP-VK.memory.pipeline_barrier.*
tests, that were crashing in LLVM due to this being missing.
Cc: "17.0" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied at redhat.com>
---
src/amd/common/ac_nir_to_llvm.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index bfe6a2e..f0ac3d3 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -3224,6 +3224,11 @@ static void visit_tex(struct nir_to_llvm_context *ctx, nir_tex_instr *instr)
}
}
+ if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
+ result = get_buffer_size(ctx, res_ptr, false);
+ goto write_result;
+ }
+
if (instr->op == nir_texop_texture_samples) {
LLVMValueRef res, samples, is_msaa;
res = LLVMBuildBitCast(ctx->builder, res_ptr, ctx->v8i32, "");
--
2.9.3
More information about the mesa-dev
mailing list