[Mesa-dev] [PATCH 4/6] ac/nir: Imeplement Float64 UBO loads.
Bas Nieuwenhuizen
bas at basnieuwenhuizen.nl
Tue Jan 31 07:35:34 UTC 2017
Signed-off-by: Bas Nieuwenhuizen <basni at google.com>
---
src/amd/common/ac_nir_to_llvm.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index c1bbb00184b..74976b3e222 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -2182,13 +2182,17 @@ static LLVMValueRef visit_load_buffer(struct nir_to_llvm_context *ctx,
static LLVMValueRef visit_load_ubo_buffer(struct nir_to_llvm_context *ctx,
nir_intrinsic_instr *instr)
{
- LLVMValueRef results[4], ret;
+ LLVMValueRef results[8], ret;
LLVMValueRef rsrc = get_src(ctx, instr->src[0]);
LLVMValueRef offset = get_src(ctx, instr->src[1]);
+ int num_components = instr->num_components;
rsrc = LLVMBuildBitCast(ctx->builder, rsrc, LLVMVectorType(ctx->i8, 16), "");
- for (unsigned i = 0; i < instr->num_components; ++i) {
+ if (instr->dest.ssa.bit_size == 64)
+ num_components *= 2;
+
+ for (unsigned i = 0; i < num_components; ++i) {
LLVMValueRef params[] = {
rsrc,
LLVMBuildAdd(ctx->builder, LLVMConstInt(ctx->i32, 4 * i, 0),
--
2.11.0
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