[Mesa-dev] [PATCH 4/7] anv: move BaseVertexID/BaseInstanceID vertex buffer index to 31

[Lionel Landwerlin]

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
---
 src/intel/vulkan/genX_cmd_buffer.c | 2 +-
 src/intel/vulkan/genX_pipeline.c   | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c
index f7894a0574..91b97abec6 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -1593,7 +1593,7 @@ emit_base_vertex_instance_bo(struct anv_cmd_buffer *cmd_buffer,
 
    GENX(VERTEX_BUFFER_STATE_pack)(&cmd_buffer->batch, p + 1,
       &(struct GENX(VERTEX_BUFFER_STATE)) {
-         .VertexBufferIndex = 32, /* Reserved for this */
+         .VertexBufferIndex = 31, /* Reserved for this */
          .AddressModifyEnable = true,
          .BufferPitch = 0,
 #if (GEN_GEN >= 8)
diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c
index d3a9d4302e..9629ca9bf9 100644
--- a/src/intel/vulkan/genX_pipeline.c
+++ b/src/intel/vulkan/genX_pipeline.c
@@ -187,7 +187,7 @@ emit_vertex_input(struct anv_pipeline *pipeline,
                            VFCOMP_STORE_SRC : VFCOMP_STORE_0;
 
       struct GENX(VERTEX_ELEMENT_STATE) element = {
-         .VertexBufferIndex = 32, /* Reserved for this */
+         .VertexBufferIndex = 31, /* Reserved for this */
          .Valid = true,
          .SourceElementFormat = ISL_FORMAT_R32G32_UINT,
          .Component0Control = base_ctrl,
-- 
2.11.0