[Mesa-dev] [PATCH v2 56/73] radeonsi: make get_indirect_index globally visible

Nicolai Hähnle nhaehnle at gmail.com
Wed Jul 5 10:48:40 UTC 2017


From: Nicolai Hähnle <nicolai.haehnle at amd.com>

---
 src/gallium/drivers/radeonsi/si_shader.c          | 20 ++++++++++----------
 src/gallium/drivers/radeonsi/si_shader_internal.h |  3 +++
 2 files changed, 13 insertions(+), 10 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 8e16abf..514d7e1 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -631,43 +631,43 @@ static LLVMValueRef get_primitive_id(struct si_shader_context *ctx,
 	default:
 		assert(0);
 		return ctx->i32_0;
 	}
 }
 
 /**
  * Return the value of tgsi_ind_register for indexing.
  * This is the indirect index with the constant offset added to it.
  */
-static LLVMValueRef get_indirect_index(struct si_shader_context *ctx,
-				       const struct tgsi_ind_register *ind,
-				       int rel_index)
+LLVMValueRef si_get_indirect_index(struct si_shader_context *ctx,
+				   const struct tgsi_ind_register *ind,
+				   int rel_index)
 {
 	struct gallivm_state *gallivm = &ctx->gallivm;
 	LLVMValueRef result;
 
 	result = ctx->addrs[ind->Index][ind->Swizzle];
 	result = LLVMBuildLoad(gallivm->builder, result, "");
 	result = LLVMBuildAdd(gallivm->builder, result,
 			      LLVMConstInt(ctx->i32, rel_index, 0), "");
 	return result;
 }
 
 /**
- * Like get_indirect_index, but restricts the return value to a (possibly
+ * Like si_get_indirect_index, but restricts the return value to a (possibly
  * undefined) value inside [0..num).
  */
 LLVMValueRef si_get_bounded_indirect_index(struct si_shader_context *ctx,
 					   const struct tgsi_ind_register *ind,
 					   int rel_index, unsigned num)
 {
-	LLVMValueRef result = get_indirect_index(ctx, ind, rel_index);
+	LLVMValueRef result = si_get_indirect_index(ctx, ind, rel_index);
 
 	return si_llvm_bound_index(ctx, result, num);
 }
 
 
 /**
  * Calculate a dword address given an input or output register and a stride.
  */
 static LLVMValueRef get_dw_address(struct si_shader_context *ctx,
 				   const struct tgsi_full_dst_register *dst,
@@ -693,21 +693,21 @@ static LLVMValueRef get_dw_address(struct si_shader_context *ctx,
 		reg.DimIndirect = src->DimIndirect;
 	} else
 		reg = *dst;
 
 	/* If the register is 2-dimensional (e.g. an array of vertices
 	 * in a primitive), calculate the base address of the vertex. */
 	if (reg.Register.Dimension) {
 		LLVMValueRef index;
 
 		if (reg.Dimension.Indirect)
-			index = get_indirect_index(ctx, &reg.DimIndirect,
+			index = si_get_indirect_index(ctx, &reg.DimIndirect,
 						   reg.Dimension.Index);
 		else
 			index = LLVMConstInt(ctx->i32, reg.Dimension.Index, 0);
 
 		base_addr = LLVMBuildAdd(gallivm->builder, base_addr,
 					 LLVMBuildMul(gallivm->builder, index,
 						      vertex_dw_stride, ""), "");
 	}
 
 	/* Get information about the register. */
@@ -726,21 +726,21 @@ static LLVMValueRef get_dw_address(struct si_shader_context *ctx,
 
 	if (reg.Register.Indirect) {
 		/* Add the relative address of the element. */
 		LLVMValueRef ind_index;
 
 		if (reg.Indirect.ArrayID)
 			first = array_first[reg.Indirect.ArrayID];
 		else
 			first = reg.Register.Index;
 
-		ind_index = get_indirect_index(ctx, &reg.Indirect,
+		ind_index = si_get_indirect_index(ctx, &reg.Indirect,
 					   reg.Register.Index - first);
 
 		base_addr = LLVMBuildAdd(gallivm->builder, base_addr,
 				    LLVMBuildMul(gallivm->builder, ind_index,
 						 LLVMConstInt(ctx->i32, 4, 0), ""), "");
 
 		param = reg.Register.Dimension ?
 			si_shader_io_get_unique_index(name[first], index[first]) :
 			si_shader_io_get_unique_index_patch(name[first], index[first]);
 	} else {
@@ -829,21 +829,21 @@ static LLVMValueRef get_tcs_tes_buffer_address_from_reg(
 	struct tgsi_full_src_register reg;
 	LLVMValueRef vertex_index = NULL;
 	LLVMValueRef param_index = NULL;
 	unsigned param_index_base, param_base;
 
 	reg = src ? *src : tgsi_full_src_register_from_dst(dst);
 
 	if (reg.Register.Dimension) {
 
 		if (reg.Dimension.Indirect)
-			vertex_index = get_indirect_index(ctx, &reg.DimIndirect,
+			vertex_index = si_get_indirect_index(ctx, &reg.DimIndirect,
 			                                  reg.Dimension.Index);
 		else
 			vertex_index = LLVMConstInt(ctx->i32, reg.Dimension.Index, 0);
 	}
 
 	/* Get information about the register. */
 	if (reg.Register.File == TGSI_FILE_INPUT) {
 		name = info->input_semantic_name;
 		index = info->input_semantic_index;
 		array_first = info->input_array_first;
@@ -855,21 +855,21 @@ static LLVMValueRef get_tcs_tes_buffer_address_from_reg(
 		assert(0);
 		return NULL;
 	}
 
 	if (reg.Register.Indirect) {
 		if (reg.Indirect.ArrayID)
 			param_base = array_first[reg.Indirect.ArrayID];
 		else
 			param_base = reg.Register.Index;
 
-		param_index = get_indirect_index(ctx, &reg.Indirect,
+		param_index = si_get_indirect_index(ctx, &reg.Indirect,
 		                                 reg.Register.Index - param_base);
 
 	} else {
 		param_base = reg.Register.Index;
 		param_index = ctx->i32_0;
 	}
 
 	param_index_base = reg.Register.Dimension ?
 		si_shader_io_get_unique_index(name[param_base], index[param_base]) :
 		si_shader_io_get_unique_index_patch(name[param_base], index[param_base]);
@@ -3635,21 +3635,21 @@ static void build_interp_intrinsic(const struct lp_build_tgsi_action *action,
 		unsigned array_id = input->Indirect.ArrayID;
 
 		if (array_id) {
 			input_base = info->input_array_first[array_id];
 			input_array_size = info->input_array_last[array_id] - input_base + 1;
 		} else {
 			input_base = inst->Src[0].Register.Index;
 			input_array_size = info->num_inputs - input_base;
 		}
 
-		array_idx = get_indirect_index(ctx, &input->Indirect,
+		array_idx = si_get_indirect_index(ctx, &input->Indirect,
 					       input->Register.Index - input_base);
 	} else {
 		input_base = inst->Src[0].Register.Index;
 		input_array_size = 1;
 		array_idx = ctx->i32_0;
 	}
 
 	interp = shader->selector->info.input_interpolate[input_base];
 
 	if (inst->Instruction.Opcode == TGSI_OPCODE_INTERP_OFFSET ||
diff --git a/src/gallium/drivers/radeonsi/si_shader_internal.h b/src/gallium/drivers/radeonsi/si_shader_internal.h
index feaa82d..d2eb957 100644
--- a/src/gallium/drivers/radeonsi/si_shader_internal.h
+++ b/src/gallium/drivers/radeonsi/si_shader_internal.h
@@ -297,20 +297,23 @@ void si_llvm_emit_store(struct lp_build_tgsi_context *bld_base,
 			const struct tgsi_opcode_info *info,
 			LLVMValueRef dst[4]);
 
 /* Combine these with & instead of |. */
 #define NOOP_WAITCNT 0xf7f
 #define LGKM_CNT 0x07f
 #define VM_CNT 0xf70
 
 void si_emit_waitcnt(struct si_shader_context *ctx, unsigned simm16);
 
+LLVMValueRef si_get_indirect_index(struct si_shader_context *ctx,
+				   const struct tgsi_ind_register *ind,
+				   int rel_index);
 LLVMValueRef si_get_bounded_indirect_index(struct si_shader_context *ctx,
 					   const struct tgsi_ind_register *ind,
 					   int rel_index, unsigned num);
 
 LLVMTypeRef si_const_array(LLVMTypeRef elem_type, int num_elements);
 
 void si_shader_context_init_alu(struct lp_build_tgsi_context *bld_base);
 void si_shader_context_init_mem(struct si_shader_context *ctx);
 
 LLVMValueRef si_load_sampler_desc(struct si_shader_context *ctx,
-- 
2.9.3



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