[Mesa-dev] [PATCH 16/16] i965/gen4: Set tile offsets to zero after depth rebase

[Jason Ekstrand]

9-16 are

Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

On Mon, Jul 17, 2017 at 6:35 AM, Topi Pohjolainen <
topi.pohjolainen at gmail.com> wrote:

> Current logic calls intel_renderbuffer_set_draw_offset() which in
> turn tries to calculate x and y offset against layer/level settings
> that are against the original miptree actually having sufficient
> levels/layers. This returns correctly x=0 y=0 regardless of the given
> layer/level only because one calls intel_miptree_get_image_offset()
> which goes and consults miptree offset table which in turn luckily
> contains entries for max-mipmap levels, all initialised to zero even
> in case of non-mipmapped.
>
> This patch stops consulting the table and simply sets the draw
> offsets to zero that are compatible with the single slice miptree
> backing the renderbuffer.
> This prepares for ISL based miptrees that calculate offsets
> on-demand and do not tolerate levels beyond what the miptree has.
>
> Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
> ---
>  src/mesa/drivers/dri/i965/brw_misc_state.c | 10 ++++++----
>  1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c
> b/src/mesa/drivers/dri/i965/brw_misc_state.c
> index d242aa4991..e9b3b06421 100644
> --- a/src/mesa/drivers/dri/i965/brw_misc_state.c
> +++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
> @@ -168,9 +168,11 @@ rebase_depth_stencil(struct brw_context *brw, struct
> intel_renderbuffer *irb,
>                   irb->mt_level, tile_x, tile_y);
>        intel_renderbuffer_move_to_temp(brw, irb, invalidate);
>
> -      /* Get the new offset. */
> -      tile_x = irb->draw_x & tile_mask_x;
> -      tile_y = irb->draw_y & tile_mask_y;
> +      /* There is now only single slice miptree. */
> +      brw->depthstencil.tile_x = 0;
> +      brw->depthstencil.tile_y = 0;
> +      brw->depthstencil.depth_offset = 0;
> +      return true;
>     }
>
>     /* While we just tried to get everything aligned, we may have failed
> to do
> @@ -192,7 +194,7 @@ rebase_depth_stencil(struct brw_context *brw, struct
> intel_renderbuffer *irb,
>                                         irb->draw_x & ~tile_mask_x,
>                                         irb->draw_y & ~tile_mask_y);
>
> -   return rebase;
> +   return false;
>  }
>
>  void
> --
> 2.11.0
>
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