[Mesa-dev] i965: Transition the rest of surfaces (i.e., color) to isl

Topi Pohjolainen topi.pohjolainen at gmail.com
Fri Jul 21 15:00:51 UTC 2017


First patch actually should have been included already when
gen6 stencil got transitioned - it has been giving warning ever
since.

Most of the work actually got already done for depth surfaces (which
is y-tiled such as color surfaces). What is left are color surface
specifics, mostly preparing for corner cases.

This is now all green in ci-system. For snb and older i965 wasn't
checking hardware incapabilities as hard as isl does. Certain
format/size/msaa combinations were allowed that shouldn't have.
Moving to isl exposed code paths that didn't report surface creation
failures resulting in asserts firing later on. Patches 10 and 11
now properly tell the client if the surface type can't be supported
allowing piglit tests to skip them.

On ivb and hsw patch 9 allows similar reporting while patches 7
and 8 lift constraints that seem inaccurate. See piglit series:

https://lists.freedesktop.org/archives/piglit/2017-July/022606.html

I separated patch 16 in order to ease review. It needs to be
squashed into 15 before pushing.

Patch 15+16 is checked to work on their own making 17 just a
non-functional clean-up.

I think the diff-stat and the last patch speak for themselves.

Topi Pohjolainen (17):
  intel/isl: Add missing stencil pitch validation
  i965/miptree: Prepare has_color_unresolved() for isl based
  i965/miptree: Prepare non-tiled fallback for isl based
  i965/miptree/gen4: Prepare x-tiled fallback for isl based
  intel/isl: Aling non-tiled horizontally by cache line
  intel/isl: Allow 1D surfaces with compressed formats
  intel/isl/gen7: Allow msaa with 128-bit formats
  intel/isl/gen7: Allow msaa with signed integer formats
  intel/isl/gen7: Don't allow multisampled surfaces with valign2
  main/teximage: Even on failure use valid format for init()
  i965/miptree: Check tex image allocation failures
  i965/miptree: Store compression flag also for isl based
  i965/miptree: Relax size alignment for linear surfaces
  i965/miptree: Drop miptree_array_layout in get_isl_dim_layout()
  i965/miptree: Switch remaining surfaces to isl
  squash: i965/gen4: Force x-tiling for color surfaces
  i965/miptree: Clean-up unused

 src/intel/isl/isl.c                              |  24 +-
 src/intel/isl/isl_format.c                       |  11 +-
 src/intel/isl/isl_gen7.c                         |  45 +-
 src/mesa/drivers/dri/i965/Makefile.sources       |   1 -
 src/mesa/drivers/dri/i965/brw_blorp.c            |   8 +-
 src/mesa/drivers/dri/i965/brw_tex_layout.c       | 735 ---------------------
 src/mesa/drivers/dri/i965/brw_wm_surface_state.c |  34 +-
 src/mesa/drivers/dri/i965/gen6_depth_state.c     |   8 +-
 src/mesa/drivers/dri/i965/gen7_misc_state.c      |   8 +-
 src/mesa/drivers/dri/i965/gen8_depth_state.c     |   8 +-
 src/mesa/drivers/dri/i965/intel_blit.c           |  33 +-
 src/mesa/drivers/dri/i965/intel_fbo.c            |  44 +-
 src/mesa/drivers/dri/i965/intel_mipmap_tree.c    | 782 +++++------------------
 src/mesa/drivers/dri/i965/intel_mipmap_tree.h    | 244 +------
 src/mesa/drivers/dri/i965/intel_screen.c         |  13 +-
 src/mesa/drivers/dri/i965/intel_tex.c            |   2 +
 src/mesa/drivers/dri/i965/intel_tex_image.c      |  29 +-
 src/mesa/drivers/dri/i965/intel_tex_subimage.c   |   8 +-
 src/mesa/main/teximage.c                         |   2 +-
 19 files changed, 260 insertions(+), 1779 deletions(-)
 delete mode 100644 src/mesa/drivers/dri/i965/brw_tex_layout.c

-- 
2.11.0



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