[Mesa-dev] [PATCH 4/6] i965/miptree: Use isl instead of local offset calculator

[Topi Pohjolainen]

Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/mesa/drivers/dri/i965/brw_misc_state.c    | 20 +++++++++++---
 src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 38 +++------------------------
 src/mesa/drivers/dri/i965/intel_mipmap_tree.h |  4 ---
 3 files changed, 19 insertions(+), 43 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c
index 1e3be784c5..983fc0c736 100644
--- a/src/mesa/drivers/dri/i965/brw_misc_state.c
+++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
@@ -189,10 +189,22 @@ rebase_depth_stencil(struct brw_context *brw, struct intel_renderbuffer *irb,
 
    brw->depthstencil.tile_x = tile_x;
    brw->depthstencil.tile_y = tile_y;
-   brw->depthstencil.depth_offset = intel_miptree_get_aligned_offset(
-                                       irb->mt,
-                                       irb->draw_x & ~tile_mask_x,
-                                       irb->draw_y & ~tile_mask_y);
+
+   struct isl_image_offset image_offset;
+   isl_tiling_get_intratile_offset_el(irb->mt->surf.tiling,
+                                      irb->mt->cpp * 8,
+                                      irb->mt->surf.row_pitch,
+                                      irb->draw_x & ~tile_mask_x,
+                                      irb->draw_y & ~tile_mask_y,
+                                      &image_offset);
+
+   brw->depthstencil.depth_offset = image_offset.tile_aligned_byte_offset;
+
+   /* Given x and y were already masked to provide aligned offset. Therefore
+    * there should be no intra tile offset.
+    */
+   assert(image_offset.intra_tile_x == 0);
+   assert(image_offset.intra_tile_y == 0);
 
    return false;
 }
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 37024c011d..cab888f04d 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -1300,34 +1300,6 @@ intel_get_tile_masks(enum isl_tiling tiling, uint32_t cpp,
 }
 
 /**
- * Compute the offset (in bytes) from the start of the BO to the given x
- * and y coordinate.  For tiled BOs, caller must ensure that x and y are
- * multiples of the tile size.
- */
-uint32_t
-intel_miptree_get_aligned_offset(const struct intel_mipmap_tree *mt,
-                                 uint32_t x, uint32_t y)
-{
-   int cpp = mt->cpp;
-   uint32_t pitch = mt->surf.row_pitch;
-
-   switch (mt->surf.tiling) {
-   default:
-      unreachable("not reached");
-   case ISL_TILING_LINEAR:
-      return y * pitch + x * cpp;
-   case ISL_TILING_X:
-      assert((x % (512 / cpp)) == 0);
-      assert((y % 8) == 0);
-      return y * pitch + x / (512 / cpp) * 4096;
-   case ISL_TILING_Y0:
-      assert((x % (128 / cpp)) == 0);
-      assert((y % 32) == 0);
-      return y * pitch + x / (128 / cpp) * 4096;
-   }
-}
-
-/**
  * Rendering with tiled buffers requires that the base address of the buffer
  * be aligned to a page boundary.  For renderbuffers, and sometimes with
  * textures, we may want the surface to point at a texture image level that
@@ -1361,15 +1333,11 @@ intel_miptree_get_tile_offsets(const struct intel_mipmap_tree *mt,
    assert(mt->level[0].level_y == 0);
 
    uint32_t x, y;
-   uint32_t mask_x, mask_y;
-
-   intel_get_tile_masks(mt->surf.tiling, mt->cpp, &mask_x, &mask_y);
    intel_miptree_get_image_offset(mt, level, slice, &x, &y);
 
-   image_offset->intra_tile_x = x & mask_x;
-   image_offset->intra_tile_y = y & mask_y;
-   image_offset->tile_aligned_byte_offset =
-      intel_miptree_get_aligned_offset(mt, x & ~mask_x, y & ~mask_y);
+   isl_tiling_get_intratile_offset_el(mt->surf.tiling,
+                                      mt->cpp * 8, mt->surf.row_pitch,
+                                      x, y, image_offset);
 }
 
 static void
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
index b8d36b35e0..d9d2ce9ee2 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
@@ -468,10 +468,6 @@ intel_miptree_get_tile_offsets(const struct intel_mipmap_tree *mt,
                                unsigned level, unsigned slice,
                                struct isl_image_offset *image_offset);
 
-uint32_t
-intel_miptree_get_aligned_offset(const struct intel_mipmap_tree *mt,
-                                 uint32_t x, uint32_t y);
-
 void
 intel_miptree_copy_slice(struct brw_context *brw,
                          struct intel_mipmap_tree *src_mt,
-- 
2.11.0