[Mesa-dev] [PATCH] radv: for stencil only set Z tile mode index to same value

[Bas Nieuwenhuizen]

Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>

On Thu, Jul 27, 2017 at 5:59 AM, Dave Airlie <airlied at gmail.com> wrote:
> From: Dave Airlie <airlied at redhat.com>
>
> On SI this was causing a hang in
> dEQP-VK.pipeline.render_to_image.core.2d_array.mipmap.r16g16_sint_s8_uint
>
> This was due to not handling the tile mode index for depth like
> I fixed previously for new GPUs.
>
> Fixes: 01d0c5a9 (radv: fix stencil regression since new addrlib import)
> Signed-off-by: Dave Airlie <airlied at redhat.com>
> ---
>  src/amd/vulkan/radv_device.c | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
> index 752d70b..eb25872 100644
> --- a/src/amd/vulkan/radv_device.c
> +++ b/src/amd/vulkan/radv_device.c
> @@ -3246,6 +3246,8 @@ radv_initialise_ds_surface(struct radv_device *device,
>                         ds->db_z_info |= S_028040_TILE_MODE_INDEX(tile_mode_index);
>                         tile_mode_index = si_tile_mode_index(iview->image, level, true);
>                         ds->db_stencil_info |= S_028044_TILE_MODE_INDEX(tile_mode_index);
> +                       if (stencil_only)
> +                               ds->db_z_info |= S_028040_TILE_MODE_INDEX(tile_mode_index);
>                 }
>
>                 ds->db_depth_size = S_028058_PITCH_TILE_MAX((level_info->nblk_x / 8) - 1) |
> --
> 2.9.4
>
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