[Mesa-dev] [PATCH 04/14] ac/surface: compute tile swizzle only when it's allowed

[Marek Olšák]

From: Marek Olšák <marek.olsak at amd.com>

---
 src/amd/common/ac_surface.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/src/amd/common/ac_surface.c b/src/amd/common/ac_surface.c
index 4647ce4..61b4e41 100644
--- a/src/amd/common/ac_surface.c
+++ b/src/amd/common/ac_surface.c
@@ -698,22 +698,24 @@ static int gfx6_compute_surface(ADDR_HANDLE addrlib,
 	}
 
 	/* Make sure HTILE covers the whole miptree, because the shader reads
 	 * TC-compatible HTILE even for levels where it's disabled by DB.
 	 */
 	if (surf->htile_size && config->info.levels > 1)
 		surf->htile_size *= 2;
 
 	surf->is_linear = surf->u.legacy.level[0].mode == RADEON_SURF_MODE_LINEAR_ALIGNED;
 
-	/* workout base swizzle */
-	if (!(surf->flags & RADEON_SURF_Z_OR_SBUFFER)) {
+	/* Work out tile swizzle. */
+	if (surf->u.legacy.level[0].mode == RADEON_SURF_MODE_2D &&
+	    !(surf->flags & (RADEON_SURF_Z_OR_SBUFFER | RADEON_SURF_SHAREABLE)) &&
+	    (config->info.samples > 1 || !(surf->flags & RADEON_SURF_SCANOUT))) {
 		ADDR_COMPUTE_BASE_SWIZZLE_INPUT AddrBaseSwizzleIn = {0};
 		ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT AddrBaseSwizzleOut = {0};
 
 		AddrBaseSwizzleIn.surfIndex = config->info.surf_index;
 		AddrBaseSwizzleIn.tileIndex = AddrSurfInfoIn.tileIndex;
 		AddrBaseSwizzleIn.macroModeIndex = AddrSurfInfoOut.macroModeIndex;
 		AddrBaseSwizzleIn.pTileInfo = AddrSurfInfoOut.pTileInfo;
 		AddrBaseSwizzleIn.tileMode = AddrSurfInfoOut.tileMode;
 		AddrComputeBaseSwizzle(addrlib, &AddrBaseSwizzleIn, &AddrBaseSwizzleOut);
 
-- 
2.7.4