[Mesa-dev] [PATCH 4/7] radeonsi: rename shader resource decompress masks to their true meaning
Samuel Pitoiset
samuel.pitoiset at gmail.com
Wed Jun 7 20:22:06 UTC 2017
On 06/07/2017 09:50 PM, Marek Olšák wrote:
> From: Marek Olšák <marek.olsak at amd.com>
>
> ---
> src/gallium/drivers/radeonsi/si_blit.c | 12 ++++-----
> src/gallium/drivers/radeonsi/si_descriptors.c | 38 +++++++++++++--------------
> src/gallium/drivers/radeonsi/si_pipe.h | 6 ++---
> 3 files changed, 28 insertions(+), 28 deletions(-)
>
> diff --git a/src/gallium/drivers/radeonsi/si_blit.c b/src/gallium/drivers/radeonsi/si_blit.c
> index 46cb646..20b08b6 100644
> --- a/src/gallium/drivers/radeonsi/si_blit.c
> +++ b/src/gallium/drivers/radeonsi/si_blit.c
> @@ -388,21 +388,21 @@ si_flush_depth_texture(struct si_context *sctx,
> levels_z, levels_s,
> first_layer, last_layer);
> }
> }
>
> static void
> si_flush_depth_textures(struct si_context *sctx,
> struct si_textures_info *textures)
> {
> unsigned i;
> - unsigned mask = textures->depth_texture_mask;
> + unsigned mask = textures->needs_depth_decompress_mask;
>
> while (mask) {
> struct pipe_sampler_view *view;
> struct si_sampler_view *sview;
> struct r600_texture *tex;
>
> i = u_bit_scan(&mask);
>
> view = textures->views.views[i];
> assert(view);
> @@ -500,21 +500,21 @@ si_decompress_color_texture(struct si_context *sctx, struct r600_texture *tex,
> si_blit_decompress_color(&sctx->b.b, tex, first_level, last_level, 0,
> util_max_layer(&tex->resource.b.b, first_level),
> false);
> }
>
> static void
> si_decompress_sampler_color_textures(struct si_context *sctx,
> struct si_textures_info *textures)
> {
> unsigned i;
> - unsigned mask = textures->compressed_colortex_mask;
> + unsigned mask = textures->needs_color_decompress_mask;
>
> while (mask) {
> struct pipe_sampler_view *view;
> struct r600_texture *tex;
>
> i = u_bit_scan(&mask);
>
> view = textures->views.views[i];
> assert(view);
>
> @@ -523,21 +523,21 @@ si_decompress_sampler_color_textures(struct si_context *sctx,
> si_decompress_color_texture(sctx, tex, view->u.tex.first_level,
> view->u.tex.last_level);
> }
> }
>
> static void
> si_decompress_image_color_textures(struct si_context *sctx,
> struct si_images_info *images)
> {
> unsigned i;
> - unsigned mask = images->compressed_colortex_mask;
> + unsigned mask = images->needs_color_decompress_mask;
>
> while (mask) {
> const struct pipe_image_view *view;
> struct r600_texture *tex;
>
> i = u_bit_scan(&mask);
>
> view = &images->views[i];
> assert(view->resource->target != PIPE_BUFFER);
>
> @@ -657,27 +657,27 @@ static void si_decompress_textures(struct si_context *sctx, unsigned shader_mask
> if (compressed_colortex_counter != sctx->b.last_compressed_colortex_counter) {
> sctx->b.last_compressed_colortex_counter = compressed_colortex_counter;
> si_update_compressed_colortex_masks(sctx);
> }
>
> /* Decompress color & depth textures if needed. */
> mask = sctx->compressed_tex_shader_mask & shader_mask;
> while (mask) {
> unsigned i = u_bit_scan(&mask);
>
> - if (sctx->samplers[i].depth_texture_mask) {
> + if (sctx->samplers[i].needs_depth_decompress_mask) {
> si_flush_depth_textures(sctx, &sctx->samplers[i]);
> }
> - if (sctx->samplers[i].compressed_colortex_mask) {
> + if (sctx->samplers[i].needs_color_decompress_mask) {
> si_decompress_sampler_color_textures(sctx, &sctx->samplers[i]);
> }
> - if (sctx->images[i].compressed_colortex_mask) {
> + if (sctx->images[i].needs_color_decompress_mask) {
> si_decompress_image_color_textures(sctx, &sctx->images[i]);
> }
> }
>
> si_check_render_feedback(sctx);
> }
>
> void si_decompress_graphics_textures(struct si_context *sctx)
> {
> si_decompress_textures(sctx, u_bit_consecutive(0, SI_NUM_GRAPHICS_SHADERS));
> diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
> index 6955b9d..3aa2b9d 100644
> --- a/src/gallium/drivers/radeonsi/si_descriptors.c
> +++ b/src/gallium/drivers/radeonsi/si_descriptors.c
> @@ -573,23 +573,23 @@ static bool depth_needs_decompression(struct r600_texture *rtex,
> (!rtex->tc_compatible_htile ||
> !r600_can_sample_zs(rtex, sview->is_stencil_sampler));
> }
>
> static void si_update_compressed_tex_shader_mask(struct si_context *sctx,
> unsigned shader)
> {
> struct si_textures_info *samplers = &sctx->samplers[shader];
> unsigned shader_bit = 1 << shader;
>
> - if (samplers->depth_texture_mask ||
> - samplers->compressed_colortex_mask ||
> - sctx->images[shader].compressed_colortex_mask)
> + if (samplers->needs_depth_decompress_mask ||
> + samplers->needs_color_decompress_mask ||
> + sctx->images[shader].needs_color_decompress_mask)
> sctx->compressed_tex_shader_mask |= shader_bit;
> else
> sctx->compressed_tex_shader_mask &= ~shader_bit;
> }
>
> static void si_set_sampler_views(struct pipe_context *ctx,
> enum pipe_shader_type shader, unsigned start,
> unsigned count,
> struct pipe_sampler_view **views)
> {
> @@ -597,72 +597,72 @@ static void si_set_sampler_views(struct pipe_context *ctx,
> struct si_textures_info *samplers = &sctx->samplers[shader];
> int i;
>
> if (!count || shader >= SI_NUM_SHADERS)
> return;
>
> for (i = 0; i < count; i++) {
> unsigned slot = start + i;
>
> if (!views || !views[i]) {
> - samplers->depth_texture_mask &= ~(1u << slot);
> - samplers->compressed_colortex_mask &= ~(1u << slot);
> + samplers->needs_depth_decompress_mask &= ~(1u << slot);
> + samplers->needs_color_decompress_mask &= ~(1u << slot);
> si_set_sampler_view(sctx, shader, slot, NULL, false);
> continue;
> }
>
> si_set_sampler_view(sctx, shader, slot, views[i], false);
>
> if (views[i]->texture && views[i]->texture->target != PIPE_BUFFER) {
> struct r600_texture *rtex =
> (struct r600_texture*)views[i]->texture;
> struct si_sampler_view *rview = (struct si_sampler_view *)views[i];
>
> if (depth_needs_decompression(rtex, rview)) {
> - samplers->depth_texture_mask |= 1u << slot;
> + samplers->needs_depth_decompress_mask |= 1u << slot;
> } else {
> - samplers->depth_texture_mask &= ~(1u << slot);
> + samplers->needs_depth_decompress_mask &= ~(1u << slot);
> }
> if (color_needs_decompression(rtex)) {
> - samplers->compressed_colortex_mask |= 1u << slot;
> + samplers->needs_color_decompress_mask |= 1u << slot;
> } else {
> - samplers->compressed_colortex_mask &= ~(1u << slot);
> + samplers->needs_color_decompress_mask &= ~(1u << slot);
> }
>
> if (rtex->dcc_offset &&
> p_atomic_read(&rtex->framebuffers_bound))
> sctx->need_check_render_feedback = true;
> } else {
> - samplers->depth_texture_mask &= ~(1u << slot);
> - samplers->compressed_colortex_mask &= ~(1u << slot);
> + samplers->needs_depth_decompress_mask &= ~(1u << slot);
> + samplers->needs_color_decompress_mask &= ~(1u << slot);
> }
> }
>
> si_update_compressed_tex_shader_mask(sctx, shader);
> }
>
> static void
> si_samplers_update_compressed_colortex_mask(struct si_textures_info *samplers)
si_samplers_update_color_decompress_mask(...) ?
Samuel.
> {
> unsigned mask = samplers->views.enabled_mask;
>
> while (mask) {
> int i = u_bit_scan(&mask);
> struct pipe_resource *res = samplers->views.views[i]->texture;
>
> if (res && res->target != PIPE_BUFFER) {
> struct r600_texture *rtex = (struct r600_texture *)res;
>
> if (color_needs_decompression(rtex)) {
> - samplers->compressed_colortex_mask |= 1u << i;
> + samplers->needs_color_decompress_mask |= 1u << i;
> } else {
> - samplers->compressed_colortex_mask &= ~(1u << i);
> + samplers->needs_color_decompress_mask &= ~(1u << i);
> }
> }
> }
> }
>
> /* IMAGE VIEWS */
>
> static void
> si_release_image_views(struct si_images_info *images)
> {
> @@ -695,21 +695,21 @@ si_image_views_begin_new_cs(struct si_context *sctx, struct si_images_info *imag
> static void
> si_disable_shader_image(struct si_context *ctx, unsigned shader, unsigned slot)
> {
> struct si_images_info *images = &ctx->images[shader];
>
> if (images->enabled_mask & (1u << slot)) {
> struct si_descriptors *descs = si_sampler_and_image_descriptors(ctx, shader);
> unsigned desc_slot = si_get_image_slot(slot);
>
> pipe_resource_reference(&images->views[slot].resource, NULL);
> - images->compressed_colortex_mask &= ~(1 << slot);
> + images->needs_color_decompress_mask &= ~(1 << slot);
>
> memcpy(descs->list + desc_slot*8, null_image_descriptor, 8*4);
> images->enabled_mask &= ~(1u << slot);
> /* two 8-byte images share one 16-byte slot */
> descs->dirty_mask |= 1u << (desc_slot / 2);
> ctx->descriptors_dirty |= 1u << si_sampler_and_image_descriptors_idx(shader);
> }
> }
>
> static void
> @@ -749,21 +749,21 @@ static void si_set_shader_image(struct si_context *ctx,
> if (res->b.b.target == PIPE_BUFFER) {
> if (view->access & PIPE_IMAGE_ACCESS_WRITE)
> si_mark_image_range_valid(view);
>
> si_make_buffer_descriptor(screen, res,
> view->format,
> view->u.buf.offset,
> view->u.buf.size, desc);
> si_set_buf_desc_address(res, view->u.buf.offset, desc + 4);
>
> - images->compressed_colortex_mask &= ~(1 << slot);
> + images->needs_color_decompress_mask &= ~(1 << slot);
> res->bind_history |= PIPE_BIND_SHADER_IMAGE;
> } else {
> static const unsigned char swizzle[4] = { 0, 1, 2, 3 };
> struct r600_texture *tex = (struct r600_texture *)res;
> unsigned level = view->u.tex.level;
> unsigned width, height, depth, hw_level;
> bool uses_dcc = vi_dcc_enabled(tex, level);
>
> assert(!tex->is_depth);
> assert(tex->fmask.size == 0);
> @@ -775,23 +775,23 @@ static void si_set_shader_image(struct si_context *ctx,
> * The decompression is relatively cheap if the surface
> * has been decompressed already.
> */
> if (r600_texture_disable_dcc(&ctx->b, tex))
> uses_dcc = false;
> else
> ctx->b.decompress_dcc(&ctx->b.b, tex);
> }
>
> if (color_needs_decompression(tex)) {
> - images->compressed_colortex_mask |= 1 << slot;
> + images->needs_color_decompress_mask |= 1 << slot;
> } else {
> - images->compressed_colortex_mask &= ~(1 << slot);
> + images->needs_color_decompress_mask &= ~(1 << slot);
> }
>
> if (uses_dcc &&
> p_atomic_read(&tex->framebuffers_bound))
> ctx->need_check_render_feedback = true;
>
> if (ctx->b.chip_class >= GFX9) {
> /* Always set the base address. The swizzle modes don't
> * allow setting mipmap level offsets as the base.
> */
> @@ -870,23 +870,23 @@ si_images_update_compressed_colortex_mask(struct si_images_info *images)
> unsigned mask = images->enabled_mask;
>
> while (mask) {
> int i = u_bit_scan(&mask);
> struct pipe_resource *res = images->views[i].resource;
>
> if (res && res->target != PIPE_BUFFER) {
> struct r600_texture *rtex = (struct r600_texture *)res;
>
> if (color_needs_decompression(rtex)) {
> - images->compressed_colortex_mask |= 1 << i;
> + images->needs_color_decompress_mask |= 1 << i;
> } else {
> - images->compressed_colortex_mask &= ~(1 << i);
> + images->needs_color_decompress_mask &= ~(1 << i);
> }
> }
> }
> }
>
> /* SAMPLER STATES */
>
> static void si_bind_sampler_states(struct pipe_context *ctx,
> enum pipe_shader_type shader,
> unsigned start, unsigned count, void **states)
> diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
> index 5559946..b5c7797 100644
> --- a/src/gallium/drivers/radeonsi/si_pipe.h
> +++ b/src/gallium/drivers/radeonsi/si_pipe.h
> @@ -146,27 +146,27 @@ struct si_sampler_state {
> struct si_cs_shader_state {
> struct si_compute *program;
> struct si_compute *emitted_program;
> unsigned offset;
> bool initialized;
> bool uses_scratch;
> };
>
> struct si_textures_info {
> struct si_sampler_views views;
> - uint32_t depth_texture_mask; /* which textures are depth */
> - uint32_t compressed_colortex_mask;
> + uint32_t needs_depth_decompress_mask;
> + uint32_t needs_color_decompress_mask;
> };
>
> struct si_images_info {
> struct pipe_image_view views[SI_NUM_IMAGES];
> - uint32_t compressed_colortex_mask;
> + uint32_t needs_color_decompress_mask;
> unsigned enabled_mask;
> };
>
> struct si_framebuffer {
> struct r600_atom atom;
> struct pipe_framebuffer_state state;
> unsigned nr_samples;
> unsigned log_samples;
> unsigned compressed_cb_mask;
> unsigned colorbuf_enabled_4bit;
>
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