[Mesa-dev] [PATCH 13/16] gallivm: relax assert() to support uniform packing
Timothy Arceri
tarceri at itsqueeze.com
Tue Jun 20 01:50:42 UTC 2017
For uniform packing we multiply the const buffer index by its componets
in the st rather than in the backend.
---
src/gallium/auxiliary/gallivm/lp_bld_tgsi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi.c b/src/gallium/auxiliary/gallivm/lp_bld_tgsi.c
index 69863ab..f9d02ed 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_tgsi.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_tgsi.c
@@ -335,21 +335,21 @@ lp_build_emit_fetch_src(
if (chan_index == LP_CHAN_ALL) {
swizzle = ~0u;
} else {
swizzle = tgsi_util_get_full_src_register_swizzle(reg, chan_index);
if (swizzle > 3) {
assert(0 && "invalid swizzle in emit_fetch()");
return bld_base->base.undef;
}
}
- assert(reg->Register.Index <= bld_base->info->file_max[reg->Register.File]);
+ assert(reg->Register.Index <= bld_base->info->file_max[reg->Register.File] * 4);
if (bld_base->emit_fetch_funcs[reg->Register.File]) {
res = bld_base->emit_fetch_funcs[reg->Register.File](bld_base, reg, stype,
swizzle);
} else {
assert(0 && "invalid src register in emit_fetch()");
return bld_base->base.undef;
}
if (reg->Register.Absolute) {
--
2.9.4
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