[Mesa-dev] [PATCH] intel: compiler/i965: fix is_broxton checks
Ian Romanick
idr at freedesktop.org
Tue Jun 20 17:54:34 UTC 2017
On 06/20/2017 10:37 AM, Lionel Landwerlin wrote:
> On 20/06/17 18:05, Ian Romanick wrote:
>> On 06/20/2017 05:23 AM, Lionel Landwerlin wrote:
>>> In 5f2fe9302c is_geminilake was introduced for the differenciate
>>> broxton from geminilake. Unfortunately I failed as verifying that
>>> is_broxton is throughout the code base to mean Gen9lp.
>> It looks like this replaces every instances of devinfo->is_broxton. Why
>> not just s/devinfo->is_broxton/devinfo->gen9lp/g and change the way the
>> field is set? This is effectively what the change to brw_context.c does
>> to brw_context::is_broxton.
>
> For the perf query extension there is a need to know exactly what
> platform this is.
> So I can add a gen9lp field as well as is_bxt/glk, up to your liking :)
If future work will need them separate, then I think it's fine as-is.
>>> Fixes: 5f2fe9302c ("intel: common: add flag to identify platforms by
>>> name")
>>> Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
>>> ---
>>> src/intel/common/gen_device_info.h | 3 +++
>>> src/intel/common/gen_l3_config.c | 2 +-
>>> src/intel/compiler/brw_fs.cpp | 2 +-
>>> src/intel/compiler/brw_fs_nir.cpp | 4 ++--
>>> src/intel/compiler/brw_vec4.cpp | 2 +-
>>> src/intel/isl/isl_format.c | 4 ++--
>>> src/mesa/drivers/dri/i965/brw_context.c | 2 +-
>>> 7 files changed, 11 insertions(+), 8 deletions(-)
>>>
>>> diff --git a/src/intel/common/gen_device_info.h
>>> b/src/intel/common/gen_device_info.h
>>> index 920a3365025..cc83857b759 100644
>>> --- a/src/intel/common/gen_device_info.h
>>> +++ b/src/intel/common/gen_device_info.h
>>> @@ -186,6 +186,9 @@ struct gen_device_info
>>> /** @} */
>>> };
>>> +#define gen_device_info_is_9lp(devinfo) \
>>> + (devinfo->is_broxton || devinfo->is_geminilake)
>>> +
>>> bool gen_get_device_info(int devid, struct gen_device_info *devinfo);
>>> const char *gen_get_device_name(int devid);
>>> diff --git a/src/intel/common/gen_l3_config.c
>>> b/src/intel/common/gen_l3_config.c
>>> index ae31d08bdf3..639690405c5 100644
>>> --- a/src/intel/common/gen_l3_config.c
>>> +++ b/src/intel/common/gen_l3_config.c
>>> @@ -257,7 +257,7 @@ get_l3_way_size(const struct gen_device_info
>>> *devinfo)
>>> {
>>> assert(devinfo->l3_banks);
>>> - if (devinfo->is_broxton)
>>> + if (gen_device_info_is_9lp(devinfo))
>>> return 4;
>>> return 2 * devinfo->l3_banks;
>>> diff --git a/src/intel/compiler/brw_fs.cpp
>>> b/src/intel/compiler/brw_fs.cpp
>>> index 90a650add07..43b6e342043 100644
>>> --- a/src/intel/compiler/brw_fs.cpp
>>> +++ b/src/intel/compiler/brw_fs.cpp
>>> @@ -3348,7 +3348,7 @@ fs_visitor::lower_integer_multiplication()
>>> * operation directly, but CHV/BXT cannot.
>>> */
>>> if (devinfo->gen >= 8 &&
>>> - !devinfo->is_cherryview && !devinfo->is_broxton)
>>> + !devinfo->is_cherryview &&
>>> !gen_device_info_is_9lp(devinfo))
>>> continue;
>>> if (inst->src[1].file == IMM &&
>>> diff --git a/src/intel/compiler/brw_fs_nir.cpp
>>> b/src/intel/compiler/brw_fs_nir.cpp
>>> index 876b1030ec0..a9dce42c38d 100644
>>> --- a/src/intel/compiler/brw_fs_nir.cpp
>>> +++ b/src/intel/compiler/brw_fs_nir.cpp
>>> @@ -639,7 +639,7 @@ fs_visitor::nir_emit_alu(const fs_builder &bld,
>>> nir_alu_instr *instr)
>>> */
>>> if (nir_dest_bit_size(instr->dest.dest) == 64 &&
>>> nir_src_bit_size(instr->src[0].src) == 32 &&
>>> - (devinfo->is_cherryview || devinfo->is_broxton)) {
>>> + (devinfo->is_cherryview ||
>>> gen_device_info_is_9lp(devinfo))) {
>>> fs_reg tmp = bld.vgrf(result.type, 1);
>>> tmp = subscript(tmp, op[0].type, 0);
>>> inst = bld.MOV(tmp, op[0]);
>>> @@ -3748,7 +3748,7 @@ fs_visitor::nir_emit_intrinsic(const fs_builder
>>> &bld, nir_intrinsic_instr *instr
>>> (instr->num_components - 1) * type_sz(dest.type);
>>> bool supports_64bit_indirects =
>>> - !devinfo->is_cherryview && !devinfo->is_broxton;
>>> + !devinfo->is_cherryview &&
>>> !gen_device_info_is_9lp(devinfo);
>>> if (type_sz(dest.type) != 8 || supports_64bit_indirects) {
>>> for (unsigned j = 0; j < instr->num_components; j++) {
>>> diff --git a/src/intel/compiler/brw_vec4.cpp
>>> b/src/intel/compiler/brw_vec4.cpp
>>> index b443effca9a..3de7d931dde 100644
>>> --- a/src/intel/compiler/brw_vec4.cpp
>>> +++ b/src/intel/compiler/brw_vec4.cpp
>>> @@ -985,7 +985,7 @@ vec4_visitor::is_dep_ctrl_unsafe(const
>>> vec4_instruction *inst)
>>> * affected, at least by the 64b restriction, since DepCtrl with
>>> double
>>> * precision instructions seems to produce GPU hangs in some cases.
>>> */
>>> - if (devinfo->gen == 8 || devinfo->is_broxton) {
>>> + if (devinfo->gen == 8 || gen_device_info_is_9lp(devinfo)) {
>>> if (inst->opcode == BRW_OPCODE_MUL &&
>>> IS_DWORD(inst->src[0]) &&
>>> IS_DWORD(inst->src[1]))
>>> diff --git a/src/intel/isl/isl_format.c b/src/intel/isl/isl_format.c
>>> index 31c74bd5f0f..a9f9c6be73a 100644
>>> --- a/src/intel/isl/isl_format.c
>>> +++ b/src/intel/isl/isl_format.c
>>> @@ -406,7 +406,7 @@ isl_format_supports_sampling(const struct
>>> gen_device_info *devinfo,
>>> */
>>> if (fmtl->txc == ISL_TXC_ASTC)
>>> return format < ISL_FORMAT_ASTC_HDR_2D_4X4_FLT16;
>>> - } else if (devinfo->is_broxton) {
>>> + } else if (gen_device_info_is_9lp(devinfo)) {
>>> const struct isl_format_layout *fmtl =
>>> isl_format_get_layout(format);
>>> /* Support for ASTC HDR exists on Broxton even though big-core
>>> * GPUs didn't get it until Cannonlake.
>>> @@ -439,7 +439,7 @@ isl_format_supports_filtering(const struct
>>> gen_device_info *devinfo,
>>> */
>>> if (fmtl->txc == ISL_TXC_ASTC)
>>> return format < ISL_FORMAT_ASTC_HDR_2D_4X4_FLT16;
>>> - } else if (devinfo->is_broxton) {
>>> + } else if (gen_device_info_is_9lp(devinfo)) {
>>> const struct isl_format_layout *fmtl =
>>> isl_format_get_layout(format);
>>> /* Support for ASTC HDR exists on Broxton even though big-core
>>> * GPUs didn't get it until Cannonlake.
>>> diff --git a/src/mesa/drivers/dri/i965/brw_context.c
>>> b/src/mesa/drivers/dri/i965/brw_context.c
>>> index 157d8550de6..05b0d8d04ec 100644
>>> --- a/src/mesa/drivers/dri/i965/brw_context.c
>>> +++ b/src/mesa/drivers/dri/i965/brw_context.c
>>> @@ -945,7 +945,7 @@ brwCreateContext(gl_api api,
>>> brw->is_baytrail = devinfo->is_baytrail;
>>> brw->is_haswell = devinfo->is_haswell;
>>> brw->is_cherryview = devinfo->is_cherryview;
>>> - brw->is_broxton = devinfo->is_broxton;
>>> + brw->is_broxton = devinfo->is_broxton || devinfo->is_geminilake;
>>> brw->has_llc = devinfo->has_llc;
>>> brw->has_hiz = devinfo->has_hiz_and_separate_stencil;
>>> brw->has_separate_stencil = devinfo->has_hiz_and_separate_stencil;
>>>
>>
>
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