[Mesa-dev] [PATCH v3 3/3] i965/i915: Add UYVY as the supported format
Kristian H. Kristensen
krh at bitplanet.net
Wed Jun 21 19:09:35 UTC 2017
Johnson Lin <johnson.lin at intel.com> writes:
> Trigger the correct sampler options for it. Similar with YUYV
> ---
> src/intel/compiler/brw_compiler.h | 1 +
> src/intel/compiler/brw_nir.c | 1 +
> src/mesa/drivers/dri/i915/intel_screen.c | 9 ++++++---
> src/mesa/drivers/dri/i965/brw_wm.c | 7 +++++++
> src/mesa/drivers/dri/i965/intel_screen.c | 9 ++++++---
> 5 files changed, 21 insertions(+), 6 deletions(-)
>
> diff --git a/src/intel/compiler/brw_compiler.h b/src/intel/compiler/brw_compiler.h
> index 78873744ce5f..3f383403883c 100644
> --- a/src/intel/compiler/brw_compiler.h
> +++ b/src/intel/compiler/brw_compiler.h
> @@ -168,6 +168,7 @@ struct brw_sampler_prog_key_data {
> uint32_t y_u_v_image_mask;
> uint32_t y_uv_image_mask;
> uint32_t yx_xuxv_image_mask;
> + uint32_t xy_uxvx_image_mask;
> };
>
> /**
> diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c
> index de8f519b4e10..49d3cf365647 100644
> --- a/src/intel/compiler/brw_nir.c
> +++ b/src/intel/compiler/brw_nir.c
> @@ -770,6 +770,7 @@ brw_nir_apply_sampler_key(nir_shader *nir,
> tex_options.lower_y_uv_external = key_tex->y_uv_image_mask;
> tex_options.lower_y_u_v_external = key_tex->y_u_v_image_mask;
> tex_options.lower_yx_xuxv_external = key_tex->yx_xuxv_image_mask;
> + tex_options.lower_xy_uxvx_external = key_tex->xy_uxvx_image_mask;
>
> if (nir_lower_tex(nir, &tex_options)) {
> nir_validate_shader(nir);
> diff --git a/src/mesa/drivers/dri/i915/intel_screen.c b/src/mesa/drivers/dri/i915/intel_screen.c
> index cba5434b5e1b..a81c7eb07d6a 100644
> --- a/src/mesa/drivers/dri/i915/intel_screen.c
> +++ b/src/mesa/drivers/dri/i915/intel_screen.c
> @@ -227,17 +227,20 @@ static struct intel_image_format intel_image_formats[] = {
> { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
> { 1, 1, 0, __DRI_IMAGE_FORMAT_GR88, 2 } } },
>
> - /* For YUYV buffers, we set up two overlapping DRI images and treat
> + /* For YUYV&UYVY buffers, we set up two overlapping DRI images and treat
Spaces around the '&', but just write out 'and' instead.
> * them as planar buffers in the compositors. Plane 0 is GR88 and
> * samples YU or YV pairs and places Y into the R component, while
> - * plane 1 is ARGB and samples YUYV clusters and places pairs and
> + * plane 1 is ARGB and samples YUYV/UYVY clusters and places pairs and
> * places U into the G component and V into A. This lets the
> * texture sampler interpolate the Y components correctly when
> * sampling from plane 0, and interpolate U and V correctly when
> * sampling from plane 1. */
> { __DRI_IMAGE_FOURCC_YUYV, __DRI_IMAGE_COMPONENTS_Y_XUXV, 2,
> { { 0, 0, 0, __DRI_IMAGE_FORMAT_GR88, 2 },
> - { 0, 1, 0, __DRI_IMAGE_FORMAT_ARGB8888, 4 } } }
> + { 0, 1, 0, __DRI_IMAGE_FORMAT_ARGB8888, 4 } } },
> + { __DRI_IMAGE_FOURCC_UYVY, __DRI_IMAGE_COMPONENTS_Y_UXVX, 2,
> + { { 0, 0, 0, __DRI_IMAGE_FORMAT_GR88, 2 },
> + { 0, 1, 0, __DRI_IMAGE_FORMAT_ABGR8888, 4 } } }
> };
>
> static __DRIimage *
> diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c
> index 0f075a11f756..a8ec1f5c2368 100644
> --- a/src/mesa/drivers/dri/i965/brw_wm.c
> +++ b/src/mesa/drivers/dri/i965/brw_wm.c
> @@ -270,6 +270,10 @@ brw_debug_recompile_sampler_key(struct brw_context *brw,
> found |= key_debug(brw, "yx_xuxv image bound",
> old_key->yx_xuxv_image_mask,
> key->yx_xuxv_image_mask);
> + found |= key_debug(brw, "xy_uxvx image bound",
> + old_key->xy_uxvx_image_mask,
> + key->xy_uxvx_image_mask);
> +
>
> for (unsigned int i = 0; i < MAX_SAMPLERS; i++) {
> found |= key_debug(brw, "textureGather workarounds",
> @@ -412,6 +416,9 @@ brw_populate_sampler_prog_key_data(struct gl_context *ctx,
> case __DRI_IMAGE_COMPONENTS_Y_XUXV:
> key->yx_xuxv_image_mask |= 1 << s;
> break;
> + case __DRI_IMAGE_COMPONENTS_Y_UXVX:
> + key->xy_uxvx_image_mask |= 1 << s;
> + break;
> default:
> break;
> }
> diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c
> index 83b8a24509a4..4ffedf1cc07f 100644
> --- a/src/mesa/drivers/dri/i965/intel_screen.c
> +++ b/src/mesa/drivers/dri/i965/intel_screen.c
> @@ -278,17 +278,20 @@ static struct intel_image_format intel_image_formats[] = {
> { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
> { 1, 1, 0, __DRI_IMAGE_FORMAT_GR88, 2 } } },
>
> - /* For YUYV buffers, we set up two overlapping DRI images and treat
> + /* For YUYV&UYVY buffers, we set up two overlapping DRI images and treat
Same here.
> * them as planar buffers in the compositors. Plane 0 is GR88 and
> * samples YU or YV pairs and places Y into the R component, while
> - * plane 1 is ARGB and samples YUYV clusters and places pairs and
> + * plane 1 is ARGB and samples YUYV/UYVY clusters and places pairs and
> * places U into the G component and V into A. This lets the
> * texture sampler interpolate the Y components correctly when
> * sampling from plane 0, and interpolate U and V correctly when
> * sampling from plane 1. */
> { __DRI_IMAGE_FOURCC_YUYV, __DRI_IMAGE_COMPONENTS_Y_XUXV, 2,
> { { 0, 0, 0, __DRI_IMAGE_FORMAT_GR88, 2 },
> - { 0, 1, 0, __DRI_IMAGE_FORMAT_ARGB8888, 4 } } }
> + { 0, 1, 0, __DRI_IMAGE_FORMAT_ARGB8888, 4 } } },
> + { __DRI_IMAGE_FOURCC_UYVY, __DRI_IMAGE_COMPONENTS_Y_UXVX, 2,
> + { { 0, 0, 0, __DRI_IMAGE_FORMAT_GR88, 2 },
> + { 0, 1, 0, __DRI_IMAGE_FORMAT_ABGR8888, 4 } } }
> };
>
> static const struct {
> --
> 1.9.1
>
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