[Mesa-dev] [PATCH 65/92] radeonsi/nir: add image descriptor loading

[Nicolai Hähnle]

From: Nicolai Hähnle <nicolai.haehnle at amd.com>

---
 src/gallium/drivers/radeonsi/si_shader_internal.h |  3 +++
 src/gallium/drivers/radeonsi/si_shader_nir.c      | 15 +++++++++++++++
 src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c | 22 ++++++++++++++--------
 3 files changed, 32 insertions(+), 8 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_shader_internal.h b/src/gallium/drivers/radeonsi/si_shader_internal.h
index e1212be..feaa82d 100644
--- a/src/gallium/drivers/radeonsi/si_shader_internal.h
+++ b/src/gallium/drivers/radeonsi/si_shader_internal.h
@@ -309,20 +309,23 @@ LLVMValueRef si_get_bounded_indirect_index(struct si_shader_context *ctx,
 					   int rel_index, unsigned num);
 
 LLVMTypeRef si_const_array(LLVMTypeRef elem_type, int num_elements);
 
 void si_shader_context_init_alu(struct lp_build_tgsi_context *bld_base);
 void si_shader_context_init_mem(struct si_shader_context *ctx);
 
 LLVMValueRef si_load_sampler_desc(struct si_shader_context *ctx,
 				  LLVMValueRef list, LLVMValueRef index,
 				  enum ac_descriptor_type type);
+LLVMValueRef si_load_image_desc(struct si_shader_context *ctx,
+				LLVMValueRef list, LLVMValueRef index,
+				enum ac_descriptor_type desc_type, bool dcc_off);
 
 void si_llvm_load_input_vs(
 	struct si_shader_context *ctx,
 	unsigned input_index,
 	LLVMValueRef out[4]);
 void si_llvm_load_input_fs(
 	struct si_shader_context *ctx,
 	unsigned input_index,
 	LLVMValueRef out[4]);
 
diff --git a/src/gallium/drivers/radeonsi/si_shader_nir.c b/src/gallium/drivers/radeonsi/si_shader_nir.c
index 9ad68f4..f02abab 100644
--- a/src/gallium/drivers/radeonsi/si_shader_nir.c
+++ b/src/gallium/drivers/radeonsi/si_shader_nir.c
@@ -356,20 +356,35 @@ si_nir_load_sampler_desc(struct ac_shader_abi *abi,
 
 	assert(!descriptor_set);
 
 	if (!index)
 		index = ctx->ac.i32_0;
 
 	index = LLVMBuildAdd(builder, index,
 			     LLVMConstInt(ctx->ac.i32, base_index + constant_index, false),
 			     "");
 
+	if (image) {
+		assert(desc_type == AC_DESC_IMAGE || desc_type == AC_DESC_BUFFER);
+		assert(base_index + constant_index < ctx->num_images);
+
+		if (dynamic_index)
+			index = si_llvm_bound_index(ctx, index, ctx->num_images);
+
+		index = LLVMBuildSub(ctx->gallivm.builder,
+				     LLVMConstInt(ctx->i32, SI_NUM_IMAGES - 1, 0),
+				     index, "");
+
+		/* TODO: be smarter about when we use dcc_off */
+		return si_load_image_desc(ctx, list, index, desc_type, write);
+	}
+
 	assert(base_index + constant_index < ctx->num_samplers);
 
 	if (dynamic_index)
 		index = si_llvm_bound_index(ctx, index, ctx->num_samplers);
 
 	index = LLVMBuildAdd(ctx->gallivm.builder, index,
 			     LLVMConstInt(ctx->i32, SI_NUM_IMAGES / 2, 0), "");
 
 	return si_load_sampler_desc(ctx, list, index, desc_type);
 }
diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
index dc69cbe..3dac14d 100644
--- a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
+++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
@@ -143,36 +143,42 @@ static LLVMValueRef force_dcc_off(struct si_shader_context *ctx,
 		LLVMValueRef i32_6 = LLVMConstInt(ctx->i32, 6, 0);
 		LLVMValueRef i32_C = LLVMConstInt(ctx->i32, C_008F28_COMPRESSION_EN, 0);
 		LLVMValueRef tmp;
 
 		tmp = LLVMBuildExtractElement(builder, rsrc, i32_6, "");
 		tmp = LLVMBuildAnd(builder, tmp, i32_C, "");
 		return LLVMBuildInsertElement(builder, rsrc, tmp, i32_6, "");
 	}
 }
 
-static LLVMValueRef load_image_desc(struct si_shader_context *ctx,
-				    LLVMValueRef list, LLVMValueRef index,
-				    unsigned target)
+LLVMValueRef si_load_image_desc(struct si_shader_context *ctx,
+				LLVMValueRef list, LLVMValueRef index,
+				enum ac_descriptor_type desc_type, bool dcc_off)
 {
 	LLVMBuilderRef builder = ctx->gallivm.builder;
+	LLVMValueRef rsrc;
 
-	if (target == TGSI_TEXTURE_BUFFER) {
+	if (desc_type == AC_DESC_BUFFER) {
 		index = LLVMBuildMul(builder, index,
 				     LLVMConstInt(ctx->i32, 2, 0), "");
 		index = LLVMBuildAdd(builder, index,
 				     ctx->i32_1, "");
 		list = LLVMBuildPointerCast(builder, list,
 					    si_const_array(ctx->v4i32, 0), "");
+	} else {
+		assert(desc_type == AC_DESC_IMAGE);
 	}
 
-	return ac_build_indexed_load_const(&ctx->ac, list, index);
+	rsrc = ac_build_indexed_load_const(&ctx->ac, list, index);
+	if (dcc_off)
+		rsrc = force_dcc_off(ctx, rsrc);
+	return rsrc;
 }
 
 /**
  * Load the resource descriptor for \p image.
  */
 static void
 image_fetch_rsrc(
 	struct lp_build_tgsi_context *bld_base,
 	const struct tgsi_full_src_register *image,
 	bool is_store, unsigned target,
@@ -217,23 +223,23 @@ image_fetch_rsrc(
 		LLVMBuilderRef builder = gallivm->builder;
 
 		LLVMValueRef ptr =
 			lp_build_emit_fetch_src(bld_base, image,
 						TGSI_TYPE_UNSIGNED64, 0);
 		rsrc_ptr = LLVMBuildIntToPtr(builder, ptr,
 					     si_const_array(ctx->v8i32, 0), "");
 		index = LLVMConstInt(ctx->i32, 0, 0);
 	}
 
-	*rsrc = load_image_desc(ctx, rsrc_ptr, index, target);
-	if (dcc_off && target != TGSI_TEXTURE_BUFFER)
-		*rsrc = force_dcc_off(ctx, *rsrc);
+	*rsrc = si_load_image_desc(ctx, rsrc_ptr, index,
+				   target == TGSI_TEXTURE_BUFFER ? AC_DESC_BUFFER : AC_DESC_IMAGE,
+				   dcc_off);
 }
 
 static LLVMValueRef image_fetch_coords(
 		struct lp_build_tgsi_context *bld_base,
 		const struct tgsi_full_instruction *inst,
 		unsigned src, LLVMValueRef desc)
 {
 	struct si_shader_context *ctx = si_shader_context(bld_base);
 	struct gallivm_state *gallivm = &ctx->gallivm;
 	LLVMBuilderRef builder = gallivm->builder;
-- 
2.9.3