[Mesa-dev] [RFC 05/11] glsl: Add "built-in" functions to do lt(fp64, fp64)
Elie Tournier
tournier.elie at gmail.com
Fri Mar 3 16:23:01 UTC 2017
Signed-off-by: Elie Tournier <elie.tournier at collabora.com>
---
src/compiler/glsl/builtin_float64.h | 161 ++++++++++++++++++++++++++++++++
src/compiler/glsl/builtin_functions.cpp | 4 +
src/compiler/glsl/builtin_functions.h | 3 +
src/compiler/glsl/float64.glsl | 45 +++++++++
4 files changed, 213 insertions(+)
diff --git a/src/compiler/glsl/builtin_float64.h b/src/compiler/glsl/builtin_float64.h
index f8ceacdabf..e825536466 100644
--- a/src/compiler/glsl/builtin_float64.h
+++ b/src/compiler/glsl/builtin_float64.h
@@ -334,3 +334,164 @@ fle64(void *mem_ctx, builtin_available_predicate avail)
sig->replace_parameters(&sig_parameters);
return sig;
}
+ir_function_signature *
+lt64(void *mem_ctx, builtin_available_predicate avail)
+{
+ ir_function_signature *const sig =
+ new(mem_ctx) ir_function_signature(glsl_type::bool_type, avail);
+ ir_factory body(&sig->body, mem_ctx);
+ sig->is_defined = true;
+
+ exec_list sig_parameters;
+
+ ir_variable *const r0060 = new(mem_ctx) ir_variable(glsl_type::uint_type, "a0", ir_var_function_in);
+ sig_parameters.push_tail(r0060);
+ ir_variable *const r0061 = new(mem_ctx) ir_variable(glsl_type::uint_type, "a1", ir_var_function_in);
+ sig_parameters.push_tail(r0061);
+ ir_variable *const r0062 = new(mem_ctx) ir_variable(glsl_type::uint_type, "b0", ir_var_function_in);
+ sig_parameters.push_tail(r0062);
+ ir_variable *const r0063 = new(mem_ctx) ir_variable(glsl_type::uint_type, "b1", ir_var_function_in);
+ sig_parameters.push_tail(r0063);
+ ir_expression *const r0064 = less(r0060, r0062);
+ ir_expression *const r0065 = equal(r0060, r0062);
+ ir_expression *const r0066 = less(r0061, r0063);
+ ir_expression *const r0067 = logic_and(r0065, r0066);
+ ir_expression *const r0068 = logic_or(r0064, r0067);
+ body.emit(ret(r0068));
+
+ sig->replace_parameters(&sig_parameters);
+ return sig;
+}
+ir_function_signature *
+flt64(void *mem_ctx, builtin_available_predicate avail)
+{
+ ir_function_signature *const sig =
+ new(mem_ctx) ir_function_signature(glsl_type::bool_type, avail);
+ ir_factory body(&sig->body, mem_ctx);
+ sig->is_defined = true;
+
+ exec_list sig_parameters;
+
+ ir_variable *const r0069 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "a", ir_var_function_in);
+ sig_parameters.push_tail(r0069);
+ ir_variable *const r006A = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "b", ir_var_function_in);
+ sig_parameters.push_tail(r006A);
+ ir_variable *const r006B = body.make_temp(glsl_type::bool_type, "return_value");
+ ir_variable *const r006C = new(mem_ctx) ir_variable(glsl_type::bool_type, "isbNaN", ir_var_auto);
+ body.emit(r006C);
+ ir_variable *const r006D = new(mem_ctx) ir_variable(glsl_type::bool_type, "isaNaN", ir_var_auto);
+ body.emit(r006D);
+ ir_variable *const r006E = body.make_temp(glsl_type::uvec2_type, "vec_ctor");
+ body.emit(assign(r006E, bit_and(swizzle_x(r0069), body.constant(1048575u)), 0x01));
+
+ body.emit(assign(r006E, swizzle_y(r0069), 0x02));
+
+ ir_variable *const r006F = body.make_temp(glsl_type::uvec2_type, "vec_ctor");
+ body.emit(assign(r006F, bit_and(swizzle_x(r006A), body.constant(1048575u)), 0x01));
+
+ body.emit(assign(r006F, swizzle_y(r006A), 0x02));
+
+ ir_expression *const r0070 = rshift(swizzle_x(r0069), body.constant(int(20)));
+ ir_expression *const r0071 = bit_and(r0070, body.constant(2047u));
+ ir_expression *const r0072 = equal(r0071, body.constant(2047u));
+ ir_expression *const r0073 = bit_or(swizzle_x(r006E), swizzle_y(r0069));
+ ir_expression *const r0074 = nequal(r0073, body.constant(0u));
+ body.emit(assign(r006D, logic_and(r0072, r0074), 0x01));
+
+ ir_expression *const r0075 = rshift(swizzle_x(r006A), body.constant(int(20)));
+ ir_expression *const r0076 = bit_and(r0075, body.constant(2047u));
+ ir_expression *const r0077 = equal(r0076, body.constant(2047u));
+ ir_expression *const r0078 = bit_or(swizzle_x(r006F), swizzle_y(r006A));
+ ir_expression *const r0079 = nequal(r0078, body.constant(0u));
+ body.emit(assign(r006C, logic_and(r0077, r0079), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r007B = logic_or(r006D, r006C);
+ ir_if *f007A = new(mem_ctx) ir_if(operand(r007B).val);
+ exec_list *const f007A_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f007A->then_instructions;
+
+ body.emit(assign(r006B, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f007A->else_instructions;
+
+ ir_variable *const r007C = body.make_temp(glsl_type::uint_type, "extractFloat64Sign_retval");
+ body.emit(assign(r007C, rshift(swizzle_x(r0069), body.constant(int(31))), 0x01));
+
+ ir_variable *const r007D = body.make_temp(glsl_type::uint_type, "extractFloat64Sign_retval");
+ body.emit(assign(r007D, rshift(swizzle_x(r006A), body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r007F = nequal(r007C, r007D);
+ ir_if *f007E = new(mem_ctx) ir_if(operand(r007F).val);
+ exec_list *const f007E_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f007E->then_instructions;
+
+ ir_expression *const r0080 = nequal(r007C, body.constant(0u));
+ ir_expression *const r0081 = bit_or(swizzle_x(r0069), swizzle_x(r006A));
+ ir_expression *const r0082 = lshift(r0081, body.constant(int(1)));
+ ir_expression *const r0083 = bit_or(r0082, swizzle_y(r0069));
+ ir_expression *const r0084 = bit_or(r0083, swizzle_y(r006A));
+ ir_expression *const r0085 = nequal(r0084, body.constant(0u));
+ body.emit(assign(r006B, logic_and(r0080, r0085), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f007E->else_instructions;
+
+ ir_variable *const r0086 = body.make_temp(glsl_type::bool_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0088 = nequal(r007C, body.constant(0u));
+ ir_if *f0087 = new(mem_ctx) ir_if(operand(r0088).val);
+ exec_list *const f0087_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0087->then_instructions;
+
+ ir_expression *const r0089 = less(swizzle_x(r006A), swizzle_x(r0069));
+ ir_expression *const r008A = equal(swizzle_x(r006A), swizzle_x(r0069));
+ ir_expression *const r008B = less(swizzle_y(r006A), swizzle_y(r0069));
+ ir_expression *const r008C = logic_and(r008A, r008B);
+ body.emit(assign(r0086, logic_or(r0089, r008C), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0087->else_instructions;
+
+ ir_expression *const r008D = less(swizzle_x(r0069), swizzle_x(r006A));
+ ir_expression *const r008E = equal(swizzle_x(r0069), swizzle_x(r006A));
+ ir_expression *const r008F = less(swizzle_y(r0069), swizzle_y(r006A));
+ ir_expression *const r0090 = logic_and(r008E, r008F);
+ body.emit(assign(r0086, logic_or(r008D, r0090), 0x01));
+
+
+ body.instructions = f0087_parent_instructions;
+ body.emit(f0087);
+
+ /* END IF */
+
+ body.emit(assign(r006B, r0086, 0x01));
+
+
+ body.instructions = f007E_parent_instructions;
+ body.emit(f007E);
+
+ /* END IF */
+
+
+ body.instructions = f007A_parent_instructions;
+ body.emit(f007A);
+
+ /* END IF */
+
+ body.emit(ret(r006B));
+
+ sig->replace_parameters(&sig_parameters);
+ return sig;
+}
diff --git a/src/compiler/glsl/builtin_functions.cpp b/src/compiler/glsl/builtin_functions.cpp
index 65ccf3725f..03c92f5249 100644
--- a/src/compiler/glsl/builtin_functions.cpp
+++ b/src/compiler/glsl/builtin_functions.cpp
@@ -3145,6 +3145,10 @@ builtin_builder::create_builtins()
generate_ir::fle64(mem_ctx, integer_functions_supported),
NULL);
+ add_function("__builtin_flt64",
+ generate_ir::flt64(mem_ctx, integer_functions_supported),
+ NULL);
+
#undef F
#undef FI
#undef FIUD_VEC
diff --git a/src/compiler/glsl/builtin_functions.h b/src/compiler/glsl/builtin_functions.h
index e8b1ea0d79..0c440604b3 100644
--- a/src/compiler/glsl/builtin_functions.h
+++ b/src/compiler/glsl/builtin_functions.h
@@ -75,6 +75,9 @@ feq64(void *mem_ctx, builtin_available_predicate avail);
ir_function_signature *
fle64(void *mem_ctx, builtin_available_predicate avail);
+ir_function_signature *
+flt64(void *mem_ctx, builtin_available_predicate avail);
+
}
#endif /* BULITIN_FUNCTIONS_H */
diff --git a/src/compiler/glsl/float64.glsl b/src/compiler/glsl/float64.glsl
index db86546f49..c92947e91b 100644
--- a/src/compiler/glsl/float64.glsl
+++ b/src/compiler/glsl/float64.glsl
@@ -129,3 +129,48 @@ fle64( uvec2 a, uvec2 b )
return ( aSign != 0u ) ? le64( b.x, b.y, a.x, a.y )
: le64( a.x, a.y, b.x, b.y );
}
+
+/* Returns true if the 64-bit value formed by concatenating `a0' and `a1' is less
+ * than the 64-bit value formed by concatenating `b0' and `b1'. Otherwise,
+ * returns false.
+ */
+bool
+lt64( uint a0, uint a1, uint b0, uint b1 )
+{
+ return ( a0 < b0 ) || ( ( a0 == b0 ) && ( a1 < b1 ) );
+}
+
+/* Returns true if the double-precision floating-point value `a' is less than
+ * the corresponding value `b', and false otherwise. The comparison is performed
+ * according to the IEEE Standard for Floating-Point Arithmetic.
+ */
+bool
+flt64( uvec2 a, uvec2 b )
+{
+ uint aSign;
+ uint bSign;
+ uvec2 aFrac;
+ uvec2 bFrac;
+ bool isaNaN;
+ bool isbNaN;
+
+ aFrac = extractFloat64Frac( a );
+ bFrac = extractFloat64Frac( b );
+ isaNaN = ( extractFloat64Exp( a ) == 0x7FFu ) &&
+ ( ( aFrac.x | aFrac.y ) != 0u );
+ isbNaN = ( extractFloat64Exp( b ) == 0x7FFu ) &&
+ ( ( bFrac.x | bFrac.y ) != 0u );
+
+ if ( isaNaN || isbNaN ) {
+ return false;
+ }
+
+ aSign = extractFloat64Sign( a );
+ bSign = extractFloat64Sign( b );
+ if( aSign != bSign ) {
+ return ( aSign != 0u ) &&
+ ( ( ( ( ( a.x | b.x )<<1 ) ) | a.y | b.y ) != 0u );
+ }
+ return ( aSign != 0u ) ? lt64( b.x, b.y, a.x, a.y )
+ : lt64( a.x, a.y, b.x, b.y );
+}
--
2.11.0
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