[Mesa-dev] [RFC 06/11] glsl: Add "built-in" functions to do add(fp64, fp64)
Elie Tournier
tournier.elie at gmail.com
Fri Mar 3 16:23:02 UTC 2017
Signed-off-by: Elie Tournier <elie.tournier at collabora.com>
---
src/compiler/glsl/builtin_float64.h | 16956 ++++++++++++++++++++++++++++++
src/compiler/glsl/builtin_functions.cpp | 4 +
src/compiler/glsl/builtin_functions.h | 3 +
src/compiler/glsl/float64.glsl | 574 +
4 files changed, 17537 insertions(+)
diff --git a/src/compiler/glsl/builtin_float64.h b/src/compiler/glsl/builtin_float64.h
index e825536466..bf0953e5d6 100644
--- a/src/compiler/glsl/builtin_float64.h
+++ b/src/compiler/glsl/builtin_float64.h
@@ -495,3 +495,16959 @@ flt64(void *mem_ctx, builtin_available_predicate avail)
sig->replace_parameters(&sig_parameters);
return sig;
}
+ir_function_signature *
+add64(void *mem_ctx, builtin_available_predicate avail)
+{
+ ir_function_signature *const sig =
+ new(mem_ctx) ir_function_signature(glsl_type::void_type, avail);
+ ir_factory body(&sig->body, mem_ctx);
+ sig->is_defined = true;
+
+ exec_list sig_parameters;
+
+ ir_variable *const r0091 = new(mem_ctx) ir_variable(glsl_type::uint_type, "a0", ir_var_function_in);
+ sig_parameters.push_tail(r0091);
+ ir_variable *const r0092 = new(mem_ctx) ir_variable(glsl_type::uint_type, "a1", ir_var_function_in);
+ sig_parameters.push_tail(r0092);
+ ir_variable *const r0093 = new(mem_ctx) ir_variable(glsl_type::uint_type, "b0", ir_var_function_in);
+ sig_parameters.push_tail(r0093);
+ ir_variable *const r0094 = new(mem_ctx) ir_variable(glsl_type::uint_type, "b1", ir_var_function_in);
+ sig_parameters.push_tail(r0094);
+ ir_variable *const r0095 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0Ptr", ir_var_function_inout);
+ sig_parameters.push_tail(r0095);
+ ir_variable *const r0096 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1Ptr", ir_var_function_inout);
+ sig_parameters.push_tail(r0096);
+ ir_variable *const r0097 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0097);
+ body.emit(assign(r0097, add(r0092, r0094), 0x01));
+
+ body.emit(assign(r0096, r0097, 0x01));
+
+ ir_expression *const r0098 = add(r0091, r0093);
+ ir_expression *const r0099 = less(r0097, r0092);
+ ir_expression *const r009A = expr(ir_unop_b2i, r0099);
+ ir_expression *const r009B = expr(ir_unop_i2u, r009A);
+ body.emit(assign(r0095, add(r0098, r009B), 0x01));
+
+ sig->replace_parameters(&sig_parameters);
+ return sig;
+}
+ir_function_signature *
+sub64(void *mem_ctx, builtin_available_predicate avail)
+{
+ ir_function_signature *const sig =
+ new(mem_ctx) ir_function_signature(glsl_type::void_type, avail);
+ ir_factory body(&sig->body, mem_ctx);
+ sig->is_defined = true;
+
+ exec_list sig_parameters;
+
+ ir_variable *const r009C = new(mem_ctx) ir_variable(glsl_type::uint_type, "a0", ir_var_function_in);
+ sig_parameters.push_tail(r009C);
+ ir_variable *const r009D = new(mem_ctx) ir_variable(glsl_type::uint_type, "a1", ir_var_function_in);
+ sig_parameters.push_tail(r009D);
+ ir_variable *const r009E = new(mem_ctx) ir_variable(glsl_type::uint_type, "b0", ir_var_function_in);
+ sig_parameters.push_tail(r009E);
+ ir_variable *const r009F = new(mem_ctx) ir_variable(glsl_type::uint_type, "b1", ir_var_function_in);
+ sig_parameters.push_tail(r009F);
+ ir_variable *const r00A0 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0Ptr", ir_var_function_inout);
+ sig_parameters.push_tail(r00A0);
+ ir_variable *const r00A1 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1Ptr", ir_var_function_inout);
+ sig_parameters.push_tail(r00A1);
+ body.emit(assign(r00A1, sub(r009D, r009F), 0x01));
+
+ ir_expression *const r00A2 = sub(r009C, r009E);
+ ir_expression *const r00A3 = less(r009D, r009F);
+ ir_expression *const r00A4 = expr(ir_unop_b2i, r00A3);
+ ir_expression *const r00A5 = expr(ir_unop_i2u, r00A4);
+ body.emit(assign(r00A0, sub(r00A2, r00A5), 0x01));
+
+ sig->replace_parameters(&sig_parameters);
+ return sig;
+}
+ir_function_signature *
+eq64(void *mem_ctx, builtin_available_predicate avail)
+{
+ ir_function_signature *const sig =
+ new(mem_ctx) ir_function_signature(glsl_type::bool_type, avail);
+ ir_factory body(&sig->body, mem_ctx);
+ sig->is_defined = true;
+
+ exec_list sig_parameters;
+
+ ir_variable *const r00A6 = new(mem_ctx) ir_variable(glsl_type::uint_type, "a0", ir_var_function_in);
+ sig_parameters.push_tail(r00A6);
+ ir_variable *const r00A7 = new(mem_ctx) ir_variable(glsl_type::uint_type, "a1", ir_var_function_in);
+ sig_parameters.push_tail(r00A7);
+ ir_variable *const r00A8 = new(mem_ctx) ir_variable(glsl_type::uint_type, "b0", ir_var_function_in);
+ sig_parameters.push_tail(r00A8);
+ ir_variable *const r00A9 = new(mem_ctx) ir_variable(glsl_type::uint_type, "b1", ir_var_function_in);
+ sig_parameters.push_tail(r00A9);
+ ir_expression *const r00AA = equal(r00A6, r00A8);
+ ir_expression *const r00AB = equal(r00A7, r00A9);
+ ir_expression *const r00AC = logic_and(r00AA, r00AB);
+ body.emit(ret(r00AC));
+
+ sig->replace_parameters(&sig_parameters);
+ return sig;
+}
+ir_function_signature *
+float64_is_nan(void *mem_ctx, builtin_available_predicate avail)
+{
+ ir_function_signature *const sig =
+ new(mem_ctx) ir_function_signature(glsl_type::bool_type, avail);
+ ir_factory body(&sig->body, mem_ctx);
+ sig->is_defined = true;
+
+ exec_list sig_parameters;
+
+ ir_variable *const r00AD = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "a", ir_var_function_in);
+ sig_parameters.push_tail(r00AD);
+ ir_expression *const r00AE = lshift(swizzle_y(r00AD), body.constant(int(1)));
+ ir_expression *const r00AF = lequal(body.constant(4292870144u), r00AE);
+ ir_expression *const r00B0 = nequal(swizzle_x(r00AD), body.constant(0u));
+ ir_expression *const r00B1 = bit_and(swizzle_y(r00AD), body.constant(1048575u));
+ ir_expression *const r00B2 = nequal(r00B1, body.constant(0u));
+ ir_expression *const r00B3 = logic_or(r00B0, r00B2);
+ ir_expression *const r00B4 = logic_and(r00AF, r00B3);
+ body.emit(ret(r00B4));
+
+ sig->replace_parameters(&sig_parameters);
+ return sig;
+}
+ir_function_signature *
+float64_is_signaling_nan(void *mem_ctx, builtin_available_predicate avail)
+{
+ ir_function_signature *const sig =
+ new(mem_ctx) ir_function_signature(glsl_type::bool_type, avail);
+ ir_factory body(&sig->body, mem_ctx);
+ sig->is_defined = true;
+
+ exec_list sig_parameters;
+
+ ir_variable *const r00B5 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "a", ir_var_function_in);
+ sig_parameters.push_tail(r00B5);
+ ir_expression *const r00B6 = rshift(swizzle_y(r00B5), body.constant(int(19)));
+ ir_expression *const r00B7 = bit_and(r00B6, body.constant(4095u));
+ ir_expression *const r00B8 = equal(r00B7, body.constant(4094u));
+ ir_expression *const r00B9 = nequal(swizzle_x(r00B5), body.constant(0u));
+ ir_expression *const r00BA = bit_and(swizzle_y(r00B5), body.constant(524287u));
+ ir_expression *const r00BB = nequal(r00BA, body.constant(0u));
+ ir_expression *const r00BC = logic_or(r00B9, r00BB);
+ ir_expression *const r00BD = logic_and(r00B8, r00BC);
+ body.emit(ret(r00BD));
+
+ sig->replace_parameters(&sig_parameters);
+ return sig;
+}
+ir_function_signature *
+shift64RightJamming(void *mem_ctx, builtin_available_predicate avail)
+{
+ ir_function_signature *const sig =
+ new(mem_ctx) ir_function_signature(glsl_type::void_type, avail);
+ ir_factory body(&sig->body, mem_ctx);
+ sig->is_defined = true;
+
+ exec_list sig_parameters;
+
+ ir_variable *const r00BE = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "a", ir_var_function_in);
+ sig_parameters.push_tail(r00BE);
+ ir_variable *const r00BF = new(mem_ctx) ir_variable(glsl_type::int_type, "count", ir_var_function_in);
+ sig_parameters.push_tail(r00BF);
+ ir_variable *const r00C0 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0Ptr", ir_var_function_inout);
+ sig_parameters.push_tail(r00C0);
+ ir_variable *const r00C1 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1Ptr", ir_var_function_inout);
+ sig_parameters.push_tail(r00C1);
+ ir_variable *const r00C2 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r00C2);
+ ir_variable *const r00C3 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r00C3);
+ ir_variable *const r00C4 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r00C5 = neg(r00BF);
+ body.emit(assign(r00C4, bit_and(r00C5, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r00C7 = equal(r00BF, body.constant(int(0)));
+ ir_if *f00C6 = new(mem_ctx) ir_if(operand(r00C7).val);
+ exec_list *const f00C6_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f00C6->then_instructions;
+
+ body.emit(assign(r00C2, swizzle_y(r00BE), 0x01));
+
+ body.emit(assign(r00C3, swizzle_x(r00BE), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f00C6->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r00C9 = less(r00BF, body.constant(int(32)));
+ ir_if *f00C8 = new(mem_ctx) ir_if(operand(r00C9).val);
+ exec_list *const f00C8_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f00C8->then_instructions;
+
+ ir_expression *const r00CA = lshift(swizzle_x(r00BE), r00C4);
+ ir_expression *const r00CB = rshift(swizzle_y(r00BE), r00BF);
+ ir_expression *const r00CC = bit_or(r00CA, r00CB);
+ ir_expression *const r00CD = lshift(swizzle_y(r00BE), r00C4);
+ ir_expression *const r00CE = nequal(r00CD, body.constant(0u));
+ ir_expression *const r00CF = expr(ir_unop_b2i, r00CE);
+ ir_expression *const r00D0 = expr(ir_unop_i2u, r00CF);
+ body.emit(assign(r00C2, bit_or(r00CC, r00D0), 0x01));
+
+ body.emit(assign(r00C3, rshift(swizzle_x(r00BE), r00BF), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f00C8->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r00D2 = equal(r00BF, body.constant(int(32)));
+ ir_if *f00D1 = new(mem_ctx) ir_if(operand(r00D2).val);
+ exec_list *const f00D1_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f00D1->then_instructions;
+
+ ir_expression *const r00D3 = nequal(swizzle_y(r00BE), body.constant(0u));
+ ir_expression *const r00D4 = expr(ir_unop_b2i, r00D3);
+ ir_expression *const r00D5 = expr(ir_unop_i2u, r00D4);
+ body.emit(assign(r00C2, bit_or(swizzle_x(r00BE), r00D5), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f00D1->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r00D7 = less(r00BF, body.constant(int(64)));
+ ir_if *f00D6 = new(mem_ctx) ir_if(operand(r00D7).val);
+ exec_list *const f00D6_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f00D6->then_instructions;
+
+ ir_expression *const r00D8 = bit_and(r00BF, body.constant(int(31)));
+ ir_expression *const r00D9 = rshift(swizzle_x(r00BE), r00D8);
+ ir_expression *const r00DA = lshift(swizzle_x(r00BE), r00C4);
+ ir_expression *const r00DB = bit_or(r00DA, swizzle_y(r00BE));
+ ir_expression *const r00DC = nequal(r00DB, body.constant(0u));
+ ir_expression *const r00DD = expr(ir_unop_b2i, r00DC);
+ ir_expression *const r00DE = expr(ir_unop_i2u, r00DD);
+ body.emit(assign(r00C2, bit_or(r00D9, r00DE), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f00D6->else_instructions;
+
+ ir_expression *const r00DF = bit_or(swizzle_x(r00BE), swizzle_y(r00BE));
+ ir_expression *const r00E0 = nequal(r00DF, body.constant(0u));
+ ir_expression *const r00E1 = expr(ir_unop_b2i, r00E0);
+ body.emit(assign(r00C2, expr(ir_unop_i2u, r00E1), 0x01));
+
+
+ body.instructions = f00D6_parent_instructions;
+ body.emit(f00D6);
+
+ /* END IF */
+
+
+ body.instructions = f00D1_parent_instructions;
+ body.emit(f00D1);
+
+ /* END IF */
+
+ body.emit(assign(r00C3, body.constant(0u), 0x01));
+
+
+ body.instructions = f00C8_parent_instructions;
+ body.emit(f00C8);
+
+ /* END IF */
+
+
+ body.instructions = f00C6_parent_instructions;
+ body.emit(f00C6);
+
+ /* END IF */
+
+ body.emit(assign(r00C1, r00C2, 0x01));
+
+ body.emit(assign(r00C0, r00C3, 0x01));
+
+ sig->replace_parameters(&sig_parameters);
+ return sig;
+}
+ir_function_signature *
+shift64ExtraRightJamming(void *mem_ctx, builtin_available_predicate avail)
+{
+ ir_function_signature *const sig =
+ new(mem_ctx) ir_function_signature(glsl_type::void_type, avail);
+ ir_factory body(&sig->body, mem_ctx);
+ sig->is_defined = true;
+
+ exec_list sig_parameters;
+
+ ir_variable *const r00E2 = new(mem_ctx) ir_variable(glsl_type::uint_type, "a0", ir_var_function_in);
+ sig_parameters.push_tail(r00E2);
+ ir_variable *const r00E3 = new(mem_ctx) ir_variable(glsl_type::uint_type, "a1", ir_var_function_in);
+ sig_parameters.push_tail(r00E3);
+ ir_variable *const r00E4 = new(mem_ctx) ir_variable(glsl_type::uint_type, "a2", ir_var_function_in);
+ sig_parameters.push_tail(r00E4);
+ ir_variable *const r00E5 = new(mem_ctx) ir_variable(glsl_type::int_type, "count", ir_var_function_in);
+ sig_parameters.push_tail(r00E5);
+ ir_variable *const r00E6 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0Ptr", ir_var_function_inout);
+ sig_parameters.push_tail(r00E6);
+ ir_variable *const r00E7 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1Ptr", ir_var_function_inout);
+ sig_parameters.push_tail(r00E7);
+ ir_variable *const r00E8 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2Ptr", ir_var_function_inout);
+ sig_parameters.push_tail(r00E8);
+ ir_variable *const r00E9 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r00E9);
+ ir_variable *const r00EA = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r00EA);
+ ir_variable *const r00EB = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r00EB);
+ ir_variable *const r00EC = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r00ED = neg(r00E5);
+ body.emit(assign(r00EC, bit_and(r00ED, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r00EF = equal(r00E5, body.constant(int(0)));
+ ir_if *f00EE = new(mem_ctx) ir_if(operand(r00EF).val);
+ exec_list *const f00EE_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f00EE->then_instructions;
+
+ body.emit(assign(r00E9, r00E4, 0x01));
+
+ body.emit(assign(r00EA, r00E3, 0x01));
+
+ body.emit(assign(r00EB, r00E2, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f00EE->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r00F1 = less(r00E5, body.constant(int(32)));
+ ir_if *f00F0 = new(mem_ctx) ir_if(operand(r00F1).val);
+ exec_list *const f00F0_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f00F0->then_instructions;
+
+ body.emit(assign(r00E9, lshift(r00E3, r00EC), 0x01));
+
+ ir_expression *const r00F2 = lshift(r00E2, r00EC);
+ ir_expression *const r00F3 = rshift(r00E3, r00E5);
+ body.emit(assign(r00EA, bit_or(r00F2, r00F3), 0x01));
+
+ body.emit(assign(r00EB, rshift(r00E2, r00E5), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f00F0->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r00F5 = equal(r00E5, body.constant(int(32)));
+ ir_if *f00F4 = new(mem_ctx) ir_if(operand(r00F5).val);
+ exec_list *const f00F4_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f00F4->then_instructions;
+
+ body.emit(assign(r00E9, r00E3, 0x01));
+
+ body.emit(assign(r00EA, r00E2, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f00F4->else_instructions;
+
+ body.emit(assign(r00E4, bit_or(r00E4, r00E3), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r00F7 = less(r00E5, body.constant(int(64)));
+ ir_if *f00F6 = new(mem_ctx) ir_if(operand(r00F7).val);
+ exec_list *const f00F6_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f00F6->then_instructions;
+
+ body.emit(assign(r00E9, lshift(r00E2, r00EC), 0x01));
+
+ ir_expression *const r00F8 = bit_and(r00E5, body.constant(int(31)));
+ body.emit(assign(r00EA, rshift(r00E2, r00F8), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f00F6->else_instructions;
+
+ ir_variable *const r00F9 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r00FB = equal(r00E5, body.constant(int(64)));
+ ir_if *f00FA = new(mem_ctx) ir_if(operand(r00FB).val);
+ exec_list *const f00FA_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f00FA->then_instructions;
+
+ body.emit(assign(r00F9, r00E2, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f00FA->else_instructions;
+
+ ir_expression *const r00FC = nequal(r00E2, body.constant(0u));
+ ir_expression *const r00FD = expr(ir_unop_b2i, r00FC);
+ body.emit(assign(r00F9, expr(ir_unop_i2u, r00FD), 0x01));
+
+
+ body.instructions = f00FA_parent_instructions;
+ body.emit(f00FA);
+
+ /* END IF */
+
+ body.emit(assign(r00E9, r00F9, 0x01));
+
+ body.emit(assign(r00EA, body.constant(0u), 0x01));
+
+
+ body.instructions = f00F6_parent_instructions;
+ body.emit(f00F6);
+
+ /* END IF */
+
+
+ body.instructions = f00F4_parent_instructions;
+ body.emit(f00F4);
+
+ /* END IF */
+
+ body.emit(assign(r00EB, body.constant(0u), 0x01));
+
+
+ body.instructions = f00F0_parent_instructions;
+ body.emit(f00F0);
+
+ /* END IF */
+
+ ir_expression *const r00FE = nequal(r00E4, body.constant(0u));
+ ir_expression *const r00FF = expr(ir_unop_b2i, r00FE);
+ ir_expression *const r0100 = expr(ir_unop_i2u, r00FF);
+ body.emit(assign(r00E9, bit_or(r00E9, r0100), 0x01));
+
+
+ body.instructions = f00EE_parent_instructions;
+ body.emit(f00EE);
+
+ /* END IF */
+
+ body.emit(assign(r00E8, r00E9, 0x01));
+
+ body.emit(assign(r00E7, r00EA, 0x01));
+
+ body.emit(assign(r00E6, r00EB, 0x01));
+
+ sig->replace_parameters(&sig_parameters);
+ return sig;
+}
+ir_function_signature *
+shortShift64Left(void *mem_ctx, builtin_available_predicate avail)
+{
+ ir_function_signature *const sig =
+ new(mem_ctx) ir_function_signature(glsl_type::void_type, avail);
+ ir_factory body(&sig->body, mem_ctx);
+ sig->is_defined = true;
+
+ exec_list sig_parameters;
+
+ ir_variable *const r0101 = new(mem_ctx) ir_variable(glsl_type::uint_type, "a0", ir_var_function_in);
+ sig_parameters.push_tail(r0101);
+ ir_variable *const r0102 = new(mem_ctx) ir_variable(glsl_type::uint_type, "a1", ir_var_function_in);
+ sig_parameters.push_tail(r0102);
+ ir_variable *const r0103 = new(mem_ctx) ir_variable(glsl_type::int_type, "count", ir_var_function_in);
+ sig_parameters.push_tail(r0103);
+ ir_variable *const r0104 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0Ptr", ir_var_function_inout);
+ sig_parameters.push_tail(r0104);
+ ir_variable *const r0105 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1Ptr", ir_var_function_inout);
+ sig_parameters.push_tail(r0105);
+ body.emit(assign(r0105, lshift(r0102, r0103), 0x01));
+
+ ir_variable *const r0106 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0108 = equal(r0103, body.constant(int(0)));
+ ir_if *f0107 = new(mem_ctx) ir_if(operand(r0108).val);
+ exec_list *const f0107_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0107->then_instructions;
+
+ body.emit(assign(r0106, r0101, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0107->else_instructions;
+
+ ir_expression *const r0109 = lshift(r0101, r0103);
+ ir_expression *const r010A = neg(r0103);
+ ir_expression *const r010B = bit_and(r010A, body.constant(int(31)));
+ ir_expression *const r010C = rshift(r0102, r010B);
+ body.emit(assign(r0106, bit_or(r0109, r010C), 0x01));
+
+
+ body.instructions = f0107_parent_instructions;
+ body.emit(f0107);
+
+ /* END IF */
+
+ body.emit(assign(r0104, r0106, 0x01));
+
+ sig->replace_parameters(&sig_parameters);
+ return sig;
+}
+ir_function_signature *
+packFloat64(void *mem_ctx, builtin_available_predicate avail)
+{
+ ir_function_signature *const sig =
+ new(mem_ctx) ir_function_signature(glsl_type::uvec2_type, avail);
+ ir_factory body(&sig->body, mem_ctx);
+ sig->is_defined = true;
+
+ exec_list sig_parameters;
+
+ ir_variable *const r010D = new(mem_ctx) ir_variable(glsl_type::uint_type, "zSign", ir_var_function_in);
+ sig_parameters.push_tail(r010D);
+ ir_variable *const r010E = new(mem_ctx) ir_variable(glsl_type::uint_type, "zExp", ir_var_function_in);
+ sig_parameters.push_tail(r010E);
+ ir_variable *const r010F = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac0", ir_var_function_in);
+ sig_parameters.push_tail(r010F);
+ ir_variable *const r0110 = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac1", ir_var_function_in);
+ sig_parameters.push_tail(r0110);
+ ir_variable *const r0111 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r0111);
+ ir_expression *const r0112 = lshift(r010D, body.constant(int(31)));
+ ir_expression *const r0113 = lshift(r010E, body.constant(int(20)));
+ ir_expression *const r0114 = add(r0112, r0113);
+ body.emit(assign(r0111, add(r0114, r010F), 0x01));
+
+ body.emit(assign(r0111, r0110, 0x02));
+
+ body.emit(ret(r0111));
+
+ sig->replace_parameters(&sig_parameters);
+ return sig;
+}
+ir_function_signature *
+roundAndPackFloat64(void *mem_ctx, builtin_available_predicate avail)
+{
+ ir_function_signature *const sig =
+ new(mem_ctx) ir_function_signature(glsl_type::uvec2_type, avail);
+ ir_factory body(&sig->body, mem_ctx);
+ sig->is_defined = true;
+
+ exec_list sig_parameters;
+
+ ir_variable *const r0115 = new(mem_ctx) ir_variable(glsl_type::uint_type, "zSign", ir_var_function_in);
+ sig_parameters.push_tail(r0115);
+ ir_variable *const r0116 = new(mem_ctx) ir_variable(glsl_type::uint_type, "zExp", ir_var_function_in);
+ sig_parameters.push_tail(r0116);
+ ir_variable *const r0117 = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac0", ir_var_function_in);
+ sig_parameters.push_tail(r0117);
+ ir_variable *const r0118 = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac1", ir_var_function_in);
+ sig_parameters.push_tail(r0118);
+ ir_variable *const r0119 = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac2", ir_var_function_in);
+ sig_parameters.push_tail(r0119);
+ ir_variable *const r011A = body.make_temp(glsl_type::bool_type, "execute_flag");
+ body.emit(assign(r011A, body.constant(true), 0x01));
+
+ ir_variable *const r011B = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r011C = new(mem_ctx) ir_variable(glsl_type::uint_type, "increment", ir_var_auto);
+ body.emit(r011C);
+ ir_expression *const r011D = less(r0119, body.constant(0u));
+ ir_expression *const r011E = expr(ir_unop_b2i, r011D);
+ body.emit(assign(r011C, expr(ir_unop_i2u, r011E), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0120 = lequal(body.constant(2045u), r0116);
+ ir_if *f011F = new(mem_ctx) ir_if(operand(r0120).val);
+ exec_list *const f011F_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f011F->then_instructions;
+
+ ir_variable *const r0121 = body.make_temp(glsl_type::bool_type, "or_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0123 = less(body.constant(2045u), r0116);
+ ir_if *f0122 = new(mem_ctx) ir_if(operand(r0123).val);
+ exec_list *const f0122_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0122->then_instructions;
+
+ body.emit(assign(r0121, body.constant(true), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0122->else_instructions;
+
+ ir_variable *const r0124 = body.make_temp(glsl_type::bool_type, "and_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0126 = equal(r0116, body.constant(2045u));
+ ir_if *f0125 = new(mem_ctx) ir_if(operand(r0126).val);
+ exec_list *const f0125_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0125->then_instructions;
+
+ ir_expression *const r0127 = equal(body.constant(2097151u), r0117);
+ ir_expression *const r0128 = equal(body.constant(4294967295u), r0118);
+ body.emit(assign(r0124, logic_and(r0127, r0128), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0125->else_instructions;
+
+ body.emit(assign(r0124, body.constant(false), 0x01));
+
+
+ body.instructions = f0125_parent_instructions;
+ body.emit(f0125);
+
+ /* END IF */
+
+ ir_expression *const r0129 = nequal(r011C, body.constant(0u));
+ body.emit(assign(r0121, logic_and(r0124, r0129), 0x01));
+
+
+ body.instructions = f0122_parent_instructions;
+ body.emit(f0122);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f012A = new(mem_ctx) ir_if(operand(r0121).val);
+ exec_list *const f012A_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f012A->then_instructions;
+
+ ir_variable *const r012B = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r012B);
+ ir_expression *const r012C = lshift(r0115, body.constant(int(31)));
+ body.emit(assign(r012B, add(r012C, body.constant(2146435072u)), 0x01));
+
+ body.emit(assign(r012B, body.constant(0u), 0x02));
+
+ body.emit(assign(r011B, r012B, 0x03));
+
+ body.emit(assign(r011A, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f012A->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r012E = less(r0116, body.constant(0u));
+ ir_if *f012D = new(mem_ctx) ir_if(operand(r012E).val);
+ exec_list *const f012D_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f012D->then_instructions;
+
+ ir_variable *const r012F = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r012F, r0119, 0x01));
+
+ ir_variable *const r0130 = body.make_temp(glsl_type::int_type, "count");
+ ir_expression *const r0131 = neg(r0116);
+ body.emit(assign(r0130, expr(ir_unop_u2i, r0131), 0x01));
+
+ ir_variable *const r0132 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r0132);
+ ir_variable *const r0133 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0133);
+ ir_variable *const r0134 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r0134);
+ ir_variable *const r0135 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r0136 = neg(r0130);
+ body.emit(assign(r0135, bit_and(r0136, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0138 = equal(r0130, body.constant(int(0)));
+ ir_if *f0137 = new(mem_ctx) ir_if(operand(r0138).val);
+ exec_list *const f0137_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0137->then_instructions;
+
+ body.emit(assign(r0132, r0119, 0x01));
+
+ body.emit(assign(r0133, r0118, 0x01));
+
+ body.emit(assign(r0134, r0117, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0137->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r013A = less(r0130, body.constant(int(32)));
+ ir_if *f0139 = new(mem_ctx) ir_if(operand(r013A).val);
+ exec_list *const f0139_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0139->then_instructions;
+
+ body.emit(assign(r0132, lshift(r0118, r0135), 0x01));
+
+ ir_expression *const r013B = lshift(r0117, r0135);
+ ir_expression *const r013C = rshift(r0118, r0130);
+ body.emit(assign(r0133, bit_or(r013B, r013C), 0x01));
+
+ body.emit(assign(r0134, rshift(r0117, r0130), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0139->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r013E = equal(r0130, body.constant(int(32)));
+ ir_if *f013D = new(mem_ctx) ir_if(operand(r013E).val);
+ exec_list *const f013D_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f013D->then_instructions;
+
+ body.emit(assign(r0132, r0118, 0x01));
+
+ body.emit(assign(r0133, r0117, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f013D->else_instructions;
+
+ body.emit(assign(r012F, bit_or(r0119, r0118), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0140 = less(r0130, body.constant(int(64)));
+ ir_if *f013F = new(mem_ctx) ir_if(operand(r0140).val);
+ exec_list *const f013F_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f013F->then_instructions;
+
+ body.emit(assign(r0132, lshift(r0117, r0135), 0x01));
+
+ ir_expression *const r0141 = bit_and(r0130, body.constant(int(31)));
+ body.emit(assign(r0133, rshift(r0117, r0141), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f013F->else_instructions;
+
+ ir_variable *const r0142 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0144 = equal(r0130, body.constant(int(64)));
+ ir_if *f0143 = new(mem_ctx) ir_if(operand(r0144).val);
+ exec_list *const f0143_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0143->then_instructions;
+
+ body.emit(assign(r0142, r0117, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0143->else_instructions;
+
+ ir_expression *const r0145 = nequal(r0117, body.constant(0u));
+ ir_expression *const r0146 = expr(ir_unop_b2i, r0145);
+ body.emit(assign(r0142, expr(ir_unop_i2u, r0146), 0x01));
+
+
+ body.instructions = f0143_parent_instructions;
+ body.emit(f0143);
+
+ /* END IF */
+
+ body.emit(assign(r0132, r0142, 0x01));
+
+ body.emit(assign(r0133, body.constant(0u), 0x01));
+
+
+ body.instructions = f013F_parent_instructions;
+ body.emit(f013F);
+
+ /* END IF */
+
+
+ body.instructions = f013D_parent_instructions;
+ body.emit(f013D);
+
+ /* END IF */
+
+ body.emit(assign(r0134, body.constant(0u), 0x01));
+
+
+ body.instructions = f0139_parent_instructions;
+ body.emit(f0139);
+
+ /* END IF */
+
+ ir_expression *const r0147 = nequal(r012F, body.constant(0u));
+ ir_expression *const r0148 = expr(ir_unop_b2i, r0147);
+ ir_expression *const r0149 = expr(ir_unop_i2u, r0148);
+ body.emit(assign(r0132, bit_or(r0132, r0149), 0x01));
+
+
+ body.instructions = f0137_parent_instructions;
+ body.emit(f0137);
+
+ /* END IF */
+
+ body.emit(assign(r0117, r0134, 0x01));
+
+ body.emit(assign(r0118, r0133, 0x01));
+
+ body.emit(assign(r0119, r0132, 0x01));
+
+ body.emit(assign(r0116, body.constant(0u), 0x01));
+
+ ir_expression *const r014A = less(r0132, body.constant(0u));
+ ir_expression *const r014B = expr(ir_unop_b2i, r014A);
+ body.emit(assign(r011C, expr(ir_unop_i2u, r014B), 0x01));
+
+
+ body.instructions = f012D_parent_instructions;
+ body.emit(f012D);
+
+ /* END IF */
+
+
+ body.instructions = f012A_parent_instructions;
+ body.emit(f012A);
+
+ /* END IF */
+
+
+ body.instructions = f011F_parent_instructions;
+ body.emit(f011F);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f014C = new(mem_ctx) ir_if(operand(r011A).val);
+ exec_list *const f014C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f014C->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r014E = nequal(r011C, body.constant(0u));
+ ir_if *f014D = new(mem_ctx) ir_if(operand(r014E).val);
+ exec_list *const f014D_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f014D->then_instructions;
+
+ ir_variable *const r014F = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r014F);
+ body.emit(assign(r014F, add(r0118, body.constant(1u)), 0x01));
+
+ ir_expression *const r0150 = less(r014F, r0118);
+ ir_expression *const r0151 = expr(ir_unop_b2i, r0150);
+ ir_expression *const r0152 = expr(ir_unop_i2u, r0151);
+ body.emit(assign(r0117, add(r0117, r0152), 0x01));
+
+ ir_expression *const r0153 = neg(r0119);
+ ir_expression *const r0154 = equal(r0119, r0153);
+ ir_expression *const r0155 = expr(ir_unop_b2i, r0154);
+ ir_expression *const r0156 = expr(ir_unop_i2u, r0155);
+ ir_expression *const r0157 = bit_and(r0156, body.constant(1u));
+ ir_expression *const r0158 = expr(ir_unop_bit_not, r0157);
+ body.emit(assign(r0118, bit_and(r014F, r0158), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f014D->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r015A = bit_or(r0117, r0118);
+ ir_expression *const r015B = equal(r015A, body.constant(0u));
+ ir_if *f0159 = new(mem_ctx) ir_if(operand(r015B).val);
+ exec_list *const f0159_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0159->then_instructions;
+
+ body.emit(assign(r0116, body.constant(0u), 0x01));
+
+
+ body.instructions = f0159_parent_instructions;
+ body.emit(f0159);
+
+ /* END IF */
+
+
+ body.instructions = f014D_parent_instructions;
+ body.emit(f014D);
+
+ /* END IF */
+
+ ir_variable *const r015C = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r015C);
+ ir_expression *const r015D = lshift(r0115, body.constant(int(31)));
+ ir_expression *const r015E = lshift(r0116, body.constant(int(20)));
+ ir_expression *const r015F = add(r015D, r015E);
+ body.emit(assign(r015C, add(r015F, r0117), 0x01));
+
+ body.emit(assign(r015C, r0118, 0x02));
+
+ body.emit(assign(r011B, r015C, 0x03));
+
+ body.emit(assign(r011A, body.constant(false), 0x01));
+
+
+ body.instructions = f014C_parent_instructions;
+ body.emit(f014C);
+
+ /* END IF */
+
+ body.emit(ret(r011B));
+
+ sig->replace_parameters(&sig_parameters);
+ return sig;
+}
+ir_function_signature *
+countLeadingZeros32(void *mem_ctx, builtin_available_predicate avail)
+{
+ ir_function_signature *const sig =
+ new(mem_ctx) ir_function_signature(glsl_type::uint_type, avail);
+ ir_factory body(&sig->body, mem_ctx);
+ sig->is_defined = true;
+
+ exec_list sig_parameters;
+
+ ir_variable *const r0160 = new(mem_ctx) ir_variable(glsl_type::uint_type, "a", ir_var_function_in);
+ sig_parameters.push_tail(r0160);
+ ir_variable *const r0161 = body.make_temp(glsl_type::uint_type, "return_value");
+ ir_variable *const r0162 = new(mem_ctx) ir_variable(glsl_type::uint_type, "shiftCount", ir_var_auto);
+ body.emit(r0162);
+ /* IF CONDITION */
+ ir_expression *const r0164 = equal(r0160, body.constant(0u));
+ ir_if *f0163 = new(mem_ctx) ir_if(operand(r0164).val);
+ exec_list *const f0163_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0163->then_instructions;
+
+ body.emit(assign(r0161, body.constant(32u), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0163->else_instructions;
+
+ body.emit(assign(r0162, body.constant(0u), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0166 = bit_and(r0160, body.constant(4294901760u));
+ ir_expression *const r0167 = equal(r0166, body.constant(0u));
+ ir_if *f0165 = new(mem_ctx) ir_if(operand(r0167).val);
+ exec_list *const f0165_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0165->then_instructions;
+
+ body.emit(assign(r0162, body.constant(16u), 0x01));
+
+ body.emit(assign(r0160, lshift(r0160, body.constant(int(16))), 0x01));
+
+
+ body.instructions = f0165_parent_instructions;
+ body.emit(f0165);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0169 = bit_and(r0160, body.constant(4278190080u));
+ ir_expression *const r016A = equal(r0169, body.constant(0u));
+ ir_if *f0168 = new(mem_ctx) ir_if(operand(r016A).val);
+ exec_list *const f0168_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0168->then_instructions;
+
+ body.emit(assign(r0162, add(r0162, body.constant(8u)), 0x01));
+
+ body.emit(assign(r0160, lshift(r0160, body.constant(int(8))), 0x01));
+
+
+ body.instructions = f0168_parent_instructions;
+ body.emit(f0168);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r016C = bit_and(r0160, body.constant(4026531840u));
+ ir_expression *const r016D = equal(r016C, body.constant(0u));
+ ir_if *f016B = new(mem_ctx) ir_if(operand(r016D).val);
+ exec_list *const f016B_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f016B->then_instructions;
+
+ body.emit(assign(r0162, add(r0162, body.constant(4u)), 0x01));
+
+ body.emit(assign(r0160, lshift(r0160, body.constant(int(4))), 0x01));
+
+
+ body.instructions = f016B_parent_instructions;
+ body.emit(f016B);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r016F = bit_and(r0160, body.constant(3221225472u));
+ ir_expression *const r0170 = equal(r016F, body.constant(0u));
+ ir_if *f016E = new(mem_ctx) ir_if(operand(r0170).val);
+ exec_list *const f016E_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f016E->then_instructions;
+
+ body.emit(assign(r0162, add(r0162, body.constant(2u)), 0x01));
+
+ body.emit(assign(r0160, lshift(r0160, body.constant(int(2))), 0x01));
+
+
+ body.instructions = f016E_parent_instructions;
+ body.emit(f016E);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0172 = bit_and(r0160, body.constant(2147483648u));
+ ir_expression *const r0173 = equal(r0172, body.constant(0u));
+ ir_if *f0171 = new(mem_ctx) ir_if(operand(r0173).val);
+ exec_list *const f0171_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0171->then_instructions;
+
+ body.emit(assign(r0162, add(r0162, body.constant(1u)), 0x01));
+
+
+ body.instructions = f0171_parent_instructions;
+ body.emit(f0171);
+
+ /* END IF */
+
+ body.emit(assign(r0161, r0162, 0x01));
+
+
+ body.instructions = f0163_parent_instructions;
+ body.emit(f0163);
+
+ /* END IF */
+
+ body.emit(ret(r0161));
+
+ sig->replace_parameters(&sig_parameters);
+ return sig;
+}
+ir_function_signature *
+normalizeRoundAndPackFloat64(void *mem_ctx, builtin_available_predicate avail)
+{
+ ir_function_signature *const sig =
+ new(mem_ctx) ir_function_signature(glsl_type::uvec2_type, avail);
+ ir_factory body(&sig->body, mem_ctx);
+ sig->is_defined = true;
+
+ exec_list sig_parameters;
+
+ ir_variable *const r0174 = new(mem_ctx) ir_variable(glsl_type::uint_type, "zSign", ir_var_function_in);
+ sig_parameters.push_tail(r0174);
+ ir_variable *const r0175 = new(mem_ctx) ir_variable(glsl_type::uint_type, "zExp", ir_var_function_in);
+ sig_parameters.push_tail(r0175);
+ ir_variable *const r0176 = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac0", ir_var_function_in);
+ sig_parameters.push_tail(r0176);
+ ir_variable *const r0177 = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac1", ir_var_function_in);
+ sig_parameters.push_tail(r0177);
+ ir_variable *const r0178 = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac2", ir_var_auto);
+ body.emit(r0178);
+ ir_variable *const r0179 = new(mem_ctx) ir_variable(glsl_type::int_type, "shiftCount", ir_var_auto);
+ body.emit(r0179);
+ /* IF CONDITION */
+ ir_expression *const r017B = equal(r0176, body.constant(0u));
+ ir_if *f017A = new(mem_ctx) ir_if(operand(r017B).val);
+ exec_list *const f017A_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f017A->then_instructions;
+
+ body.emit(assign(r0176, r0177, 0x01));
+
+ body.emit(assign(r0177, body.constant(0u), 0x01));
+
+ body.emit(assign(r0175, add(r0175, body.constant(4294967264u)), 0x01));
+
+
+ body.instructions = f017A_parent_instructions;
+ body.emit(f017A);
+
+ /* END IF */
+
+ ir_variable *const r017C = body.make_temp(glsl_type::uint_type, "a");
+ body.emit(assign(r017C, r0176, 0x01));
+
+ ir_variable *const r017D = body.make_temp(glsl_type::uint_type, "return_value");
+ ir_variable *const r017E = new(mem_ctx) ir_variable(glsl_type::uint_type, "shiftCount", ir_var_auto);
+ body.emit(r017E);
+ /* IF CONDITION */
+ ir_expression *const r0180 = equal(r0176, body.constant(0u));
+ ir_if *f017F = new(mem_ctx) ir_if(operand(r0180).val);
+ exec_list *const f017F_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f017F->then_instructions;
+
+ body.emit(assign(r017D, body.constant(32u), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f017F->else_instructions;
+
+ body.emit(assign(r017E, body.constant(0u), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0182 = bit_and(r0176, body.constant(4294901760u));
+ ir_expression *const r0183 = equal(r0182, body.constant(0u));
+ ir_if *f0181 = new(mem_ctx) ir_if(operand(r0183).val);
+ exec_list *const f0181_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0181->then_instructions;
+
+ body.emit(assign(r017E, body.constant(16u), 0x01));
+
+ body.emit(assign(r017C, lshift(r0176, body.constant(int(16))), 0x01));
+
+
+ body.instructions = f0181_parent_instructions;
+ body.emit(f0181);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0185 = bit_and(r017C, body.constant(4278190080u));
+ ir_expression *const r0186 = equal(r0185, body.constant(0u));
+ ir_if *f0184 = new(mem_ctx) ir_if(operand(r0186).val);
+ exec_list *const f0184_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0184->then_instructions;
+
+ body.emit(assign(r017E, add(r017E, body.constant(8u)), 0x01));
+
+ body.emit(assign(r017C, lshift(r017C, body.constant(int(8))), 0x01));
+
+
+ body.instructions = f0184_parent_instructions;
+ body.emit(f0184);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0188 = bit_and(r017C, body.constant(4026531840u));
+ ir_expression *const r0189 = equal(r0188, body.constant(0u));
+ ir_if *f0187 = new(mem_ctx) ir_if(operand(r0189).val);
+ exec_list *const f0187_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0187->then_instructions;
+
+ body.emit(assign(r017E, add(r017E, body.constant(4u)), 0x01));
+
+ body.emit(assign(r017C, lshift(r017C, body.constant(int(4))), 0x01));
+
+
+ body.instructions = f0187_parent_instructions;
+ body.emit(f0187);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r018B = bit_and(r017C, body.constant(3221225472u));
+ ir_expression *const r018C = equal(r018B, body.constant(0u));
+ ir_if *f018A = new(mem_ctx) ir_if(operand(r018C).val);
+ exec_list *const f018A_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f018A->then_instructions;
+
+ body.emit(assign(r017E, add(r017E, body.constant(2u)), 0x01));
+
+ body.emit(assign(r017C, lshift(r017C, body.constant(int(2))), 0x01));
+
+
+ body.instructions = f018A_parent_instructions;
+ body.emit(f018A);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r018E = bit_and(r017C, body.constant(2147483648u));
+ ir_expression *const r018F = equal(r018E, body.constant(0u));
+ ir_if *f018D = new(mem_ctx) ir_if(operand(r018F).val);
+ exec_list *const f018D_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f018D->then_instructions;
+
+ body.emit(assign(r017E, add(r017E, body.constant(1u)), 0x01));
+
+
+ body.instructions = f018D_parent_instructions;
+ body.emit(f018D);
+
+ /* END IF */
+
+ body.emit(assign(r017D, r017E, 0x01));
+
+
+ body.instructions = f017F_parent_instructions;
+ body.emit(f017F);
+
+ /* END IF */
+
+ ir_expression *const r0190 = expr(ir_unop_u2i, r017D);
+ body.emit(assign(r0179, add(r0190, body.constant(int(-11))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0192 = lequal(body.constant(int(0)), r0179);
+ ir_if *f0191 = new(mem_ctx) ir_if(operand(r0192).val);
+ exec_list *const f0191_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0191->then_instructions;
+
+ body.emit(assign(r0178, body.constant(0u), 0x01));
+
+ ir_variable *const r0193 = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r0193, lshift(r0177, r0179), 0x01));
+
+ ir_variable *const r0194 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0196 = equal(r0179, body.constant(int(0)));
+ ir_if *f0195 = new(mem_ctx) ir_if(operand(r0196).val);
+ exec_list *const f0195_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0195->then_instructions;
+
+ body.emit(assign(r0194, r0176, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0195->else_instructions;
+
+ ir_expression *const r0197 = lshift(r0176, r0179);
+ ir_expression *const r0198 = neg(r0179);
+ ir_expression *const r0199 = bit_and(r0198, body.constant(int(31)));
+ ir_expression *const r019A = rshift(r0177, r0199);
+ body.emit(assign(r0194, bit_or(r0197, r019A), 0x01));
+
+
+ body.instructions = f0195_parent_instructions;
+ body.emit(f0195);
+
+ /* END IF */
+
+ body.emit(assign(r0176, r0194, 0x01));
+
+ body.emit(assign(r0177, r0193, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0191->else_instructions;
+
+ ir_variable *const r019B = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r019B, body.constant(0u), 0x01));
+
+ ir_variable *const r019C = body.make_temp(glsl_type::int_type, "count");
+ body.emit(assign(r019C, neg(r0179), 0x01));
+
+ ir_variable *const r019D = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r019D);
+ ir_variable *const r019E = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r019E);
+ ir_variable *const r019F = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r019F);
+ ir_variable *const r01A0 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r01A1 = neg(r019C);
+ body.emit(assign(r01A0, bit_and(r01A1, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r01A3 = equal(r019C, body.constant(int(0)));
+ ir_if *f01A2 = new(mem_ctx) ir_if(operand(r01A3).val);
+ exec_list *const f01A2_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f01A2->then_instructions;
+
+ body.emit(assign(r019D, r019B, 0x01));
+
+ body.emit(assign(r019E, r0177, 0x01));
+
+ body.emit(assign(r019F, r0176, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f01A2->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r01A5 = less(r019C, body.constant(int(32)));
+ ir_if *f01A4 = new(mem_ctx) ir_if(operand(r01A5).val);
+ exec_list *const f01A4_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f01A4->then_instructions;
+
+ body.emit(assign(r019D, lshift(r0177, r01A0), 0x01));
+
+ ir_expression *const r01A6 = lshift(r0176, r01A0);
+ ir_expression *const r01A7 = rshift(r0177, r019C);
+ body.emit(assign(r019E, bit_or(r01A6, r01A7), 0x01));
+
+ body.emit(assign(r019F, rshift(r0176, r019C), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f01A4->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r01A9 = equal(r019C, body.constant(int(32)));
+ ir_if *f01A8 = new(mem_ctx) ir_if(operand(r01A9).val);
+ exec_list *const f01A8_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f01A8->then_instructions;
+
+ body.emit(assign(r019D, r0177, 0x01));
+
+ body.emit(assign(r019E, r0176, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f01A8->else_instructions;
+
+ body.emit(assign(r019B, bit_or(body.constant(0u), r0177), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r01AB = less(r019C, body.constant(int(64)));
+ ir_if *f01AA = new(mem_ctx) ir_if(operand(r01AB).val);
+ exec_list *const f01AA_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f01AA->then_instructions;
+
+ body.emit(assign(r019D, lshift(r0176, r01A0), 0x01));
+
+ ir_expression *const r01AC = bit_and(r019C, body.constant(int(31)));
+ body.emit(assign(r019E, rshift(r0176, r01AC), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f01AA->else_instructions;
+
+ ir_variable *const r01AD = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r01AF = equal(r019C, body.constant(int(64)));
+ ir_if *f01AE = new(mem_ctx) ir_if(operand(r01AF).val);
+ exec_list *const f01AE_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f01AE->then_instructions;
+
+ body.emit(assign(r01AD, r0176, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f01AE->else_instructions;
+
+ ir_expression *const r01B0 = nequal(r0176, body.constant(0u));
+ ir_expression *const r01B1 = expr(ir_unop_b2i, r01B0);
+ body.emit(assign(r01AD, expr(ir_unop_i2u, r01B1), 0x01));
+
+
+ body.instructions = f01AE_parent_instructions;
+ body.emit(f01AE);
+
+ /* END IF */
+
+ body.emit(assign(r019D, r01AD, 0x01));
+
+ body.emit(assign(r019E, body.constant(0u), 0x01));
+
+
+ body.instructions = f01AA_parent_instructions;
+ body.emit(f01AA);
+
+ /* END IF */
+
+
+ body.instructions = f01A8_parent_instructions;
+ body.emit(f01A8);
+
+ /* END IF */
+
+ body.emit(assign(r019F, body.constant(0u), 0x01));
+
+
+ body.instructions = f01A4_parent_instructions;
+ body.emit(f01A4);
+
+ /* END IF */
+
+ ir_expression *const r01B2 = nequal(r019B, body.constant(0u));
+ ir_expression *const r01B3 = expr(ir_unop_b2i, r01B2);
+ ir_expression *const r01B4 = expr(ir_unop_i2u, r01B3);
+ body.emit(assign(r019D, bit_or(r019D, r01B4), 0x01));
+
+
+ body.instructions = f01A2_parent_instructions;
+ body.emit(f01A2);
+
+ /* END IF */
+
+ body.emit(assign(r0176, r019F, 0x01));
+
+ body.emit(assign(r0177, r019E, 0x01));
+
+ body.emit(assign(r0178, r019D, 0x01));
+
+
+ body.instructions = f0191_parent_instructions;
+ body.emit(f0191);
+
+ /* END IF */
+
+ ir_expression *const r01B5 = expr(ir_unop_i2u, r0179);
+ body.emit(assign(r0175, sub(r0175, r01B5), 0x01));
+
+ ir_variable *const r01B6 = body.make_temp(glsl_type::uint_type, "zExp");
+ body.emit(assign(r01B6, r0175, 0x01));
+
+ ir_variable *const r01B7 = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r01B7, r0176, 0x01));
+
+ ir_variable *const r01B8 = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r01B8, r0177, 0x01));
+
+ ir_variable *const r01B9 = body.make_temp(glsl_type::uint_type, "zFrac2");
+ body.emit(assign(r01B9, r0178, 0x01));
+
+ ir_variable *const r01BA = body.make_temp(glsl_type::bool_type, "execute_flag");
+ body.emit(assign(r01BA, body.constant(true), 0x01));
+
+ ir_variable *const r01BB = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r01BC = new(mem_ctx) ir_variable(glsl_type::uint_type, "increment", ir_var_auto);
+ body.emit(r01BC);
+ ir_expression *const r01BD = less(r0178, body.constant(0u));
+ ir_expression *const r01BE = expr(ir_unop_b2i, r01BD);
+ body.emit(assign(r01BC, expr(ir_unop_i2u, r01BE), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r01C0 = lequal(body.constant(2045u), r0175);
+ ir_if *f01BF = new(mem_ctx) ir_if(operand(r01C0).val);
+ exec_list *const f01BF_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f01BF->then_instructions;
+
+ ir_variable *const r01C1 = body.make_temp(glsl_type::bool_type, "or_tmp");
+ /* IF CONDITION */
+ ir_expression *const r01C3 = less(body.constant(2045u), r0175);
+ ir_if *f01C2 = new(mem_ctx) ir_if(operand(r01C3).val);
+ exec_list *const f01C2_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f01C2->then_instructions;
+
+ body.emit(assign(r01C1, body.constant(true), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f01C2->else_instructions;
+
+ ir_variable *const r01C4 = body.make_temp(glsl_type::bool_type, "and_tmp");
+ /* IF CONDITION */
+ ir_expression *const r01C6 = equal(r0175, body.constant(2045u));
+ ir_if *f01C5 = new(mem_ctx) ir_if(operand(r01C6).val);
+ exec_list *const f01C5_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f01C5->then_instructions;
+
+ ir_expression *const r01C7 = equal(body.constant(2097151u), r0176);
+ ir_expression *const r01C8 = equal(body.constant(4294967295u), r0177);
+ body.emit(assign(r01C4, logic_and(r01C7, r01C8), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f01C5->else_instructions;
+
+ body.emit(assign(r01C4, body.constant(false), 0x01));
+
+
+ body.instructions = f01C5_parent_instructions;
+ body.emit(f01C5);
+
+ /* END IF */
+
+ ir_expression *const r01C9 = nequal(r01BC, body.constant(0u));
+ body.emit(assign(r01C1, logic_and(r01C4, r01C9), 0x01));
+
+
+ body.instructions = f01C2_parent_instructions;
+ body.emit(f01C2);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f01CA = new(mem_ctx) ir_if(operand(r01C1).val);
+ exec_list *const f01CA_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f01CA->then_instructions;
+
+ ir_variable *const r01CB = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r01CB);
+ ir_expression *const r01CC = lshift(r0174, body.constant(int(31)));
+ body.emit(assign(r01CB, add(r01CC, body.constant(2146435072u)), 0x01));
+
+ body.emit(assign(r01CB, body.constant(0u), 0x02));
+
+ body.emit(assign(r01BB, r01CB, 0x03));
+
+ body.emit(assign(r01BA, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f01CA->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r01CE = less(r0175, body.constant(0u));
+ ir_if *f01CD = new(mem_ctx) ir_if(operand(r01CE).val);
+ exec_list *const f01CD_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f01CD->then_instructions;
+
+ ir_variable *const r01CF = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r01CF, r0178, 0x01));
+
+ ir_variable *const r01D0 = body.make_temp(glsl_type::int_type, "count");
+ ir_expression *const r01D1 = neg(r0175);
+ body.emit(assign(r01D0, expr(ir_unop_u2i, r01D1), 0x01));
+
+ ir_variable *const r01D2 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r01D2);
+ ir_variable *const r01D3 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r01D3);
+ ir_variable *const r01D4 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r01D4);
+ ir_variable *const r01D5 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r01D6 = neg(r01D0);
+ body.emit(assign(r01D5, bit_and(r01D6, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r01D8 = equal(r01D0, body.constant(int(0)));
+ ir_if *f01D7 = new(mem_ctx) ir_if(operand(r01D8).val);
+ exec_list *const f01D7_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f01D7->then_instructions;
+
+ body.emit(assign(r01D2, r0178, 0x01));
+
+ body.emit(assign(r01D3, r0177, 0x01));
+
+ body.emit(assign(r01D4, r0176, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f01D7->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r01DA = less(r01D0, body.constant(int(32)));
+ ir_if *f01D9 = new(mem_ctx) ir_if(operand(r01DA).val);
+ exec_list *const f01D9_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f01D9->then_instructions;
+
+ body.emit(assign(r01D2, lshift(r0177, r01D5), 0x01));
+
+ ir_expression *const r01DB = lshift(r0176, r01D5);
+ ir_expression *const r01DC = rshift(r0177, r01D0);
+ body.emit(assign(r01D3, bit_or(r01DB, r01DC), 0x01));
+
+ body.emit(assign(r01D4, rshift(r0176, r01D0), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f01D9->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r01DE = equal(r01D0, body.constant(int(32)));
+ ir_if *f01DD = new(mem_ctx) ir_if(operand(r01DE).val);
+ exec_list *const f01DD_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f01DD->then_instructions;
+
+ body.emit(assign(r01D2, r0177, 0x01));
+
+ body.emit(assign(r01D3, r0176, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f01DD->else_instructions;
+
+ body.emit(assign(r01CF, bit_or(r0178, r0177), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r01E0 = less(r01D0, body.constant(int(64)));
+ ir_if *f01DF = new(mem_ctx) ir_if(operand(r01E0).val);
+ exec_list *const f01DF_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f01DF->then_instructions;
+
+ body.emit(assign(r01D2, lshift(r0176, r01D5), 0x01));
+
+ ir_expression *const r01E1 = bit_and(r01D0, body.constant(int(31)));
+ body.emit(assign(r01D3, rshift(r0176, r01E1), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f01DF->else_instructions;
+
+ ir_variable *const r01E2 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r01E4 = equal(r01D0, body.constant(int(64)));
+ ir_if *f01E3 = new(mem_ctx) ir_if(operand(r01E4).val);
+ exec_list *const f01E3_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f01E3->then_instructions;
+
+ body.emit(assign(r01E2, r0176, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f01E3->else_instructions;
+
+ ir_expression *const r01E5 = nequal(r0176, body.constant(0u));
+ ir_expression *const r01E6 = expr(ir_unop_b2i, r01E5);
+ body.emit(assign(r01E2, expr(ir_unop_i2u, r01E6), 0x01));
+
+
+ body.instructions = f01E3_parent_instructions;
+ body.emit(f01E3);
+
+ /* END IF */
+
+ body.emit(assign(r01D2, r01E2, 0x01));
+
+ body.emit(assign(r01D3, body.constant(0u), 0x01));
+
+
+ body.instructions = f01DF_parent_instructions;
+ body.emit(f01DF);
+
+ /* END IF */
+
+
+ body.instructions = f01DD_parent_instructions;
+ body.emit(f01DD);
+
+ /* END IF */
+
+ body.emit(assign(r01D4, body.constant(0u), 0x01));
+
+
+ body.instructions = f01D9_parent_instructions;
+ body.emit(f01D9);
+
+ /* END IF */
+
+ ir_expression *const r01E7 = nequal(r01CF, body.constant(0u));
+ ir_expression *const r01E8 = expr(ir_unop_b2i, r01E7);
+ ir_expression *const r01E9 = expr(ir_unop_i2u, r01E8);
+ body.emit(assign(r01D2, bit_or(r01D2, r01E9), 0x01));
+
+
+ body.instructions = f01D7_parent_instructions;
+ body.emit(f01D7);
+
+ /* END IF */
+
+ body.emit(assign(r01B7, r01D4, 0x01));
+
+ body.emit(assign(r01B8, r01D3, 0x01));
+
+ body.emit(assign(r01B9, r01D2, 0x01));
+
+ body.emit(assign(r01B6, body.constant(0u), 0x01));
+
+ ir_expression *const r01EA = less(r01D2, body.constant(0u));
+ ir_expression *const r01EB = expr(ir_unop_b2i, r01EA);
+ body.emit(assign(r01BC, expr(ir_unop_i2u, r01EB), 0x01));
+
+
+ body.instructions = f01CD_parent_instructions;
+ body.emit(f01CD);
+
+ /* END IF */
+
+
+ body.instructions = f01CA_parent_instructions;
+ body.emit(f01CA);
+
+ /* END IF */
+
+
+ body.instructions = f01BF_parent_instructions;
+ body.emit(f01BF);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f01EC = new(mem_ctx) ir_if(operand(r01BA).val);
+ exec_list *const f01EC_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f01EC->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r01EE = nequal(r01BC, body.constant(0u));
+ ir_if *f01ED = new(mem_ctx) ir_if(operand(r01EE).val);
+ exec_list *const f01ED_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f01ED->then_instructions;
+
+ ir_variable *const r01EF = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r01EF);
+ body.emit(assign(r01EF, add(r01B8, body.constant(1u)), 0x01));
+
+ ir_expression *const r01F0 = less(r01EF, r01B8);
+ ir_expression *const r01F1 = expr(ir_unop_b2i, r01F0);
+ ir_expression *const r01F2 = expr(ir_unop_i2u, r01F1);
+ body.emit(assign(r01B7, add(r01B7, r01F2), 0x01));
+
+ ir_expression *const r01F3 = neg(r01B9);
+ ir_expression *const r01F4 = equal(r01B9, r01F3);
+ ir_expression *const r01F5 = expr(ir_unop_b2i, r01F4);
+ ir_expression *const r01F6 = expr(ir_unop_i2u, r01F5);
+ ir_expression *const r01F7 = bit_and(r01F6, body.constant(1u));
+ ir_expression *const r01F8 = expr(ir_unop_bit_not, r01F7);
+ body.emit(assign(r01B8, bit_and(r01EF, r01F8), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f01ED->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r01FA = bit_or(r01B7, r01B8);
+ ir_expression *const r01FB = equal(r01FA, body.constant(0u));
+ ir_if *f01F9 = new(mem_ctx) ir_if(operand(r01FB).val);
+ exec_list *const f01F9_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f01F9->then_instructions;
+
+ body.emit(assign(r01B6, body.constant(0u), 0x01));
+
+
+ body.instructions = f01F9_parent_instructions;
+ body.emit(f01F9);
+
+ /* END IF */
+
+
+ body.instructions = f01ED_parent_instructions;
+ body.emit(f01ED);
+
+ /* END IF */
+
+ ir_variable *const r01FC = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r01FC);
+ ir_expression *const r01FD = lshift(r0174, body.constant(int(31)));
+ ir_expression *const r01FE = lshift(r01B6, body.constant(int(20)));
+ ir_expression *const r01FF = add(r01FD, r01FE);
+ body.emit(assign(r01FC, add(r01FF, r01B7), 0x01));
+
+ body.emit(assign(r01FC, r01B8, 0x02));
+
+ body.emit(assign(r01BB, r01FC, 0x03));
+
+ body.emit(assign(r01BA, body.constant(false), 0x01));
+
+
+ body.instructions = f01EC_parent_instructions;
+ body.emit(f01EC);
+
+ /* END IF */
+
+ body.emit(ret(r01BB));
+
+ sig->replace_parameters(&sig_parameters);
+ return sig;
+}
+ir_function_signature *
+propagateFloat64NaN(void *mem_ctx, builtin_available_predicate avail)
+{
+ ir_function_signature *const sig =
+ new(mem_ctx) ir_function_signature(glsl_type::uvec2_type, avail);
+ ir_factory body(&sig->body, mem_ctx);
+ sig->is_defined = true;
+
+ exec_list sig_parameters;
+
+ ir_variable *const r0200 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "a", ir_var_function_in);
+ sig_parameters.push_tail(r0200);
+ ir_variable *const r0201 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "b", ir_var_function_in);
+ sig_parameters.push_tail(r0201);
+ ir_variable *const r0202 = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r0203 = body.make_temp(glsl_type::bool_type, "float64_is_nan_retval");
+ ir_expression *const r0204 = lshift(swizzle_y(r0200), body.constant(int(1)));
+ ir_expression *const r0205 = lequal(body.constant(4292870144u), r0204);
+ ir_expression *const r0206 = nequal(swizzle_x(r0200), body.constant(0u));
+ ir_expression *const r0207 = bit_and(swizzle_y(r0200), body.constant(1048575u));
+ ir_expression *const r0208 = nequal(r0207, body.constant(0u));
+ ir_expression *const r0209 = logic_or(r0206, r0208);
+ body.emit(assign(r0203, logic_and(r0205, r0209), 0x01));
+
+ ir_variable *const r020A = body.make_temp(glsl_type::bool_type, "float64_is_signaling_nan_retval");
+ ir_expression *const r020B = rshift(swizzle_y(r0200), body.constant(int(19)));
+ ir_expression *const r020C = bit_and(r020B, body.constant(4095u));
+ ir_expression *const r020D = equal(r020C, body.constant(4094u));
+ ir_expression *const r020E = nequal(swizzle_x(r0200), body.constant(0u));
+ ir_expression *const r020F = bit_and(swizzle_y(r0200), body.constant(524287u));
+ ir_expression *const r0210 = nequal(r020F, body.constant(0u));
+ ir_expression *const r0211 = logic_or(r020E, r0210);
+ body.emit(assign(r020A, logic_and(r020D, r0211), 0x01));
+
+ ir_variable *const r0212 = body.make_temp(glsl_type::bool_type, "float64_is_nan_retval");
+ ir_expression *const r0213 = lshift(swizzle_y(r0201), body.constant(int(1)));
+ ir_expression *const r0214 = lequal(body.constant(4292870144u), r0213);
+ ir_expression *const r0215 = nequal(swizzle_x(r0201), body.constant(0u));
+ ir_expression *const r0216 = bit_and(swizzle_y(r0201), body.constant(1048575u));
+ ir_expression *const r0217 = nequal(r0216, body.constant(0u));
+ ir_expression *const r0218 = logic_or(r0215, r0217);
+ body.emit(assign(r0212, logic_and(r0214, r0218), 0x01));
+
+ body.emit(assign(r0200, bit_or(swizzle_y(r0200), body.constant(524288u)), 0x02));
+
+ body.emit(assign(r0201, bit_or(swizzle_y(r0201), body.constant(524288u)), 0x02));
+
+ /* IF CONDITION */
+ ir_if *f0219 = new(mem_ctx) ir_if(operand(r0203).val);
+ exec_list *const f0219_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0219->then_instructions;
+
+ ir_variable *const r021A = body.make_temp(glsl_type::uvec2_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r021C = logic_and(r020A, r0212);
+ ir_if *f021B = new(mem_ctx) ir_if(operand(r021C).val);
+ exec_list *const f021B_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f021B->then_instructions;
+
+ body.emit(assign(r021A, r0201, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f021B->else_instructions;
+
+ body.emit(assign(r021A, r0200, 0x03));
+
+
+ body.instructions = f021B_parent_instructions;
+ body.emit(f021B);
+
+ /* END IF */
+
+ body.emit(assign(r0202, r021A, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0219->else_instructions;
+
+ body.emit(assign(r0202, r0201, 0x03));
+
+
+ body.instructions = f0219_parent_instructions;
+ body.emit(f0219);
+
+ /* END IF */
+
+ body.emit(ret(r0202));
+
+ sig->replace_parameters(&sig_parameters);
+ return sig;
+}
+ir_function_signature *
+addFloat64Fracs(void *mem_ctx, builtin_available_predicate avail)
+{
+ ir_function_signature *const sig =
+ new(mem_ctx) ir_function_signature(glsl_type::uvec2_type, avail);
+ ir_factory body(&sig->body, mem_ctx);
+ sig->is_defined = true;
+
+ exec_list sig_parameters;
+
+ ir_variable *const r021D = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "a", ir_var_function_in);
+ sig_parameters.push_tail(r021D);
+ ir_variable *const r021E = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "b", ir_var_function_in);
+ sig_parameters.push_tail(r021E);
+ ir_variable *const r021F = new(mem_ctx) ir_variable(glsl_type::uint_type, "zSign", ir_var_function_in);
+ sig_parameters.push_tail(r021F);
+ ir_variable *const r0220 = body.make_temp(glsl_type::bool_type, "execute_flag");
+ body.emit(assign(r0220, body.constant(true), 0x01));
+
+ ir_variable *const r0221 = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r0222 = new(mem_ctx) ir_variable(glsl_type::int_type, "expDiff", ir_var_auto);
+ body.emit(r0222);
+ ir_variable *const r0223 = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac2", ir_var_auto);
+ body.emit(r0223);
+ ir_variable *const r0224 = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac0", ir_var_auto);
+ body.emit(r0224);
+ ir_variable *const r0225 = new(mem_ctx) ir_variable(glsl_type::uint_type, "zExp", ir_var_auto);
+ body.emit(r0225);
+ ir_variable *const r0226 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "bFrac", ir_var_auto);
+ body.emit(r0226);
+ ir_variable *const r0227 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "aFrac", ir_var_auto);
+ body.emit(r0227);
+ body.emit(assign(r0224, body.constant(0u), 0x01));
+
+ body.emit(assign(r0223, body.constant(0u), 0x01));
+
+ ir_variable *const r0228 = body.make_temp(glsl_type::uvec2_type, "vec_ctor");
+ body.emit(assign(r0228, bit_and(swizzle_x(r021D), body.constant(1048575u)), 0x01));
+
+ body.emit(assign(r0228, swizzle_y(r021D), 0x02));
+
+ body.emit(assign(r0227, r0228, 0x03));
+
+ ir_variable *const r0229 = body.make_temp(glsl_type::uint_type, "extractFloat64Exp_retval");
+ ir_expression *const r022A = rshift(swizzle_x(r021D), body.constant(int(20)));
+ body.emit(assign(r0229, bit_and(r022A, body.constant(2047u)), 0x01));
+
+ ir_variable *const r022B = body.make_temp(glsl_type::uvec2_type, "vec_ctor");
+ body.emit(assign(r022B, bit_and(swizzle_x(r021E), body.constant(1048575u)), 0x01));
+
+ body.emit(assign(r022B, swizzle_y(r021E), 0x02));
+
+ body.emit(assign(r0226, r022B, 0x03));
+
+ ir_variable *const r022C = body.make_temp(glsl_type::uint_type, "extractFloat64Exp_retval");
+ ir_expression *const r022D = rshift(swizzle_x(r021E), body.constant(int(20)));
+ body.emit(assign(r022C, bit_and(r022D, body.constant(2047u)), 0x01));
+
+ ir_expression *const r022E = expr(ir_unop_u2i, r0229);
+ ir_expression *const r022F = expr(ir_unop_u2i, r022C);
+ body.emit(assign(r0222, sub(r022E, r022F), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0231 = less(body.constant(int(0)), r0222);
+ ir_if *f0230 = new(mem_ctx) ir_if(operand(r0231).val);
+ exec_list *const f0230_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0230->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0233 = equal(r0229, body.constant(2047u));
+ ir_if *f0232 = new(mem_ctx) ir_if(operand(r0233).val);
+ exec_list *const f0232_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0232->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0235 = bit_or(swizzle_x(r0228), swizzle_y(r021D));
+ ir_expression *const r0236 = nequal(r0235, body.constant(0u));
+ ir_if *f0234 = new(mem_ctx) ir_if(operand(r0236).val);
+ exec_list *const f0234_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0234->then_instructions;
+
+ ir_variable *const r0237 = body.make_temp(glsl_type::uvec2_type, "a");
+ body.emit(assign(r0237, swizzle_x(r021D), 0x01));
+
+ ir_variable *const r0238 = body.make_temp(glsl_type::uvec2_type, "b");
+ body.emit(assign(r0238, swizzle_x(r021E), 0x01));
+
+ ir_variable *const r0239 = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r023A = body.make_temp(glsl_type::bool_type, "float64_is_signaling_nan_retval");
+ ir_expression *const r023B = rshift(swizzle_y(r021D), body.constant(int(19)));
+ ir_expression *const r023C = bit_and(r023B, body.constant(4095u));
+ ir_expression *const r023D = equal(r023C, body.constant(4094u));
+ ir_expression *const r023E = nequal(swizzle_x(r021D), body.constant(0u));
+ ir_expression *const r023F = bit_and(swizzle_y(r021D), body.constant(524287u));
+ ir_expression *const r0240 = nequal(r023F, body.constant(0u));
+ ir_expression *const r0241 = logic_or(r023E, r0240);
+ body.emit(assign(r023A, logic_and(r023D, r0241), 0x01));
+
+ ir_variable *const r0242 = body.make_temp(glsl_type::bool_type, "float64_is_nan_retval");
+ ir_expression *const r0243 = lshift(swizzle_y(r021E), body.constant(int(1)));
+ ir_expression *const r0244 = lequal(body.constant(4292870144u), r0243);
+ ir_expression *const r0245 = nequal(swizzle_x(r021E), body.constant(0u));
+ ir_expression *const r0246 = bit_and(swizzle_y(r021E), body.constant(1048575u));
+ ir_expression *const r0247 = nequal(r0246, body.constant(0u));
+ ir_expression *const r0248 = logic_or(r0245, r0247);
+ body.emit(assign(r0242, logic_and(r0244, r0248), 0x01));
+
+ body.emit(assign(r0237, bit_or(swizzle_y(r021D), body.constant(524288u)), 0x02));
+
+ body.emit(assign(r0238, bit_or(swizzle_y(r021E), body.constant(524288u)), 0x02));
+
+ /* IF CONDITION */
+ ir_expression *const r024A = lshift(swizzle_y(r021D), body.constant(int(1)));
+ ir_expression *const r024B = lequal(body.constant(4292870144u), r024A);
+ ir_expression *const r024C = nequal(swizzle_x(r021D), body.constant(0u));
+ ir_expression *const r024D = bit_and(swizzle_y(r021D), body.constant(1048575u));
+ ir_expression *const r024E = nequal(r024D, body.constant(0u));
+ ir_expression *const r024F = logic_or(r024C, r024E);
+ ir_expression *const r0250 = logic_and(r024B, r024F);
+ ir_if *f0249 = new(mem_ctx) ir_if(operand(r0250).val);
+ exec_list *const f0249_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0249->then_instructions;
+
+ ir_variable *const r0251 = body.make_temp(glsl_type::uvec2_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0253 = logic_and(r023A, r0242);
+ ir_if *f0252 = new(mem_ctx) ir_if(operand(r0253).val);
+ exec_list *const f0252_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0252->then_instructions;
+
+ body.emit(assign(r0251, r0238, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0252->else_instructions;
+
+ body.emit(assign(r0251, r0237, 0x03));
+
+
+ body.instructions = f0252_parent_instructions;
+ body.emit(f0252);
+
+ /* END IF */
+
+ body.emit(assign(r0239, r0251, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0249->else_instructions;
+
+ body.emit(assign(r0239, r0238, 0x03));
+
+
+ body.instructions = f0249_parent_instructions;
+ body.emit(f0249);
+
+ /* END IF */
+
+ body.emit(assign(r0221, r0239, 0x03));
+
+ body.emit(assign(r0220, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0234->else_instructions;
+
+ body.emit(assign(r0221, r021D, 0x03));
+
+ body.emit(assign(r0220, body.constant(false), 0x01));
+
+
+ body.instructions = f0234_parent_instructions;
+ body.emit(f0234);
+
+ /* END IF */
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0232->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0255 = equal(r022C, body.constant(0u));
+ ir_if *f0254 = new(mem_ctx) ir_if(operand(r0255).val);
+ exec_list *const f0254_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0254->then_instructions;
+
+ body.emit(assign(r0222, add(r0222, body.constant(int(-1))), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0254->else_instructions;
+
+ body.emit(assign(r0226, bit_or(swizzle_x(r022B), body.constant(1048576u)), 0x01));
+
+
+ body.instructions = f0254_parent_instructions;
+ body.emit(f0254);
+
+ /* END IF */
+
+ ir_variable *const r0256 = body.make_temp(glsl_type::uint_type, "a0");
+ body.emit(assign(r0256, swizzle_x(r0226), 0x01));
+
+ ir_variable *const r0257 = body.make_temp(glsl_type::uint_type, "a1");
+ body.emit(assign(r0257, swizzle_y(r0226), 0x01));
+
+ ir_variable *const r0258 = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r0258, body.constant(0u), 0x01));
+
+ ir_variable *const r0259 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r0259);
+ ir_variable *const r025A = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r025A);
+ ir_variable *const r025B = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r025B);
+ ir_variable *const r025C = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r025D = neg(r0222);
+ body.emit(assign(r025C, bit_and(r025D, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r025F = equal(r0222, body.constant(int(0)));
+ ir_if *f025E = new(mem_ctx) ir_if(operand(r025F).val);
+ exec_list *const f025E_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f025E->then_instructions;
+
+ body.emit(assign(r0259, r0258, 0x01));
+
+ body.emit(assign(r025A, r0257, 0x01));
+
+ body.emit(assign(r025B, r0256, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f025E->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0261 = less(r0222, body.constant(int(32)));
+ ir_if *f0260 = new(mem_ctx) ir_if(operand(r0261).val);
+ exec_list *const f0260_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0260->then_instructions;
+
+ body.emit(assign(r0259, lshift(swizzle_y(r022B), r025C), 0x01));
+
+ ir_expression *const r0262 = lshift(swizzle_x(r0226), r025C);
+ ir_expression *const r0263 = rshift(swizzle_y(r022B), r0222);
+ body.emit(assign(r025A, bit_or(r0262, r0263), 0x01));
+
+ body.emit(assign(r025B, rshift(swizzle_x(r0226), r0222), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0260->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0265 = equal(r0222, body.constant(int(32)));
+ ir_if *f0264 = new(mem_ctx) ir_if(operand(r0265).val);
+ exec_list *const f0264_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0264->then_instructions;
+
+ body.emit(assign(r0259, r0257, 0x01));
+
+ body.emit(assign(r025A, r0256, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0264->else_instructions;
+
+ body.emit(assign(r0258, bit_or(body.constant(0u), swizzle_y(r022B)), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0267 = less(r0222, body.constant(int(64)));
+ ir_if *f0266 = new(mem_ctx) ir_if(operand(r0267).val);
+ exec_list *const f0266_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0266->then_instructions;
+
+ body.emit(assign(r0259, lshift(swizzle_x(r0226), r025C), 0x01));
+
+ ir_expression *const r0268 = bit_and(r0222, body.constant(int(31)));
+ body.emit(assign(r025A, rshift(swizzle_x(r0226), r0268), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0266->else_instructions;
+
+ ir_variable *const r0269 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r026B = equal(r0222, body.constant(int(64)));
+ ir_if *f026A = new(mem_ctx) ir_if(operand(r026B).val);
+ exec_list *const f026A_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f026A->then_instructions;
+
+ body.emit(assign(r0269, r0256, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f026A->else_instructions;
+
+ ir_expression *const r026C = nequal(swizzle_x(r0226), body.constant(0u));
+ ir_expression *const r026D = expr(ir_unop_b2i, r026C);
+ body.emit(assign(r0269, expr(ir_unop_i2u, r026D), 0x01));
+
+
+ body.instructions = f026A_parent_instructions;
+ body.emit(f026A);
+
+ /* END IF */
+
+ body.emit(assign(r0259, r0269, 0x01));
+
+ body.emit(assign(r025A, body.constant(0u), 0x01));
+
+
+ body.instructions = f0266_parent_instructions;
+ body.emit(f0266);
+
+ /* END IF */
+
+
+ body.instructions = f0264_parent_instructions;
+ body.emit(f0264);
+
+ /* END IF */
+
+ body.emit(assign(r025B, body.constant(0u), 0x01));
+
+
+ body.instructions = f0260_parent_instructions;
+ body.emit(f0260);
+
+ /* END IF */
+
+ ir_expression *const r026E = nequal(r0258, body.constant(0u));
+ ir_expression *const r026F = expr(ir_unop_b2i, r026E);
+ ir_expression *const r0270 = expr(ir_unop_i2u, r026F);
+ body.emit(assign(r0259, bit_or(r0259, r0270), 0x01));
+
+
+ body.instructions = f025E_parent_instructions;
+ body.emit(f025E);
+
+ /* END IF */
+
+ body.emit(assign(r0226, r025B, 0x01));
+
+ body.emit(assign(r0226, r025A, 0x02));
+
+ body.emit(assign(r0223, r0259, 0x01));
+
+ body.emit(assign(r0225, r0229, 0x01));
+
+
+ body.instructions = f0232_parent_instructions;
+ body.emit(f0232);
+
+ /* END IF */
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0230->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0272 = less(r0222, body.constant(int(0)));
+ ir_if *f0271 = new(mem_ctx) ir_if(operand(r0272).val);
+ exec_list *const f0271_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0271->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0274 = equal(r022C, body.constant(2047u));
+ ir_if *f0273 = new(mem_ctx) ir_if(operand(r0274).val);
+ exec_list *const f0273_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0273->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0276 = bit_or(swizzle_x(r0226), swizzle_y(r0226));
+ ir_expression *const r0277 = nequal(r0276, body.constant(0u));
+ ir_if *f0275 = new(mem_ctx) ir_if(operand(r0277).val);
+ exec_list *const f0275_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0275->then_instructions;
+
+ ir_variable *const r0278 = body.make_temp(glsl_type::uvec2_type, "a");
+ body.emit(assign(r0278, swizzle_x(r021D), 0x01));
+
+ ir_variable *const r0279 = body.make_temp(glsl_type::uvec2_type, "b");
+ body.emit(assign(r0279, swizzle_x(r021E), 0x01));
+
+ ir_variable *const r027A = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r027B = body.make_temp(glsl_type::bool_type, "float64_is_signaling_nan_retval");
+ ir_expression *const r027C = rshift(swizzle_y(r021D), body.constant(int(19)));
+ ir_expression *const r027D = bit_and(r027C, body.constant(4095u));
+ ir_expression *const r027E = equal(r027D, body.constant(4094u));
+ ir_expression *const r027F = nequal(swizzle_x(r021D), body.constant(0u));
+ ir_expression *const r0280 = bit_and(swizzle_y(r021D), body.constant(524287u));
+ ir_expression *const r0281 = nequal(r0280, body.constant(0u));
+ ir_expression *const r0282 = logic_or(r027F, r0281);
+ body.emit(assign(r027B, logic_and(r027E, r0282), 0x01));
+
+ ir_variable *const r0283 = body.make_temp(glsl_type::bool_type, "float64_is_nan_retval");
+ ir_expression *const r0284 = lshift(swizzle_y(r021E), body.constant(int(1)));
+ ir_expression *const r0285 = lequal(body.constant(4292870144u), r0284);
+ ir_expression *const r0286 = nequal(swizzle_x(r021E), body.constant(0u));
+ ir_expression *const r0287 = bit_and(swizzle_y(r021E), body.constant(1048575u));
+ ir_expression *const r0288 = nequal(r0287, body.constant(0u));
+ ir_expression *const r0289 = logic_or(r0286, r0288);
+ body.emit(assign(r0283, logic_and(r0285, r0289), 0x01));
+
+ body.emit(assign(r0278, bit_or(swizzle_y(r021D), body.constant(524288u)), 0x02));
+
+ body.emit(assign(r0279, bit_or(swizzle_y(r021E), body.constant(524288u)), 0x02));
+
+ /* IF CONDITION */
+ ir_expression *const r028B = lshift(swizzle_y(r021D), body.constant(int(1)));
+ ir_expression *const r028C = lequal(body.constant(4292870144u), r028B);
+ ir_expression *const r028D = nequal(swizzle_x(r021D), body.constant(0u));
+ ir_expression *const r028E = bit_and(swizzle_y(r021D), body.constant(1048575u));
+ ir_expression *const r028F = nequal(r028E, body.constant(0u));
+ ir_expression *const r0290 = logic_or(r028D, r028F);
+ ir_expression *const r0291 = logic_and(r028C, r0290);
+ ir_if *f028A = new(mem_ctx) ir_if(operand(r0291).val);
+ exec_list *const f028A_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f028A->then_instructions;
+
+ ir_variable *const r0292 = body.make_temp(glsl_type::uvec2_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0294 = logic_and(r027B, r0283);
+ ir_if *f0293 = new(mem_ctx) ir_if(operand(r0294).val);
+ exec_list *const f0293_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0293->then_instructions;
+
+ body.emit(assign(r0292, r0279, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0293->else_instructions;
+
+ body.emit(assign(r0292, r0278, 0x03));
+
+
+ body.instructions = f0293_parent_instructions;
+ body.emit(f0293);
+
+ /* END IF */
+
+ body.emit(assign(r027A, r0292, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f028A->else_instructions;
+
+ body.emit(assign(r027A, r0279, 0x03));
+
+
+ body.instructions = f028A_parent_instructions;
+ body.emit(f028A);
+
+ /* END IF */
+
+ body.emit(assign(r0221, r027A, 0x03));
+
+ body.emit(assign(r0220, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0275->else_instructions;
+
+ ir_variable *const r0295 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r0295);
+ ir_expression *const r0296 = lshift(r021F, body.constant(int(31)));
+ body.emit(assign(r0295, add(r0296, body.constant(2146435072u)), 0x01));
+
+ body.emit(assign(r0295, body.constant(0u), 0x02));
+
+ body.emit(assign(r0221, r0295, 0x03));
+
+ body.emit(assign(r0220, body.constant(false), 0x01));
+
+
+ body.instructions = f0275_parent_instructions;
+ body.emit(f0275);
+
+ /* END IF */
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0273->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0298 = equal(r0229, body.constant(0u));
+ ir_if *f0297 = new(mem_ctx) ir_if(operand(r0298).val);
+ exec_list *const f0297_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0297->then_instructions;
+
+ body.emit(assign(r0222, add(r0222, body.constant(int(1))), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0297->else_instructions;
+
+ body.emit(assign(r0227, bit_or(swizzle_x(r0228), body.constant(1048576u)), 0x01));
+
+
+ body.instructions = f0297_parent_instructions;
+ body.emit(f0297);
+
+ /* END IF */
+
+ ir_variable *const r0299 = body.make_temp(glsl_type::uint_type, "a0");
+ body.emit(assign(r0299, swizzle_x(r0227), 0x01));
+
+ ir_variable *const r029A = body.make_temp(glsl_type::uint_type, "a1");
+ body.emit(assign(r029A, swizzle_y(r0227), 0x01));
+
+ ir_variable *const r029B = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r029B, body.constant(0u), 0x01));
+
+ ir_variable *const r029C = body.make_temp(glsl_type::int_type, "count");
+ body.emit(assign(r029C, neg(r0222), 0x01));
+
+ ir_variable *const r029D = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r029D);
+ ir_variable *const r029E = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r029E);
+ ir_variable *const r029F = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r029F);
+ ir_variable *const r02A0 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r02A1 = neg(r029C);
+ body.emit(assign(r02A0, bit_and(r02A1, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r02A3 = equal(r029C, body.constant(int(0)));
+ ir_if *f02A2 = new(mem_ctx) ir_if(operand(r02A3).val);
+ exec_list *const f02A2_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f02A2->then_instructions;
+
+ body.emit(assign(r029D, r029B, 0x01));
+
+ body.emit(assign(r029E, r029A, 0x01));
+
+ body.emit(assign(r029F, r0299, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f02A2->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r02A5 = less(r029C, body.constant(int(32)));
+ ir_if *f02A4 = new(mem_ctx) ir_if(operand(r02A5).val);
+ exec_list *const f02A4_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f02A4->then_instructions;
+
+ body.emit(assign(r029D, lshift(swizzle_y(r0228), r02A0), 0x01));
+
+ ir_expression *const r02A6 = lshift(swizzle_x(r0227), r02A0);
+ ir_expression *const r02A7 = rshift(swizzle_y(r0228), r029C);
+ body.emit(assign(r029E, bit_or(r02A6, r02A7), 0x01));
+
+ body.emit(assign(r029F, rshift(swizzle_x(r0227), r029C), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f02A4->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r02A9 = equal(r029C, body.constant(int(32)));
+ ir_if *f02A8 = new(mem_ctx) ir_if(operand(r02A9).val);
+ exec_list *const f02A8_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f02A8->then_instructions;
+
+ body.emit(assign(r029D, r029A, 0x01));
+
+ body.emit(assign(r029E, r0299, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f02A8->else_instructions;
+
+ body.emit(assign(r029B, bit_or(body.constant(0u), swizzle_y(r0228)), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r02AB = less(r029C, body.constant(int(64)));
+ ir_if *f02AA = new(mem_ctx) ir_if(operand(r02AB).val);
+ exec_list *const f02AA_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f02AA->then_instructions;
+
+ body.emit(assign(r029D, lshift(swizzle_x(r0227), r02A0), 0x01));
+
+ ir_expression *const r02AC = bit_and(r029C, body.constant(int(31)));
+ body.emit(assign(r029E, rshift(swizzle_x(r0227), r02AC), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f02AA->else_instructions;
+
+ ir_variable *const r02AD = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r02AF = equal(r029C, body.constant(int(64)));
+ ir_if *f02AE = new(mem_ctx) ir_if(operand(r02AF).val);
+ exec_list *const f02AE_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f02AE->then_instructions;
+
+ body.emit(assign(r02AD, r0299, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f02AE->else_instructions;
+
+ ir_expression *const r02B0 = nequal(swizzle_x(r0227), body.constant(0u));
+ ir_expression *const r02B1 = expr(ir_unop_b2i, r02B0);
+ body.emit(assign(r02AD, expr(ir_unop_i2u, r02B1), 0x01));
+
+
+ body.instructions = f02AE_parent_instructions;
+ body.emit(f02AE);
+
+ /* END IF */
+
+ body.emit(assign(r029D, r02AD, 0x01));
+
+ body.emit(assign(r029E, body.constant(0u), 0x01));
+
+
+ body.instructions = f02AA_parent_instructions;
+ body.emit(f02AA);
+
+ /* END IF */
+
+
+ body.instructions = f02A8_parent_instructions;
+ body.emit(f02A8);
+
+ /* END IF */
+
+ body.emit(assign(r029F, body.constant(0u), 0x01));
+
+
+ body.instructions = f02A4_parent_instructions;
+ body.emit(f02A4);
+
+ /* END IF */
+
+ ir_expression *const r02B2 = nequal(r029B, body.constant(0u));
+ ir_expression *const r02B3 = expr(ir_unop_b2i, r02B2);
+ ir_expression *const r02B4 = expr(ir_unop_i2u, r02B3);
+ body.emit(assign(r029D, bit_or(r029D, r02B4), 0x01));
+
+
+ body.instructions = f02A2_parent_instructions;
+ body.emit(f02A2);
+
+ /* END IF */
+
+ body.emit(assign(r0227, r029F, 0x01));
+
+ body.emit(assign(r0227, r029E, 0x02));
+
+ body.emit(assign(r0223, r029D, 0x01));
+
+ body.emit(assign(r0225, r022C, 0x01));
+
+
+ body.instructions = f0273_parent_instructions;
+ body.emit(f0273);
+
+ /* END IF */
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0271->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r02B6 = equal(r0229, body.constant(2047u));
+ ir_if *f02B5 = new(mem_ctx) ir_if(operand(r02B6).val);
+ exec_list *const f02B5_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f02B5->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r02B8 = bit_or(swizzle_x(r0227), swizzle_y(r0227));
+ ir_expression *const r02B9 = bit_or(swizzle_x(r0226), swizzle_y(r0226));
+ ir_expression *const r02BA = bit_or(r02B8, r02B9);
+ ir_expression *const r02BB = nequal(r02BA, body.constant(0u));
+ ir_if *f02B7 = new(mem_ctx) ir_if(operand(r02BB).val);
+ exec_list *const f02B7_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f02B7->then_instructions;
+
+ ir_variable *const r02BC = body.make_temp(glsl_type::uvec2_type, "a");
+ body.emit(assign(r02BC, swizzle_x(r021D), 0x01));
+
+ ir_variable *const r02BD = body.make_temp(glsl_type::uvec2_type, "b");
+ body.emit(assign(r02BD, swizzle_x(r021E), 0x01));
+
+ ir_variable *const r02BE = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r02BF = body.make_temp(glsl_type::bool_type, "float64_is_signaling_nan_retval");
+ ir_expression *const r02C0 = rshift(swizzle_y(r021D), body.constant(int(19)));
+ ir_expression *const r02C1 = bit_and(r02C0, body.constant(4095u));
+ ir_expression *const r02C2 = equal(r02C1, body.constant(4094u));
+ ir_expression *const r02C3 = nequal(swizzle_x(r021D), body.constant(0u));
+ ir_expression *const r02C4 = bit_and(swizzle_y(r021D), body.constant(524287u));
+ ir_expression *const r02C5 = nequal(r02C4, body.constant(0u));
+ ir_expression *const r02C6 = logic_or(r02C3, r02C5);
+ body.emit(assign(r02BF, logic_and(r02C2, r02C6), 0x01));
+
+ ir_variable *const r02C7 = body.make_temp(glsl_type::bool_type, "float64_is_nan_retval");
+ ir_expression *const r02C8 = lshift(swizzle_y(r021E), body.constant(int(1)));
+ ir_expression *const r02C9 = lequal(body.constant(4292870144u), r02C8);
+ ir_expression *const r02CA = nequal(swizzle_x(r021E), body.constant(0u));
+ ir_expression *const r02CB = bit_and(swizzle_y(r021E), body.constant(1048575u));
+ ir_expression *const r02CC = nequal(r02CB, body.constant(0u));
+ ir_expression *const r02CD = logic_or(r02CA, r02CC);
+ body.emit(assign(r02C7, logic_and(r02C9, r02CD), 0x01));
+
+ body.emit(assign(r02BC, bit_or(swizzle_y(r021D), body.constant(524288u)), 0x02));
+
+ body.emit(assign(r02BD, bit_or(swizzle_y(r021E), body.constant(524288u)), 0x02));
+
+ /* IF CONDITION */
+ ir_expression *const r02CF = lshift(swizzle_y(r021D), body.constant(int(1)));
+ ir_expression *const r02D0 = lequal(body.constant(4292870144u), r02CF);
+ ir_expression *const r02D1 = nequal(swizzle_x(r021D), body.constant(0u));
+ ir_expression *const r02D2 = bit_and(swizzle_y(r021D), body.constant(1048575u));
+ ir_expression *const r02D3 = nequal(r02D2, body.constant(0u));
+ ir_expression *const r02D4 = logic_or(r02D1, r02D3);
+ ir_expression *const r02D5 = logic_and(r02D0, r02D4);
+ ir_if *f02CE = new(mem_ctx) ir_if(operand(r02D5).val);
+ exec_list *const f02CE_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f02CE->then_instructions;
+
+ ir_variable *const r02D6 = body.make_temp(glsl_type::uvec2_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r02D8 = logic_and(r02BF, r02C7);
+ ir_if *f02D7 = new(mem_ctx) ir_if(operand(r02D8).val);
+ exec_list *const f02D7_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f02D7->then_instructions;
+
+ body.emit(assign(r02D6, r02BD, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f02D7->else_instructions;
+
+ body.emit(assign(r02D6, r02BC, 0x03));
+
+
+ body.instructions = f02D7_parent_instructions;
+ body.emit(f02D7);
+
+ /* END IF */
+
+ body.emit(assign(r02BE, r02D6, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f02CE->else_instructions;
+
+ body.emit(assign(r02BE, r02BD, 0x03));
+
+
+ body.instructions = f02CE_parent_instructions;
+ body.emit(f02CE);
+
+ /* END IF */
+
+ body.emit(assign(r0221, r02BE, 0x03));
+
+ body.emit(assign(r0220, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f02B7->else_instructions;
+
+ body.emit(assign(r0221, r021D, 0x03));
+
+ body.emit(assign(r0220, body.constant(false), 0x01));
+
+
+ body.instructions = f02B7_parent_instructions;
+ body.emit(f02B7);
+
+ /* END IF */
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f02B5->else_instructions;
+
+ ir_variable *const r02D9 = body.make_temp(glsl_type::uint_type, "z0Ptr");
+ ir_variable *const r02DA = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r02DA);
+ body.emit(assign(r02DA, add(swizzle_y(r0227), swizzle_y(r0226)), 0x01));
+
+ ir_expression *const r02DB = add(swizzle_x(r0227), swizzle_x(r0226));
+ ir_expression *const r02DC = less(r02DA, swizzle_y(r0227));
+ ir_expression *const r02DD = expr(ir_unop_b2i, r02DC);
+ ir_expression *const r02DE = expr(ir_unop_i2u, r02DD);
+ body.emit(assign(r02D9, add(r02DB, r02DE), 0x01));
+
+ body.emit(assign(r0224, r02D9, 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r02E0 = equal(r0229, body.constant(0u));
+ ir_if *f02DF = new(mem_ctx) ir_if(operand(r02E0).val);
+ exec_list *const f02DF_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f02DF->then_instructions;
+
+ ir_variable *const r02E1 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r02E1);
+ ir_expression *const r02E2 = lshift(r021F, body.constant(int(31)));
+ body.emit(assign(r02E1, add(r02E2, r02D9), 0x01));
+
+ body.emit(assign(r02E1, r02DA, 0x02));
+
+ body.emit(assign(r0221, r02E1, 0x03));
+
+ body.emit(assign(r0220, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f02DF->else_instructions;
+
+ body.emit(assign(r0224, bit_or(r02D9, body.constant(2097152u)), 0x01));
+
+ body.emit(assign(r0225, r0229, 0x01));
+
+ ir_variable *const r02E3 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r02E3);
+ ir_variable *const r02E4 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r02E4);
+ ir_variable *const r02E5 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r02E5);
+ body.emit(assign(r02E3, lshift(r02DA, body.constant(int(31))), 0x01));
+
+ ir_expression *const r02E6 = lshift(r0224, body.constant(int(31)));
+ ir_expression *const r02E7 = rshift(r02DA, body.constant(int(1)));
+ body.emit(assign(r02E4, bit_or(r02E6, r02E7), 0x01));
+
+ body.emit(assign(r02E5, rshift(r0224, body.constant(int(1))), 0x01));
+
+ body.emit(assign(r02E3, bit_or(r02E3, body.constant(0u)), 0x01));
+
+ body.emit(assign(r0224, r02E5, 0x01));
+
+ body.emit(assign(r0223, r02E3, 0x01));
+
+ ir_variable *const r02E8 = body.make_temp(glsl_type::uint_type, "zExp");
+ body.emit(assign(r02E8, r0229, 0x01));
+
+ ir_variable *const r02E9 = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r02E9, r02E5, 0x01));
+
+ ir_variable *const r02EA = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r02EA, r02E4, 0x01));
+
+ ir_variable *const r02EB = body.make_temp(glsl_type::uint_type, "zFrac2");
+ body.emit(assign(r02EB, r02E3, 0x01));
+
+ ir_variable *const r02EC = body.make_temp(glsl_type::bool_type, "execute_flag");
+ body.emit(assign(r02EC, body.constant(true), 0x01));
+
+ ir_variable *const r02ED = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r02EE = new(mem_ctx) ir_variable(glsl_type::uint_type, "increment", ir_var_auto);
+ body.emit(r02EE);
+ ir_expression *const r02EF = less(r02E3, body.constant(0u));
+ ir_expression *const r02F0 = expr(ir_unop_b2i, r02EF);
+ body.emit(assign(r02EE, expr(ir_unop_i2u, r02F0), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r02F2 = lequal(body.constant(2045u), r0229);
+ ir_if *f02F1 = new(mem_ctx) ir_if(operand(r02F2).val);
+ exec_list *const f02F1_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f02F1->then_instructions;
+
+ ir_variable *const r02F3 = body.make_temp(glsl_type::bool_type, "or_tmp");
+ /* IF CONDITION */
+ ir_expression *const r02F5 = less(body.constant(2045u), r0229);
+ ir_if *f02F4 = new(mem_ctx) ir_if(operand(r02F5).val);
+ exec_list *const f02F4_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f02F4->then_instructions;
+
+ body.emit(assign(r02F3, body.constant(true), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f02F4->else_instructions;
+
+ ir_variable *const r02F6 = body.make_temp(glsl_type::bool_type, "and_tmp");
+ /* IF CONDITION */
+ ir_expression *const r02F8 = equal(r0229, body.constant(2045u));
+ ir_if *f02F7 = new(mem_ctx) ir_if(operand(r02F8).val);
+ exec_list *const f02F7_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f02F7->then_instructions;
+
+ ir_expression *const r02F9 = equal(body.constant(2097151u), r02E5);
+ ir_expression *const r02FA = equal(body.constant(4294967295u), r02E4);
+ body.emit(assign(r02F6, logic_and(r02F9, r02FA), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f02F7->else_instructions;
+
+ body.emit(assign(r02F6, body.constant(false), 0x01));
+
+
+ body.instructions = f02F7_parent_instructions;
+ body.emit(f02F7);
+
+ /* END IF */
+
+ ir_expression *const r02FB = nequal(r02EE, body.constant(0u));
+ body.emit(assign(r02F3, logic_and(r02F6, r02FB), 0x01));
+
+
+ body.instructions = f02F4_parent_instructions;
+ body.emit(f02F4);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f02FC = new(mem_ctx) ir_if(operand(r02F3).val);
+ exec_list *const f02FC_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f02FC->then_instructions;
+
+ ir_variable *const r02FD = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r02FD);
+ ir_expression *const r02FE = lshift(r021F, body.constant(int(31)));
+ body.emit(assign(r02FD, add(r02FE, body.constant(2146435072u)), 0x01));
+
+ body.emit(assign(r02FD, body.constant(0u), 0x02));
+
+ body.emit(assign(r02ED, r02FD, 0x03));
+
+ body.emit(assign(r02EC, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f02FC->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0300 = less(r0229, body.constant(0u));
+ ir_if *f02FF = new(mem_ctx) ir_if(operand(r0300).val);
+ exec_list *const f02FF_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f02FF->then_instructions;
+
+ ir_variable *const r0301 = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r0301, r02E3, 0x01));
+
+ ir_variable *const r0302 = body.make_temp(glsl_type::int_type, "count");
+ ir_expression *const r0303 = neg(r0229);
+ body.emit(assign(r0302, expr(ir_unop_u2i, r0303), 0x01));
+
+ ir_variable *const r0304 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r0304);
+ ir_variable *const r0305 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0305);
+ ir_variable *const r0306 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r0306);
+ ir_variable *const r0307 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r0308 = neg(r0302);
+ body.emit(assign(r0307, bit_and(r0308, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r030A = equal(r0302, body.constant(int(0)));
+ ir_if *f0309 = new(mem_ctx) ir_if(operand(r030A).val);
+ exec_list *const f0309_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0309->then_instructions;
+
+ body.emit(assign(r0304, r02E3, 0x01));
+
+ body.emit(assign(r0305, r02E4, 0x01));
+
+ body.emit(assign(r0306, r02E5, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0309->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r030C = less(r0302, body.constant(int(32)));
+ ir_if *f030B = new(mem_ctx) ir_if(operand(r030C).val);
+ exec_list *const f030B_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f030B->then_instructions;
+
+ body.emit(assign(r0304, lshift(r02E4, r0307), 0x01));
+
+ ir_expression *const r030D = lshift(r02E5, r0307);
+ ir_expression *const r030E = rshift(r02E4, r0302);
+ body.emit(assign(r0305, bit_or(r030D, r030E), 0x01));
+
+ body.emit(assign(r0306, rshift(r02E5, r0302), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f030B->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0310 = equal(r0302, body.constant(int(32)));
+ ir_if *f030F = new(mem_ctx) ir_if(operand(r0310).val);
+ exec_list *const f030F_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f030F->then_instructions;
+
+ body.emit(assign(r0304, r02E4, 0x01));
+
+ body.emit(assign(r0305, r02E5, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f030F->else_instructions;
+
+ body.emit(assign(r0301, bit_or(r02E3, r02E4), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0312 = less(r0302, body.constant(int(64)));
+ ir_if *f0311 = new(mem_ctx) ir_if(operand(r0312).val);
+ exec_list *const f0311_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0311->then_instructions;
+
+ body.emit(assign(r0304, lshift(r02E5, r0307), 0x01));
+
+ ir_expression *const r0313 = bit_and(r0302, body.constant(int(31)));
+ body.emit(assign(r0305, rshift(r02E5, r0313), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0311->else_instructions;
+
+ ir_variable *const r0314 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0316 = equal(r0302, body.constant(int(64)));
+ ir_if *f0315 = new(mem_ctx) ir_if(operand(r0316).val);
+ exec_list *const f0315_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0315->then_instructions;
+
+ body.emit(assign(r0314, r02E5, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0315->else_instructions;
+
+ ir_expression *const r0317 = nequal(r02E5, body.constant(0u));
+ ir_expression *const r0318 = expr(ir_unop_b2i, r0317);
+ body.emit(assign(r0314, expr(ir_unop_i2u, r0318), 0x01));
+
+
+ body.instructions = f0315_parent_instructions;
+ body.emit(f0315);
+
+ /* END IF */
+
+ body.emit(assign(r0304, r0314, 0x01));
+
+ body.emit(assign(r0305, body.constant(0u), 0x01));
+
+
+ body.instructions = f0311_parent_instructions;
+ body.emit(f0311);
+
+ /* END IF */
+
+
+ body.instructions = f030F_parent_instructions;
+ body.emit(f030F);
+
+ /* END IF */
+
+ body.emit(assign(r0306, body.constant(0u), 0x01));
+
+
+ body.instructions = f030B_parent_instructions;
+ body.emit(f030B);
+
+ /* END IF */
+
+ ir_expression *const r0319 = nequal(r0301, body.constant(0u));
+ ir_expression *const r031A = expr(ir_unop_b2i, r0319);
+ ir_expression *const r031B = expr(ir_unop_i2u, r031A);
+ body.emit(assign(r0304, bit_or(r0304, r031B), 0x01));
+
+
+ body.instructions = f0309_parent_instructions;
+ body.emit(f0309);
+
+ /* END IF */
+
+ body.emit(assign(r02E9, r0306, 0x01));
+
+ body.emit(assign(r02EA, r0305, 0x01));
+
+ body.emit(assign(r02EB, r0304, 0x01));
+
+ body.emit(assign(r02E8, body.constant(0u), 0x01));
+
+ ir_expression *const r031C = less(r0304, body.constant(0u));
+ ir_expression *const r031D = expr(ir_unop_b2i, r031C);
+ body.emit(assign(r02EE, expr(ir_unop_i2u, r031D), 0x01));
+
+
+ body.instructions = f02FF_parent_instructions;
+ body.emit(f02FF);
+
+ /* END IF */
+
+
+ body.instructions = f02FC_parent_instructions;
+ body.emit(f02FC);
+
+ /* END IF */
+
+
+ body.instructions = f02F1_parent_instructions;
+ body.emit(f02F1);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f031E = new(mem_ctx) ir_if(operand(r02EC).val);
+ exec_list *const f031E_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f031E->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0320 = nequal(r02EE, body.constant(0u));
+ ir_if *f031F = new(mem_ctx) ir_if(operand(r0320).val);
+ exec_list *const f031F_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f031F->then_instructions;
+
+ ir_variable *const r0321 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0321);
+ body.emit(assign(r0321, add(r02EA, body.constant(1u)), 0x01));
+
+ ir_expression *const r0322 = less(r0321, r02EA);
+ ir_expression *const r0323 = expr(ir_unop_b2i, r0322);
+ ir_expression *const r0324 = expr(ir_unop_i2u, r0323);
+ body.emit(assign(r02E9, add(r02E9, r0324), 0x01));
+
+ ir_expression *const r0325 = neg(r02EB);
+ ir_expression *const r0326 = equal(r02EB, r0325);
+ ir_expression *const r0327 = expr(ir_unop_b2i, r0326);
+ ir_expression *const r0328 = expr(ir_unop_i2u, r0327);
+ ir_expression *const r0329 = bit_and(r0328, body.constant(1u));
+ ir_expression *const r032A = expr(ir_unop_bit_not, r0329);
+ body.emit(assign(r02EA, bit_and(r0321, r032A), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f031F->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r032C = bit_or(r02E9, r02EA);
+ ir_expression *const r032D = equal(r032C, body.constant(0u));
+ ir_if *f032B = new(mem_ctx) ir_if(operand(r032D).val);
+ exec_list *const f032B_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f032B->then_instructions;
+
+ body.emit(assign(r02E8, body.constant(0u), 0x01));
+
+
+ body.instructions = f032B_parent_instructions;
+ body.emit(f032B);
+
+ /* END IF */
+
+
+ body.instructions = f031F_parent_instructions;
+ body.emit(f031F);
+
+ /* END IF */
+
+ ir_variable *const r032E = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r032E);
+ ir_expression *const r032F = lshift(r021F, body.constant(int(31)));
+ ir_expression *const r0330 = lshift(r02E8, body.constant(int(20)));
+ ir_expression *const r0331 = add(r032F, r0330);
+ body.emit(assign(r032E, add(r0331, r02E9), 0x01));
+
+ body.emit(assign(r032E, r02EA, 0x02));
+
+ body.emit(assign(r02ED, r032E, 0x03));
+
+ body.emit(assign(r02EC, body.constant(false), 0x01));
+
+
+ body.instructions = f031E_parent_instructions;
+ body.emit(f031E);
+
+ /* END IF */
+
+ body.emit(assign(r0221, r02ED, 0x03));
+
+ body.emit(assign(r0220, body.constant(false), 0x01));
+
+
+ body.instructions = f02DF_parent_instructions;
+ body.emit(f02DF);
+
+ /* END IF */
+
+
+ body.instructions = f02B5_parent_instructions;
+ body.emit(f02B5);
+
+ /* END IF */
+
+
+ body.instructions = f0271_parent_instructions;
+ body.emit(f0271);
+
+ /* END IF */
+
+
+ body.instructions = f0230_parent_instructions;
+ body.emit(f0230);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f0332 = new(mem_ctx) ir_if(operand(r0220).val);
+ exec_list *const f0332_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0332->then_instructions;
+
+ body.emit(assign(r0227, bit_or(swizzle_x(r0227), body.constant(1048576u)), 0x01));
+
+ ir_variable *const r0333 = body.make_temp(glsl_type::uint_type, "z0Ptr");
+ ir_variable *const r0334 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0334);
+ body.emit(assign(r0334, add(swizzle_y(r0227), swizzle_y(r0226)), 0x01));
+
+ ir_expression *const r0335 = add(swizzle_x(r0227), swizzle_x(r0226));
+ ir_expression *const r0336 = less(r0334, swizzle_y(r0227));
+ ir_expression *const r0337 = expr(ir_unop_b2i, r0336);
+ ir_expression *const r0338 = expr(ir_unop_i2u, r0337);
+ body.emit(assign(r0333, add(r0335, r0338), 0x01));
+
+ body.emit(assign(r0224, r0333, 0x01));
+
+ body.emit(assign(r0225, add(r0225, body.constant(4294967295u)), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r033A = less(r0333, body.constant(2097152u));
+ ir_if *f0339 = new(mem_ctx) ir_if(operand(r033A).val);
+ exec_list *const f0339_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0339->then_instructions;
+
+ ir_variable *const r033B = body.make_temp(glsl_type::uint_type, "zExp");
+ body.emit(assign(r033B, r0225, 0x01));
+
+ ir_variable *const r033C = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r033C, r0333, 0x01));
+
+ ir_variable *const r033D = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r033D, r0223, 0x01));
+
+ ir_variable *const r033E = body.make_temp(glsl_type::uint_type, "zFrac2");
+ body.emit(assign(r033E, r0223, 0x01));
+
+ ir_variable *const r033F = body.make_temp(glsl_type::bool_type, "execute_flag");
+ body.emit(assign(r033F, body.constant(true), 0x01));
+
+ ir_variable *const r0340 = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r0341 = new(mem_ctx) ir_variable(glsl_type::uint_type, "increment", ir_var_auto);
+ body.emit(r0341);
+ ir_expression *const r0342 = less(r0223, body.constant(0u));
+ ir_expression *const r0343 = expr(ir_unop_b2i, r0342);
+ body.emit(assign(r0341, expr(ir_unop_i2u, r0343), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0345 = lequal(body.constant(2045u), r0225);
+ ir_if *f0344 = new(mem_ctx) ir_if(operand(r0345).val);
+ exec_list *const f0344_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0344->then_instructions;
+
+ ir_variable *const r0346 = body.make_temp(glsl_type::bool_type, "or_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0348 = less(body.constant(2045u), r0225);
+ ir_if *f0347 = new(mem_ctx) ir_if(operand(r0348).val);
+ exec_list *const f0347_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0347->then_instructions;
+
+ body.emit(assign(r0346, body.constant(true), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0347->else_instructions;
+
+ ir_variable *const r0349 = body.make_temp(glsl_type::bool_type, "and_tmp");
+ /* IF CONDITION */
+ ir_expression *const r034B = equal(r0225, body.constant(2045u));
+ ir_if *f034A = new(mem_ctx) ir_if(operand(r034B).val);
+ exec_list *const f034A_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f034A->then_instructions;
+
+ ir_expression *const r034C = equal(body.constant(2097151u), r0333);
+ ir_expression *const r034D = equal(body.constant(4294967295u), r0223);
+ body.emit(assign(r0349, logic_and(r034C, r034D), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f034A->else_instructions;
+
+ body.emit(assign(r0349, body.constant(false), 0x01));
+
+
+ body.instructions = f034A_parent_instructions;
+ body.emit(f034A);
+
+ /* END IF */
+
+ ir_expression *const r034E = nequal(r0341, body.constant(0u));
+ body.emit(assign(r0346, logic_and(r0349, r034E), 0x01));
+
+
+ body.instructions = f0347_parent_instructions;
+ body.emit(f0347);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f034F = new(mem_ctx) ir_if(operand(r0346).val);
+ exec_list *const f034F_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f034F->then_instructions;
+
+ ir_variable *const r0350 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r0350);
+ ir_expression *const r0351 = lshift(r021F, body.constant(int(31)));
+ body.emit(assign(r0350, add(r0351, body.constant(2146435072u)), 0x01));
+
+ body.emit(assign(r0350, body.constant(0u), 0x02));
+
+ body.emit(assign(r0340, r0350, 0x03));
+
+ body.emit(assign(r033F, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f034F->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0353 = less(r0225, body.constant(0u));
+ ir_if *f0352 = new(mem_ctx) ir_if(operand(r0353).val);
+ exec_list *const f0352_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0352->then_instructions;
+
+ ir_variable *const r0354 = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r0354, r0223, 0x01));
+
+ ir_variable *const r0355 = body.make_temp(glsl_type::int_type, "count");
+ ir_expression *const r0356 = neg(r0225);
+ body.emit(assign(r0355, expr(ir_unop_u2i, r0356), 0x01));
+
+ ir_variable *const r0357 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r0357);
+ ir_variable *const r0358 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0358);
+ ir_variable *const r0359 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r0359);
+ ir_variable *const r035A = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r035B = neg(r0355);
+ body.emit(assign(r035A, bit_and(r035B, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r035D = equal(r0355, body.constant(int(0)));
+ ir_if *f035C = new(mem_ctx) ir_if(operand(r035D).val);
+ exec_list *const f035C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f035C->then_instructions;
+
+ body.emit(assign(r0357, r0223, 0x01));
+
+ body.emit(assign(r0358, r0223, 0x01));
+
+ body.emit(assign(r0359, r0333, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f035C->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r035F = less(r0355, body.constant(int(32)));
+ ir_if *f035E = new(mem_ctx) ir_if(operand(r035F).val);
+ exec_list *const f035E_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f035E->then_instructions;
+
+ body.emit(assign(r0357, lshift(r0223, r035A), 0x01));
+
+ ir_expression *const r0360 = lshift(r0333, r035A);
+ ir_expression *const r0361 = rshift(r0223, r0355);
+ body.emit(assign(r0358, bit_or(r0360, r0361), 0x01));
+
+ body.emit(assign(r0359, rshift(r0333, r0355), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f035E->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0363 = equal(r0355, body.constant(int(32)));
+ ir_if *f0362 = new(mem_ctx) ir_if(operand(r0363).val);
+ exec_list *const f0362_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0362->then_instructions;
+
+ body.emit(assign(r0357, r0223, 0x01));
+
+ body.emit(assign(r0358, r0333, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0362->else_instructions;
+
+ body.emit(assign(r0354, bit_or(r0223, r0223), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0365 = less(r0355, body.constant(int(64)));
+ ir_if *f0364 = new(mem_ctx) ir_if(operand(r0365).val);
+ exec_list *const f0364_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0364->then_instructions;
+
+ body.emit(assign(r0357, lshift(r0333, r035A), 0x01));
+
+ ir_expression *const r0366 = bit_and(r0355, body.constant(int(31)));
+ body.emit(assign(r0358, rshift(r0333, r0366), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0364->else_instructions;
+
+ ir_variable *const r0367 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0369 = equal(r0355, body.constant(int(64)));
+ ir_if *f0368 = new(mem_ctx) ir_if(operand(r0369).val);
+ exec_list *const f0368_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0368->then_instructions;
+
+ body.emit(assign(r0367, r0333, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0368->else_instructions;
+
+ ir_expression *const r036A = nequal(r0333, body.constant(0u));
+ ir_expression *const r036B = expr(ir_unop_b2i, r036A);
+ body.emit(assign(r0367, expr(ir_unop_i2u, r036B), 0x01));
+
+
+ body.instructions = f0368_parent_instructions;
+ body.emit(f0368);
+
+ /* END IF */
+
+ body.emit(assign(r0357, r0367, 0x01));
+
+ body.emit(assign(r0358, body.constant(0u), 0x01));
+
+
+ body.instructions = f0364_parent_instructions;
+ body.emit(f0364);
+
+ /* END IF */
+
+
+ body.instructions = f0362_parent_instructions;
+ body.emit(f0362);
+
+ /* END IF */
+
+ body.emit(assign(r0359, body.constant(0u), 0x01));
+
+
+ body.instructions = f035E_parent_instructions;
+ body.emit(f035E);
+
+ /* END IF */
+
+ ir_expression *const r036C = nequal(r0354, body.constant(0u));
+ ir_expression *const r036D = expr(ir_unop_b2i, r036C);
+ ir_expression *const r036E = expr(ir_unop_i2u, r036D);
+ body.emit(assign(r0357, bit_or(r0357, r036E), 0x01));
+
+
+ body.instructions = f035C_parent_instructions;
+ body.emit(f035C);
+
+ /* END IF */
+
+ body.emit(assign(r033C, r0359, 0x01));
+
+ body.emit(assign(r033D, r0358, 0x01));
+
+ body.emit(assign(r033E, r0357, 0x01));
+
+ body.emit(assign(r033B, body.constant(0u), 0x01));
+
+ ir_expression *const r036F = less(r0357, body.constant(0u));
+ ir_expression *const r0370 = expr(ir_unop_b2i, r036F);
+ body.emit(assign(r0341, expr(ir_unop_i2u, r0370), 0x01));
+
+
+ body.instructions = f0352_parent_instructions;
+ body.emit(f0352);
+
+ /* END IF */
+
+
+ body.instructions = f034F_parent_instructions;
+ body.emit(f034F);
+
+ /* END IF */
+
+
+ body.instructions = f0344_parent_instructions;
+ body.emit(f0344);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f0371 = new(mem_ctx) ir_if(operand(r033F).val);
+ exec_list *const f0371_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0371->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0373 = nequal(r0341, body.constant(0u));
+ ir_if *f0372 = new(mem_ctx) ir_if(operand(r0373).val);
+ exec_list *const f0372_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0372->then_instructions;
+
+ ir_variable *const r0374 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0374);
+ body.emit(assign(r0374, add(r033D, body.constant(1u)), 0x01));
+
+ ir_expression *const r0375 = less(r0374, r033D);
+ ir_expression *const r0376 = expr(ir_unop_b2i, r0375);
+ ir_expression *const r0377 = expr(ir_unop_i2u, r0376);
+ body.emit(assign(r033C, add(r033C, r0377), 0x01));
+
+ ir_expression *const r0378 = neg(r033E);
+ ir_expression *const r0379 = equal(r033E, r0378);
+ ir_expression *const r037A = expr(ir_unop_b2i, r0379);
+ ir_expression *const r037B = expr(ir_unop_i2u, r037A);
+ ir_expression *const r037C = bit_and(r037B, body.constant(1u));
+ ir_expression *const r037D = expr(ir_unop_bit_not, r037C);
+ body.emit(assign(r033D, bit_and(r0374, r037D), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0372->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r037F = bit_or(r033C, r033D);
+ ir_expression *const r0380 = equal(r037F, body.constant(0u));
+ ir_if *f037E = new(mem_ctx) ir_if(operand(r0380).val);
+ exec_list *const f037E_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f037E->then_instructions;
+
+ body.emit(assign(r033B, body.constant(0u), 0x01));
+
+
+ body.instructions = f037E_parent_instructions;
+ body.emit(f037E);
+
+ /* END IF */
+
+
+ body.instructions = f0372_parent_instructions;
+ body.emit(f0372);
+
+ /* END IF */
+
+ ir_variable *const r0381 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r0381);
+ ir_expression *const r0382 = lshift(r021F, body.constant(int(31)));
+ ir_expression *const r0383 = lshift(r033B, body.constant(int(20)));
+ ir_expression *const r0384 = add(r0382, r0383);
+ body.emit(assign(r0381, add(r0384, r033C), 0x01));
+
+ body.emit(assign(r0381, r033D, 0x02));
+
+ body.emit(assign(r0340, r0381, 0x03));
+
+ body.emit(assign(r033F, body.constant(false), 0x01));
+
+
+ body.instructions = f0371_parent_instructions;
+ body.emit(f0371);
+
+ /* END IF */
+
+ body.emit(assign(r0221, r0340, 0x03));
+
+ body.emit(assign(r0220, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0339->else_instructions;
+
+ body.emit(assign(r0225, add(r0225, body.constant(1u)), 0x01));
+
+ ir_variable *const r0385 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r0385);
+ ir_variable *const r0386 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0386);
+ ir_variable *const r0387 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r0387);
+ body.emit(assign(r0385, lshift(r0334, body.constant(int(31))), 0x01));
+
+ ir_expression *const r0388 = lshift(r0333, body.constant(int(31)));
+ ir_expression *const r0389 = rshift(r0334, body.constant(int(1)));
+ body.emit(assign(r0386, bit_or(r0388, r0389), 0x01));
+
+ body.emit(assign(r0387, rshift(r0333, body.constant(int(1))), 0x01));
+
+ ir_expression *const r038A = nequal(r0223, body.constant(0u));
+ ir_expression *const r038B = expr(ir_unop_b2i, r038A);
+ ir_expression *const r038C = expr(ir_unop_i2u, r038B);
+ body.emit(assign(r0385, bit_or(r0385, r038C), 0x01));
+
+ body.emit(assign(r0224, r0387, 0x01));
+
+ body.emit(assign(r0223, r0385, 0x01));
+
+ ir_variable *const r038D = body.make_temp(glsl_type::uint_type, "zExp");
+ body.emit(assign(r038D, r0225, 0x01));
+
+ ir_variable *const r038E = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r038E, r0387, 0x01));
+
+ ir_variable *const r038F = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r038F, r0386, 0x01));
+
+ ir_variable *const r0390 = body.make_temp(glsl_type::uint_type, "zFrac2");
+ body.emit(assign(r0390, r0385, 0x01));
+
+ ir_variable *const r0391 = body.make_temp(glsl_type::bool_type, "execute_flag");
+ body.emit(assign(r0391, body.constant(true), 0x01));
+
+ ir_variable *const r0392 = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r0393 = new(mem_ctx) ir_variable(glsl_type::uint_type, "increment", ir_var_auto);
+ body.emit(r0393);
+ ir_expression *const r0394 = less(r0385, body.constant(0u));
+ ir_expression *const r0395 = expr(ir_unop_b2i, r0394);
+ body.emit(assign(r0393, expr(ir_unop_i2u, r0395), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0397 = lequal(body.constant(2045u), r0225);
+ ir_if *f0396 = new(mem_ctx) ir_if(operand(r0397).val);
+ exec_list *const f0396_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0396->then_instructions;
+
+ ir_variable *const r0398 = body.make_temp(glsl_type::bool_type, "or_tmp");
+ /* IF CONDITION */
+ ir_expression *const r039A = less(body.constant(2045u), r0225);
+ ir_if *f0399 = new(mem_ctx) ir_if(operand(r039A).val);
+ exec_list *const f0399_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0399->then_instructions;
+
+ body.emit(assign(r0398, body.constant(true), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0399->else_instructions;
+
+ ir_variable *const r039B = body.make_temp(glsl_type::bool_type, "and_tmp");
+ /* IF CONDITION */
+ ir_expression *const r039D = equal(r0225, body.constant(2045u));
+ ir_if *f039C = new(mem_ctx) ir_if(operand(r039D).val);
+ exec_list *const f039C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f039C->then_instructions;
+
+ ir_expression *const r039E = equal(body.constant(2097151u), r0387);
+ ir_expression *const r039F = equal(body.constant(4294967295u), r0386);
+ body.emit(assign(r039B, logic_and(r039E, r039F), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f039C->else_instructions;
+
+ body.emit(assign(r039B, body.constant(false), 0x01));
+
+
+ body.instructions = f039C_parent_instructions;
+ body.emit(f039C);
+
+ /* END IF */
+
+ ir_expression *const r03A0 = nequal(r0393, body.constant(0u));
+ body.emit(assign(r0398, logic_and(r039B, r03A0), 0x01));
+
+
+ body.instructions = f0399_parent_instructions;
+ body.emit(f0399);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f03A1 = new(mem_ctx) ir_if(operand(r0398).val);
+ exec_list *const f03A1_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f03A1->then_instructions;
+
+ ir_variable *const r03A2 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r03A2);
+ ir_expression *const r03A3 = lshift(r021F, body.constant(int(31)));
+ body.emit(assign(r03A2, add(r03A3, body.constant(2146435072u)), 0x01));
+
+ body.emit(assign(r03A2, body.constant(0u), 0x02));
+
+ body.emit(assign(r0392, r03A2, 0x03));
+
+ body.emit(assign(r0391, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f03A1->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r03A5 = less(r0225, body.constant(0u));
+ ir_if *f03A4 = new(mem_ctx) ir_if(operand(r03A5).val);
+ exec_list *const f03A4_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f03A4->then_instructions;
+
+ ir_variable *const r03A6 = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r03A6, r0385, 0x01));
+
+ ir_variable *const r03A7 = body.make_temp(glsl_type::int_type, "count");
+ ir_expression *const r03A8 = neg(r0225);
+ body.emit(assign(r03A7, expr(ir_unop_u2i, r03A8), 0x01));
+
+ ir_variable *const r03A9 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r03A9);
+ ir_variable *const r03AA = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r03AA);
+ ir_variable *const r03AB = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r03AB);
+ ir_variable *const r03AC = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r03AD = neg(r03A7);
+ body.emit(assign(r03AC, bit_and(r03AD, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r03AF = equal(r03A7, body.constant(int(0)));
+ ir_if *f03AE = new(mem_ctx) ir_if(operand(r03AF).val);
+ exec_list *const f03AE_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f03AE->then_instructions;
+
+ body.emit(assign(r03A9, r0385, 0x01));
+
+ body.emit(assign(r03AA, r0386, 0x01));
+
+ body.emit(assign(r03AB, r0387, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f03AE->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r03B1 = less(r03A7, body.constant(int(32)));
+ ir_if *f03B0 = new(mem_ctx) ir_if(operand(r03B1).val);
+ exec_list *const f03B0_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f03B0->then_instructions;
+
+ body.emit(assign(r03A9, lshift(r0386, r03AC), 0x01));
+
+ ir_expression *const r03B2 = lshift(r0387, r03AC);
+ ir_expression *const r03B3 = rshift(r0386, r03A7);
+ body.emit(assign(r03AA, bit_or(r03B2, r03B3), 0x01));
+
+ body.emit(assign(r03AB, rshift(r0387, r03A7), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f03B0->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r03B5 = equal(r03A7, body.constant(int(32)));
+ ir_if *f03B4 = new(mem_ctx) ir_if(operand(r03B5).val);
+ exec_list *const f03B4_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f03B4->then_instructions;
+
+ body.emit(assign(r03A9, r0386, 0x01));
+
+ body.emit(assign(r03AA, r0387, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f03B4->else_instructions;
+
+ body.emit(assign(r03A6, bit_or(r0385, r0386), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r03B7 = less(r03A7, body.constant(int(64)));
+ ir_if *f03B6 = new(mem_ctx) ir_if(operand(r03B7).val);
+ exec_list *const f03B6_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f03B6->then_instructions;
+
+ body.emit(assign(r03A9, lshift(r0387, r03AC), 0x01));
+
+ ir_expression *const r03B8 = bit_and(r03A7, body.constant(int(31)));
+ body.emit(assign(r03AA, rshift(r0387, r03B8), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f03B6->else_instructions;
+
+ ir_variable *const r03B9 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r03BB = equal(r03A7, body.constant(int(64)));
+ ir_if *f03BA = new(mem_ctx) ir_if(operand(r03BB).val);
+ exec_list *const f03BA_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f03BA->then_instructions;
+
+ body.emit(assign(r03B9, r0387, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f03BA->else_instructions;
+
+ ir_expression *const r03BC = nequal(r0387, body.constant(0u));
+ ir_expression *const r03BD = expr(ir_unop_b2i, r03BC);
+ body.emit(assign(r03B9, expr(ir_unop_i2u, r03BD), 0x01));
+
+
+ body.instructions = f03BA_parent_instructions;
+ body.emit(f03BA);
+
+ /* END IF */
+
+ body.emit(assign(r03A9, r03B9, 0x01));
+
+ body.emit(assign(r03AA, body.constant(0u), 0x01));
+
+
+ body.instructions = f03B6_parent_instructions;
+ body.emit(f03B6);
+
+ /* END IF */
+
+
+ body.instructions = f03B4_parent_instructions;
+ body.emit(f03B4);
+
+ /* END IF */
+
+ body.emit(assign(r03AB, body.constant(0u), 0x01));
+
+
+ body.instructions = f03B0_parent_instructions;
+ body.emit(f03B0);
+
+ /* END IF */
+
+ ir_expression *const r03BE = nequal(r03A6, body.constant(0u));
+ ir_expression *const r03BF = expr(ir_unop_b2i, r03BE);
+ ir_expression *const r03C0 = expr(ir_unop_i2u, r03BF);
+ body.emit(assign(r03A9, bit_or(r03A9, r03C0), 0x01));
+
+
+ body.instructions = f03AE_parent_instructions;
+ body.emit(f03AE);
+
+ /* END IF */
+
+ body.emit(assign(r038E, r03AB, 0x01));
+
+ body.emit(assign(r038F, r03AA, 0x01));
+
+ body.emit(assign(r0390, r03A9, 0x01));
+
+ body.emit(assign(r038D, body.constant(0u), 0x01));
+
+ ir_expression *const r03C1 = less(r03A9, body.constant(0u));
+ ir_expression *const r03C2 = expr(ir_unop_b2i, r03C1);
+ body.emit(assign(r0393, expr(ir_unop_i2u, r03C2), 0x01));
+
+
+ body.instructions = f03A4_parent_instructions;
+ body.emit(f03A4);
+
+ /* END IF */
+
+
+ body.instructions = f03A1_parent_instructions;
+ body.emit(f03A1);
+
+ /* END IF */
+
+
+ body.instructions = f0396_parent_instructions;
+ body.emit(f0396);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f03C3 = new(mem_ctx) ir_if(operand(r0391).val);
+ exec_list *const f03C3_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f03C3->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r03C5 = nequal(r0393, body.constant(0u));
+ ir_if *f03C4 = new(mem_ctx) ir_if(operand(r03C5).val);
+ exec_list *const f03C4_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f03C4->then_instructions;
+
+ ir_variable *const r03C6 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r03C6);
+ body.emit(assign(r03C6, add(r038F, body.constant(1u)), 0x01));
+
+ ir_expression *const r03C7 = less(r03C6, r038F);
+ ir_expression *const r03C8 = expr(ir_unop_b2i, r03C7);
+ ir_expression *const r03C9 = expr(ir_unop_i2u, r03C8);
+ body.emit(assign(r038E, add(r038E, r03C9), 0x01));
+
+ ir_expression *const r03CA = neg(r0390);
+ ir_expression *const r03CB = equal(r0390, r03CA);
+ ir_expression *const r03CC = expr(ir_unop_b2i, r03CB);
+ ir_expression *const r03CD = expr(ir_unop_i2u, r03CC);
+ ir_expression *const r03CE = bit_and(r03CD, body.constant(1u));
+ ir_expression *const r03CF = expr(ir_unop_bit_not, r03CE);
+ body.emit(assign(r038F, bit_and(r03C6, r03CF), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f03C4->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r03D1 = bit_or(r038E, r038F);
+ ir_expression *const r03D2 = equal(r03D1, body.constant(0u));
+ ir_if *f03D0 = new(mem_ctx) ir_if(operand(r03D2).val);
+ exec_list *const f03D0_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f03D0->then_instructions;
+
+ body.emit(assign(r038D, body.constant(0u), 0x01));
+
+
+ body.instructions = f03D0_parent_instructions;
+ body.emit(f03D0);
+
+ /* END IF */
+
+
+ body.instructions = f03C4_parent_instructions;
+ body.emit(f03C4);
+
+ /* END IF */
+
+ ir_variable *const r03D3 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r03D3);
+ ir_expression *const r03D4 = lshift(r021F, body.constant(int(31)));
+ ir_expression *const r03D5 = lshift(r038D, body.constant(int(20)));
+ ir_expression *const r03D6 = add(r03D4, r03D5);
+ body.emit(assign(r03D3, add(r03D6, r038E), 0x01));
+
+ body.emit(assign(r03D3, r038F, 0x02));
+
+ body.emit(assign(r0392, r03D3, 0x03));
+
+ body.emit(assign(r0391, body.constant(false), 0x01));
+
+
+ body.instructions = f03C3_parent_instructions;
+ body.emit(f03C3);
+
+ /* END IF */
+
+ body.emit(assign(r0221, r0392, 0x03));
+
+ body.emit(assign(r0220, body.constant(false), 0x01));
+
+
+ body.instructions = f0339_parent_instructions;
+ body.emit(f0339);
+
+ /* END IF */
+
+
+ body.instructions = f0332_parent_instructions;
+ body.emit(f0332);
+
+ /* END IF */
+
+ body.emit(ret(r0221));
+
+ sig->replace_parameters(&sig_parameters);
+ return sig;
+}
+ir_function_signature *
+subFloat64Fracs(void *mem_ctx, builtin_available_predicate avail)
+{
+ ir_function_signature *const sig =
+ new(mem_ctx) ir_function_signature(glsl_type::uvec2_type, avail);
+ ir_factory body(&sig->body, mem_ctx);
+ sig->is_defined = true;
+
+ exec_list sig_parameters;
+
+ ir_variable *const r03D7 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "a", ir_var_function_in);
+ sig_parameters.push_tail(r03D7);
+ ir_variable *const r03D8 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "b", ir_var_function_in);
+ sig_parameters.push_tail(r03D8);
+ ir_variable *const r03D9 = new(mem_ctx) ir_variable(glsl_type::uint_type, "zSign", ir_var_function_in);
+ sig_parameters.push_tail(r03D9);
+ ir_variable *const r03DA = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r03DB = new(mem_ctx) ir_variable(glsl_type::int_type, "expDiff", ir_var_auto);
+ body.emit(r03DB);
+ ir_variable *const r03DC = new(mem_ctx) ir_variable(glsl_type::uint_type, "zExp", ir_var_auto);
+ body.emit(r03DC);
+ ir_variable *const r03DD = new(mem_ctx) ir_variable(glsl_type::uint_type, "bExp", ir_var_auto);
+ body.emit(r03DD);
+ ir_variable *const r03DE = new(mem_ctx) ir_variable(glsl_type::uint_type, "aExp", ir_var_auto);
+ body.emit(r03DE);
+ ir_variable *const r03DF = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "bFrac", ir_var_auto);
+ body.emit(r03DF);
+ ir_variable *const r03E0 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "aFrac", ir_var_auto);
+ body.emit(r03E0);
+ ir_variable *const r03E1 = body.make_temp(glsl_type::uvec2_type, "vec_ctor");
+ body.emit(assign(r03E1, bit_and(swizzle_x(r03D7), body.constant(1048575u)), 0x01));
+
+ body.emit(assign(r03E1, swizzle_y(r03D7), 0x02));
+
+ ir_variable *const r03E2 = body.make_temp(glsl_type::uint_type, "extractFloat64Exp_retval");
+ ir_expression *const r03E3 = rshift(swizzle_x(r03D7), body.constant(int(20)));
+ body.emit(assign(r03E2, bit_and(r03E3, body.constant(2047u)), 0x01));
+
+ body.emit(assign(r03DE, r03E2, 0x01));
+
+ ir_variable *const r03E4 = body.make_temp(glsl_type::uvec2_type, "vec_ctor");
+ body.emit(assign(r03E4, bit_and(swizzle_x(r03D8), body.constant(1048575u)), 0x01));
+
+ body.emit(assign(r03E4, swizzle_y(r03D8), 0x02));
+
+ ir_variable *const r03E5 = body.make_temp(glsl_type::uint_type, "extractFloat64Exp_retval");
+ ir_expression *const r03E6 = rshift(swizzle_x(r03D8), body.constant(int(20)));
+ body.emit(assign(r03E5, bit_and(r03E6, body.constant(2047u)), 0x01));
+
+ body.emit(assign(r03DD, r03E5, 0x01));
+
+ ir_expression *const r03E7 = expr(ir_unop_u2i, r03E2);
+ ir_expression *const r03E8 = expr(ir_unop_u2i, r03E5);
+ body.emit(assign(r03DB, sub(r03E7, r03E8), 0x01));
+
+ ir_variable *const r03E9 = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r03E9, lshift(swizzle_y(r03D7), body.constant(int(10))), 0x01));
+
+ ir_variable *const r03EA = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ ir_expression *const r03EB = lshift(swizzle_x(r03E1), body.constant(int(10)));
+ ir_expression *const r03EC = rshift(swizzle_y(r03D7), body.constant(int(22)));
+ body.emit(assign(r03EA, bit_or(r03EB, r03EC), 0x01));
+
+ body.emit(assign(r03E0, r03EA, 0x01));
+
+ body.emit(assign(r03E0, r03E9, 0x02));
+
+ ir_variable *const r03ED = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r03ED, lshift(swizzle_y(r03D8), body.constant(int(10))), 0x01));
+
+ ir_variable *const r03EE = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ ir_expression *const r03EF = lshift(swizzle_x(r03E4), body.constant(int(10)));
+ ir_expression *const r03F0 = rshift(swizzle_y(r03D8), body.constant(int(22)));
+ body.emit(assign(r03EE, bit_or(r03EF, r03F0), 0x01));
+
+ body.emit(assign(r03DF, r03EE, 0x01));
+
+ body.emit(assign(r03DF, r03ED, 0x02));
+
+ /* IF CONDITION */
+ ir_expression *const r03F2 = less(body.constant(int(0)), r03DB);
+ ir_if *f03F1 = new(mem_ctx) ir_if(operand(r03F2).val);
+ exec_list *const f03F1_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f03F1->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r03F4 = equal(r03E2, body.constant(2047u));
+ ir_if *f03F3 = new(mem_ctx) ir_if(operand(r03F4).val);
+ exec_list *const f03F3_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f03F3->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r03F6 = bit_or(r03EA, r03E9);
+ ir_expression *const r03F7 = nequal(r03F6, body.constant(0u));
+ ir_if *f03F5 = new(mem_ctx) ir_if(operand(r03F7).val);
+ exec_list *const f03F5_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f03F5->then_instructions;
+
+ ir_variable *const r03F8 = body.make_temp(glsl_type::uvec2_type, "a");
+ body.emit(assign(r03F8, swizzle_x(r03D7), 0x01));
+
+ ir_variable *const r03F9 = body.make_temp(glsl_type::uvec2_type, "b");
+ body.emit(assign(r03F9, swizzle_x(r03D8), 0x01));
+
+ ir_variable *const r03FA = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r03FB = body.make_temp(glsl_type::bool_type, "float64_is_signaling_nan_retval");
+ ir_expression *const r03FC = rshift(swizzle_y(r03D7), body.constant(int(19)));
+ ir_expression *const r03FD = bit_and(r03FC, body.constant(4095u));
+ ir_expression *const r03FE = equal(r03FD, body.constant(4094u));
+ ir_expression *const r03FF = nequal(swizzle_x(r03D7), body.constant(0u));
+ ir_expression *const r0400 = bit_and(swizzle_y(r03D7), body.constant(524287u));
+ ir_expression *const r0401 = nequal(r0400, body.constant(0u));
+ ir_expression *const r0402 = logic_or(r03FF, r0401);
+ body.emit(assign(r03FB, logic_and(r03FE, r0402), 0x01));
+
+ ir_variable *const r0403 = body.make_temp(glsl_type::bool_type, "float64_is_nan_retval");
+ ir_expression *const r0404 = lshift(swizzle_y(r03D8), body.constant(int(1)));
+ ir_expression *const r0405 = lequal(body.constant(4292870144u), r0404);
+ ir_expression *const r0406 = nequal(swizzle_x(r03D8), body.constant(0u));
+ ir_expression *const r0407 = bit_and(swizzle_y(r03D8), body.constant(1048575u));
+ ir_expression *const r0408 = nequal(r0407, body.constant(0u));
+ ir_expression *const r0409 = logic_or(r0406, r0408);
+ body.emit(assign(r0403, logic_and(r0405, r0409), 0x01));
+
+ body.emit(assign(r03F8, bit_or(swizzle_y(r03D7), body.constant(524288u)), 0x02));
+
+ body.emit(assign(r03F9, bit_or(swizzle_y(r03D8), body.constant(524288u)), 0x02));
+
+ /* IF CONDITION */
+ ir_expression *const r040B = lshift(swizzle_y(r03D7), body.constant(int(1)));
+ ir_expression *const r040C = lequal(body.constant(4292870144u), r040B);
+ ir_expression *const r040D = nequal(swizzle_x(r03D7), body.constant(0u));
+ ir_expression *const r040E = bit_and(swizzle_y(r03D7), body.constant(1048575u));
+ ir_expression *const r040F = nequal(r040E, body.constant(0u));
+ ir_expression *const r0410 = logic_or(r040D, r040F);
+ ir_expression *const r0411 = logic_and(r040C, r0410);
+ ir_if *f040A = new(mem_ctx) ir_if(operand(r0411).val);
+ exec_list *const f040A_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f040A->then_instructions;
+
+ ir_variable *const r0412 = body.make_temp(glsl_type::uvec2_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0414 = logic_and(r03FB, r0403);
+ ir_if *f0413 = new(mem_ctx) ir_if(operand(r0414).val);
+ exec_list *const f0413_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0413->then_instructions;
+
+ body.emit(assign(r0412, r03F9, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0413->else_instructions;
+
+ body.emit(assign(r0412, r03F8, 0x03));
+
+
+ body.instructions = f0413_parent_instructions;
+ body.emit(f0413);
+
+ /* END IF */
+
+ body.emit(assign(r03FA, r0412, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f040A->else_instructions;
+
+ body.emit(assign(r03FA, r03F9, 0x03));
+
+
+ body.instructions = f040A_parent_instructions;
+ body.emit(f040A);
+
+ /* END IF */
+
+ body.emit(assign(r03DA, r03FA, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f03F5->else_instructions;
+
+ body.emit(assign(r03DA, r03D7, 0x03));
+
+
+ body.instructions = f03F5_parent_instructions;
+ body.emit(f03F5);
+
+ /* END IF */
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f03F3->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0416 = equal(r03E5, body.constant(0u));
+ ir_if *f0415 = new(mem_ctx) ir_if(operand(r0416).val);
+ exec_list *const f0415_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0415->then_instructions;
+
+ body.emit(assign(r03DB, add(r03DB, body.constant(int(-1))), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0415->else_instructions;
+
+ body.emit(assign(r03DF, bit_or(r03EE, body.constant(1073741824u)), 0x01));
+
+
+ body.instructions = f0415_parent_instructions;
+ body.emit(f0415);
+
+ /* END IF */
+
+ ir_variable *const r0417 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0417);
+ ir_variable *const r0418 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r0418);
+ ir_variable *const r0419 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r041A = neg(r03DB);
+ body.emit(assign(r0419, bit_and(r041A, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r041C = equal(r03DB, body.constant(int(0)));
+ ir_if *f041B = new(mem_ctx) ir_if(operand(r041C).val);
+ exec_list *const f041B_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f041B->then_instructions;
+
+ body.emit(assign(r0417, swizzle_y(r03DF), 0x01));
+
+ body.emit(assign(r0418, swizzle_x(r03DF), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f041B->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r041E = less(r03DB, body.constant(int(32)));
+ ir_if *f041D = new(mem_ctx) ir_if(operand(r041E).val);
+ exec_list *const f041D_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f041D->then_instructions;
+
+ ir_expression *const r041F = lshift(swizzle_x(r03DF), r0419);
+ ir_expression *const r0420 = rshift(r03ED, r03DB);
+ ir_expression *const r0421 = bit_or(r041F, r0420);
+ ir_expression *const r0422 = lshift(r03ED, r0419);
+ ir_expression *const r0423 = nequal(r0422, body.constant(0u));
+ ir_expression *const r0424 = expr(ir_unop_b2i, r0423);
+ ir_expression *const r0425 = expr(ir_unop_i2u, r0424);
+ body.emit(assign(r0417, bit_or(r0421, r0425), 0x01));
+
+ body.emit(assign(r0418, rshift(swizzle_x(r03DF), r03DB), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f041D->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0427 = equal(r03DB, body.constant(int(32)));
+ ir_if *f0426 = new(mem_ctx) ir_if(operand(r0427).val);
+ exec_list *const f0426_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0426->then_instructions;
+
+ ir_expression *const r0428 = nequal(r03ED, body.constant(0u));
+ ir_expression *const r0429 = expr(ir_unop_b2i, r0428);
+ ir_expression *const r042A = expr(ir_unop_i2u, r0429);
+ body.emit(assign(r0417, bit_or(swizzle_x(r03DF), r042A), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0426->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r042C = less(r03DB, body.constant(int(64)));
+ ir_if *f042B = new(mem_ctx) ir_if(operand(r042C).val);
+ exec_list *const f042B_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f042B->then_instructions;
+
+ ir_expression *const r042D = bit_and(r03DB, body.constant(int(31)));
+ ir_expression *const r042E = rshift(swizzle_x(r03DF), r042D);
+ ir_expression *const r042F = lshift(swizzle_x(r03DF), r0419);
+ ir_expression *const r0430 = bit_or(r042F, r03ED);
+ ir_expression *const r0431 = nequal(r0430, body.constant(0u));
+ ir_expression *const r0432 = expr(ir_unop_b2i, r0431);
+ ir_expression *const r0433 = expr(ir_unop_i2u, r0432);
+ body.emit(assign(r0417, bit_or(r042E, r0433), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f042B->else_instructions;
+
+ ir_expression *const r0434 = bit_or(swizzle_x(r03DF), r03ED);
+ ir_expression *const r0435 = nequal(r0434, body.constant(0u));
+ ir_expression *const r0436 = expr(ir_unop_b2i, r0435);
+ body.emit(assign(r0417, expr(ir_unop_i2u, r0436), 0x01));
+
+
+ body.instructions = f042B_parent_instructions;
+ body.emit(f042B);
+
+ /* END IF */
+
+
+ body.instructions = f0426_parent_instructions;
+ body.emit(f0426);
+
+ /* END IF */
+
+ body.emit(assign(r0418, body.constant(0u), 0x01));
+
+
+ body.instructions = f041D_parent_instructions;
+ body.emit(f041D);
+
+ /* END IF */
+
+
+ body.instructions = f041B_parent_instructions;
+ body.emit(f041B);
+
+ /* END IF */
+
+ body.emit(assign(r03DF, r0418, 0x01));
+
+ body.emit(assign(r03DF, r0417, 0x02));
+
+ body.emit(assign(r03E0, bit_or(r03EA, body.constant(1073741824u)), 0x01));
+
+ ir_variable *const r0437 = body.make_temp(glsl_type::uint_type, "z0Ptr");
+ ir_variable *const r0438 = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r0438, sub(r03E9, r0417), 0x01));
+
+ ir_expression *const r0439 = sub(swizzle_x(r03E0), r0418);
+ ir_expression *const r043A = less(r03E9, r0417);
+ ir_expression *const r043B = expr(ir_unop_b2i, r043A);
+ ir_expression *const r043C = expr(ir_unop_i2u, r043B);
+ body.emit(assign(r0437, sub(r0439, r043C), 0x01));
+
+ body.emit(assign(r03DC, add(r03E2, body.constant(4294967295u)), 0x01));
+
+ ir_variable *const r043D = body.make_temp(glsl_type::uint_type, "zExp");
+ body.emit(assign(r043D, add(r03DC, body.constant(4294967286u)), 0x01));
+
+ ir_variable *const r043E = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r043E, r0437, 0x01));
+
+ ir_variable *const r043F = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r043F, r0438, 0x01));
+
+ ir_variable *const r0440 = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac2", ir_var_auto);
+ body.emit(r0440);
+ ir_variable *const r0441 = new(mem_ctx) ir_variable(glsl_type::int_type, "shiftCount", ir_var_auto);
+ body.emit(r0441);
+ /* IF CONDITION */
+ ir_expression *const r0443 = equal(r0437, body.constant(0u));
+ ir_if *f0442 = new(mem_ctx) ir_if(operand(r0443).val);
+ exec_list *const f0442_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0442->then_instructions;
+
+ body.emit(assign(r043E, r0438, 0x01));
+
+ body.emit(assign(r043F, body.constant(0u), 0x01));
+
+ body.emit(assign(r043D, add(r043D, body.constant(4294967264u)), 0x01));
+
+
+ body.instructions = f0442_parent_instructions;
+ body.emit(f0442);
+
+ /* END IF */
+
+ ir_variable *const r0444 = body.make_temp(glsl_type::uint_type, "a");
+ body.emit(assign(r0444, r043E, 0x01));
+
+ ir_variable *const r0445 = body.make_temp(glsl_type::uint_type, "return_value");
+ ir_variable *const r0446 = new(mem_ctx) ir_variable(glsl_type::uint_type, "shiftCount", ir_var_auto);
+ body.emit(r0446);
+ /* IF CONDITION */
+ ir_expression *const r0448 = equal(r043E, body.constant(0u));
+ ir_if *f0447 = new(mem_ctx) ir_if(operand(r0448).val);
+ exec_list *const f0447_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0447->then_instructions;
+
+ body.emit(assign(r0445, body.constant(32u), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0447->else_instructions;
+
+ body.emit(assign(r0446, body.constant(0u), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r044A = bit_and(r043E, body.constant(4294901760u));
+ ir_expression *const r044B = equal(r044A, body.constant(0u));
+ ir_if *f0449 = new(mem_ctx) ir_if(operand(r044B).val);
+ exec_list *const f0449_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0449->then_instructions;
+
+ body.emit(assign(r0446, body.constant(16u), 0x01));
+
+ body.emit(assign(r0444, lshift(r043E, body.constant(int(16))), 0x01));
+
+
+ body.instructions = f0449_parent_instructions;
+ body.emit(f0449);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r044D = bit_and(r0444, body.constant(4278190080u));
+ ir_expression *const r044E = equal(r044D, body.constant(0u));
+ ir_if *f044C = new(mem_ctx) ir_if(operand(r044E).val);
+ exec_list *const f044C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f044C->then_instructions;
+
+ body.emit(assign(r0446, add(r0446, body.constant(8u)), 0x01));
+
+ body.emit(assign(r0444, lshift(r0444, body.constant(int(8))), 0x01));
+
+
+ body.instructions = f044C_parent_instructions;
+ body.emit(f044C);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0450 = bit_and(r0444, body.constant(4026531840u));
+ ir_expression *const r0451 = equal(r0450, body.constant(0u));
+ ir_if *f044F = new(mem_ctx) ir_if(operand(r0451).val);
+ exec_list *const f044F_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f044F->then_instructions;
+
+ body.emit(assign(r0446, add(r0446, body.constant(4u)), 0x01));
+
+ body.emit(assign(r0444, lshift(r0444, body.constant(int(4))), 0x01));
+
+
+ body.instructions = f044F_parent_instructions;
+ body.emit(f044F);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0453 = bit_and(r0444, body.constant(3221225472u));
+ ir_expression *const r0454 = equal(r0453, body.constant(0u));
+ ir_if *f0452 = new(mem_ctx) ir_if(operand(r0454).val);
+ exec_list *const f0452_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0452->then_instructions;
+
+ body.emit(assign(r0446, add(r0446, body.constant(2u)), 0x01));
+
+ body.emit(assign(r0444, lshift(r0444, body.constant(int(2))), 0x01));
+
+
+ body.instructions = f0452_parent_instructions;
+ body.emit(f0452);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0456 = bit_and(r0444, body.constant(2147483648u));
+ ir_expression *const r0457 = equal(r0456, body.constant(0u));
+ ir_if *f0455 = new(mem_ctx) ir_if(operand(r0457).val);
+ exec_list *const f0455_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0455->then_instructions;
+
+ body.emit(assign(r0446, add(r0446, body.constant(1u)), 0x01));
+
+
+ body.instructions = f0455_parent_instructions;
+ body.emit(f0455);
+
+ /* END IF */
+
+ body.emit(assign(r0445, r0446, 0x01));
+
+
+ body.instructions = f0447_parent_instructions;
+ body.emit(f0447);
+
+ /* END IF */
+
+ ir_expression *const r0458 = expr(ir_unop_u2i, r0445);
+ body.emit(assign(r0441, add(r0458, body.constant(int(-11))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r045A = lequal(body.constant(int(0)), r0441);
+ ir_if *f0459 = new(mem_ctx) ir_if(operand(r045A).val);
+ exec_list *const f0459_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0459->then_instructions;
+
+ body.emit(assign(r0440, body.constant(0u), 0x01));
+
+ ir_variable *const r045B = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r045B, lshift(r043F, r0441), 0x01));
+
+ ir_variable *const r045C = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r045E = equal(r0441, body.constant(int(0)));
+ ir_if *f045D = new(mem_ctx) ir_if(operand(r045E).val);
+ exec_list *const f045D_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f045D->then_instructions;
+
+ body.emit(assign(r045C, r043E, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f045D->else_instructions;
+
+ ir_expression *const r045F = lshift(r043E, r0441);
+ ir_expression *const r0460 = neg(r0441);
+ ir_expression *const r0461 = bit_and(r0460, body.constant(int(31)));
+ ir_expression *const r0462 = rshift(r043F, r0461);
+ body.emit(assign(r045C, bit_or(r045F, r0462), 0x01));
+
+
+ body.instructions = f045D_parent_instructions;
+ body.emit(f045D);
+
+ /* END IF */
+
+ body.emit(assign(r043E, r045C, 0x01));
+
+ body.emit(assign(r043F, r045B, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0459->else_instructions;
+
+ ir_variable *const r0463 = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r0463, body.constant(0u), 0x01));
+
+ ir_variable *const r0464 = body.make_temp(glsl_type::int_type, "count");
+ body.emit(assign(r0464, neg(r0441), 0x01));
+
+ ir_variable *const r0465 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r0465);
+ ir_variable *const r0466 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0466);
+ ir_variable *const r0467 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r0467);
+ ir_variable *const r0468 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r0469 = neg(r0464);
+ body.emit(assign(r0468, bit_and(r0469, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r046B = equal(r0464, body.constant(int(0)));
+ ir_if *f046A = new(mem_ctx) ir_if(operand(r046B).val);
+ exec_list *const f046A_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f046A->then_instructions;
+
+ body.emit(assign(r0465, r0463, 0x01));
+
+ body.emit(assign(r0466, r043F, 0x01));
+
+ body.emit(assign(r0467, r043E, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f046A->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r046D = less(r0464, body.constant(int(32)));
+ ir_if *f046C = new(mem_ctx) ir_if(operand(r046D).val);
+ exec_list *const f046C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f046C->then_instructions;
+
+ body.emit(assign(r0465, lshift(r043F, r0468), 0x01));
+
+ ir_expression *const r046E = lshift(r043E, r0468);
+ ir_expression *const r046F = rshift(r043F, r0464);
+ body.emit(assign(r0466, bit_or(r046E, r046F), 0x01));
+
+ body.emit(assign(r0467, rshift(r043E, r0464), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f046C->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0471 = equal(r0464, body.constant(int(32)));
+ ir_if *f0470 = new(mem_ctx) ir_if(operand(r0471).val);
+ exec_list *const f0470_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0470->then_instructions;
+
+ body.emit(assign(r0465, r043F, 0x01));
+
+ body.emit(assign(r0466, r043E, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0470->else_instructions;
+
+ body.emit(assign(r0463, bit_or(body.constant(0u), r043F), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0473 = less(r0464, body.constant(int(64)));
+ ir_if *f0472 = new(mem_ctx) ir_if(operand(r0473).val);
+ exec_list *const f0472_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0472->then_instructions;
+
+ body.emit(assign(r0465, lshift(r043E, r0468), 0x01));
+
+ ir_expression *const r0474 = bit_and(r0464, body.constant(int(31)));
+ body.emit(assign(r0466, rshift(r043E, r0474), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0472->else_instructions;
+
+ ir_variable *const r0475 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0477 = equal(r0464, body.constant(int(64)));
+ ir_if *f0476 = new(mem_ctx) ir_if(operand(r0477).val);
+ exec_list *const f0476_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0476->then_instructions;
+
+ body.emit(assign(r0475, r043E, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0476->else_instructions;
+
+ ir_expression *const r0478 = nequal(r043E, body.constant(0u));
+ ir_expression *const r0479 = expr(ir_unop_b2i, r0478);
+ body.emit(assign(r0475, expr(ir_unop_i2u, r0479), 0x01));
+
+
+ body.instructions = f0476_parent_instructions;
+ body.emit(f0476);
+
+ /* END IF */
+
+ body.emit(assign(r0465, r0475, 0x01));
+
+ body.emit(assign(r0466, body.constant(0u), 0x01));
+
+
+ body.instructions = f0472_parent_instructions;
+ body.emit(f0472);
+
+ /* END IF */
+
+
+ body.instructions = f0470_parent_instructions;
+ body.emit(f0470);
+
+ /* END IF */
+
+ body.emit(assign(r0467, body.constant(0u), 0x01));
+
+
+ body.instructions = f046C_parent_instructions;
+ body.emit(f046C);
+
+ /* END IF */
+
+ ir_expression *const r047A = nequal(r0463, body.constant(0u));
+ ir_expression *const r047B = expr(ir_unop_b2i, r047A);
+ ir_expression *const r047C = expr(ir_unop_i2u, r047B);
+ body.emit(assign(r0465, bit_or(r0465, r047C), 0x01));
+
+
+ body.instructions = f046A_parent_instructions;
+ body.emit(f046A);
+
+ /* END IF */
+
+ body.emit(assign(r043E, r0467, 0x01));
+
+ body.emit(assign(r043F, r0466, 0x01));
+
+ body.emit(assign(r0440, r0465, 0x01));
+
+
+ body.instructions = f0459_parent_instructions;
+ body.emit(f0459);
+
+ /* END IF */
+
+ ir_expression *const r047D = expr(ir_unop_i2u, r0441);
+ body.emit(assign(r043D, sub(r043D, r047D), 0x01));
+
+ ir_variable *const r047E = body.make_temp(glsl_type::uint_type, "zExp");
+ body.emit(assign(r047E, r043D, 0x01));
+
+ ir_variable *const r047F = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r047F, r043E, 0x01));
+
+ ir_variable *const r0480 = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r0480, r043F, 0x01));
+
+ ir_variable *const r0481 = body.make_temp(glsl_type::uint_type, "zFrac2");
+ body.emit(assign(r0481, r0440, 0x01));
+
+ ir_variable *const r0482 = body.make_temp(glsl_type::bool_type, "execute_flag");
+ body.emit(assign(r0482, body.constant(true), 0x01));
+
+ ir_variable *const r0483 = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r0484 = new(mem_ctx) ir_variable(glsl_type::uint_type, "increment", ir_var_auto);
+ body.emit(r0484);
+ ir_expression *const r0485 = less(r0440, body.constant(0u));
+ ir_expression *const r0486 = expr(ir_unop_b2i, r0485);
+ body.emit(assign(r0484, expr(ir_unop_i2u, r0486), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0488 = lequal(body.constant(2045u), r043D);
+ ir_if *f0487 = new(mem_ctx) ir_if(operand(r0488).val);
+ exec_list *const f0487_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0487->then_instructions;
+
+ ir_variable *const r0489 = body.make_temp(glsl_type::bool_type, "or_tmp");
+ /* IF CONDITION */
+ ir_expression *const r048B = less(body.constant(2045u), r043D);
+ ir_if *f048A = new(mem_ctx) ir_if(operand(r048B).val);
+ exec_list *const f048A_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f048A->then_instructions;
+
+ body.emit(assign(r0489, body.constant(true), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f048A->else_instructions;
+
+ ir_variable *const r048C = body.make_temp(glsl_type::bool_type, "and_tmp");
+ /* IF CONDITION */
+ ir_expression *const r048E = equal(r043D, body.constant(2045u));
+ ir_if *f048D = new(mem_ctx) ir_if(operand(r048E).val);
+ exec_list *const f048D_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f048D->then_instructions;
+
+ ir_expression *const r048F = equal(body.constant(2097151u), r043E);
+ ir_expression *const r0490 = equal(body.constant(4294967295u), r043F);
+ body.emit(assign(r048C, logic_and(r048F, r0490), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f048D->else_instructions;
+
+ body.emit(assign(r048C, body.constant(false), 0x01));
+
+
+ body.instructions = f048D_parent_instructions;
+ body.emit(f048D);
+
+ /* END IF */
+
+ ir_expression *const r0491 = nequal(r0484, body.constant(0u));
+ body.emit(assign(r0489, logic_and(r048C, r0491), 0x01));
+
+
+ body.instructions = f048A_parent_instructions;
+ body.emit(f048A);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f0492 = new(mem_ctx) ir_if(operand(r0489).val);
+ exec_list *const f0492_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0492->then_instructions;
+
+ ir_variable *const r0493 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r0493);
+ ir_expression *const r0494 = lshift(r03D9, body.constant(int(31)));
+ body.emit(assign(r0493, add(r0494, body.constant(2146435072u)), 0x01));
+
+ body.emit(assign(r0493, body.constant(0u), 0x02));
+
+ body.emit(assign(r0483, r0493, 0x03));
+
+ body.emit(assign(r0482, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0492->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0496 = less(r043D, body.constant(0u));
+ ir_if *f0495 = new(mem_ctx) ir_if(operand(r0496).val);
+ exec_list *const f0495_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0495->then_instructions;
+
+ ir_variable *const r0497 = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r0497, r0440, 0x01));
+
+ ir_variable *const r0498 = body.make_temp(glsl_type::int_type, "count");
+ ir_expression *const r0499 = neg(r043D);
+ body.emit(assign(r0498, expr(ir_unop_u2i, r0499), 0x01));
+
+ ir_variable *const r049A = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r049A);
+ ir_variable *const r049B = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r049B);
+ ir_variable *const r049C = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r049C);
+ ir_variable *const r049D = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r049E = neg(r0498);
+ body.emit(assign(r049D, bit_and(r049E, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r04A0 = equal(r0498, body.constant(int(0)));
+ ir_if *f049F = new(mem_ctx) ir_if(operand(r04A0).val);
+ exec_list *const f049F_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f049F->then_instructions;
+
+ body.emit(assign(r049A, r0440, 0x01));
+
+ body.emit(assign(r049B, r043F, 0x01));
+
+ body.emit(assign(r049C, r043E, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f049F->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r04A2 = less(r0498, body.constant(int(32)));
+ ir_if *f04A1 = new(mem_ctx) ir_if(operand(r04A2).val);
+ exec_list *const f04A1_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f04A1->then_instructions;
+
+ body.emit(assign(r049A, lshift(r043F, r049D), 0x01));
+
+ ir_expression *const r04A3 = lshift(r043E, r049D);
+ ir_expression *const r04A4 = rshift(r043F, r0498);
+ body.emit(assign(r049B, bit_or(r04A3, r04A4), 0x01));
+
+ body.emit(assign(r049C, rshift(r043E, r0498), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f04A1->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r04A6 = equal(r0498, body.constant(int(32)));
+ ir_if *f04A5 = new(mem_ctx) ir_if(operand(r04A6).val);
+ exec_list *const f04A5_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f04A5->then_instructions;
+
+ body.emit(assign(r049A, r043F, 0x01));
+
+ body.emit(assign(r049B, r043E, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f04A5->else_instructions;
+
+ body.emit(assign(r0497, bit_or(r0440, r043F), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r04A8 = less(r0498, body.constant(int(64)));
+ ir_if *f04A7 = new(mem_ctx) ir_if(operand(r04A8).val);
+ exec_list *const f04A7_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f04A7->then_instructions;
+
+ body.emit(assign(r049A, lshift(r043E, r049D), 0x01));
+
+ ir_expression *const r04A9 = bit_and(r0498, body.constant(int(31)));
+ body.emit(assign(r049B, rshift(r043E, r04A9), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f04A7->else_instructions;
+
+ ir_variable *const r04AA = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r04AC = equal(r0498, body.constant(int(64)));
+ ir_if *f04AB = new(mem_ctx) ir_if(operand(r04AC).val);
+ exec_list *const f04AB_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f04AB->then_instructions;
+
+ body.emit(assign(r04AA, r043E, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f04AB->else_instructions;
+
+ ir_expression *const r04AD = nequal(r043E, body.constant(0u));
+ ir_expression *const r04AE = expr(ir_unop_b2i, r04AD);
+ body.emit(assign(r04AA, expr(ir_unop_i2u, r04AE), 0x01));
+
+
+ body.instructions = f04AB_parent_instructions;
+ body.emit(f04AB);
+
+ /* END IF */
+
+ body.emit(assign(r049A, r04AA, 0x01));
+
+ body.emit(assign(r049B, body.constant(0u), 0x01));
+
+
+ body.instructions = f04A7_parent_instructions;
+ body.emit(f04A7);
+
+ /* END IF */
+
+
+ body.instructions = f04A5_parent_instructions;
+ body.emit(f04A5);
+
+ /* END IF */
+
+ body.emit(assign(r049C, body.constant(0u), 0x01));
+
+
+ body.instructions = f04A1_parent_instructions;
+ body.emit(f04A1);
+
+ /* END IF */
+
+ ir_expression *const r04AF = nequal(r0497, body.constant(0u));
+ ir_expression *const r04B0 = expr(ir_unop_b2i, r04AF);
+ ir_expression *const r04B1 = expr(ir_unop_i2u, r04B0);
+ body.emit(assign(r049A, bit_or(r049A, r04B1), 0x01));
+
+
+ body.instructions = f049F_parent_instructions;
+ body.emit(f049F);
+
+ /* END IF */
+
+ body.emit(assign(r047F, r049C, 0x01));
+
+ body.emit(assign(r0480, r049B, 0x01));
+
+ body.emit(assign(r0481, r049A, 0x01));
+
+ body.emit(assign(r047E, body.constant(0u), 0x01));
+
+ ir_expression *const r04B2 = less(r049A, body.constant(0u));
+ ir_expression *const r04B3 = expr(ir_unop_b2i, r04B2);
+ body.emit(assign(r0484, expr(ir_unop_i2u, r04B3), 0x01));
+
+
+ body.instructions = f0495_parent_instructions;
+ body.emit(f0495);
+
+ /* END IF */
+
+
+ body.instructions = f0492_parent_instructions;
+ body.emit(f0492);
+
+ /* END IF */
+
+
+ body.instructions = f0487_parent_instructions;
+ body.emit(f0487);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f04B4 = new(mem_ctx) ir_if(operand(r0482).val);
+ exec_list *const f04B4_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f04B4->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r04B6 = nequal(r0484, body.constant(0u));
+ ir_if *f04B5 = new(mem_ctx) ir_if(operand(r04B6).val);
+ exec_list *const f04B5_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f04B5->then_instructions;
+
+ ir_variable *const r04B7 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r04B7);
+ body.emit(assign(r04B7, add(r0480, body.constant(1u)), 0x01));
+
+ ir_expression *const r04B8 = less(r04B7, r0480);
+ ir_expression *const r04B9 = expr(ir_unop_b2i, r04B8);
+ ir_expression *const r04BA = expr(ir_unop_i2u, r04B9);
+ body.emit(assign(r047F, add(r047F, r04BA), 0x01));
+
+ ir_expression *const r04BB = neg(r0481);
+ ir_expression *const r04BC = equal(r0481, r04BB);
+ ir_expression *const r04BD = expr(ir_unop_b2i, r04BC);
+ ir_expression *const r04BE = expr(ir_unop_i2u, r04BD);
+ ir_expression *const r04BF = bit_and(r04BE, body.constant(1u));
+ ir_expression *const r04C0 = expr(ir_unop_bit_not, r04BF);
+ body.emit(assign(r0480, bit_and(r04B7, r04C0), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f04B5->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r04C2 = bit_or(r047F, r0480);
+ ir_expression *const r04C3 = equal(r04C2, body.constant(0u));
+ ir_if *f04C1 = new(mem_ctx) ir_if(operand(r04C3).val);
+ exec_list *const f04C1_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f04C1->then_instructions;
+
+ body.emit(assign(r047E, body.constant(0u), 0x01));
+
+
+ body.instructions = f04C1_parent_instructions;
+ body.emit(f04C1);
+
+ /* END IF */
+
+
+ body.instructions = f04B5_parent_instructions;
+ body.emit(f04B5);
+
+ /* END IF */
+
+ ir_variable *const r04C4 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r04C4);
+ ir_expression *const r04C5 = lshift(r03D9, body.constant(int(31)));
+ ir_expression *const r04C6 = lshift(r047E, body.constant(int(20)));
+ ir_expression *const r04C7 = add(r04C5, r04C6);
+ body.emit(assign(r04C4, add(r04C7, r047F), 0x01));
+
+ body.emit(assign(r04C4, r0480, 0x02));
+
+ body.emit(assign(r0483, r04C4, 0x03));
+
+ body.emit(assign(r0482, body.constant(false), 0x01));
+
+
+ body.instructions = f04B4_parent_instructions;
+ body.emit(f04B4);
+
+ /* END IF */
+
+ body.emit(assign(r03DA, r0483, 0x03));
+
+
+ body.instructions = f03F3_parent_instructions;
+ body.emit(f03F3);
+
+ /* END IF */
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f03F1->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r04C9 = less(r03DB, body.constant(int(0)));
+ ir_if *f04C8 = new(mem_ctx) ir_if(operand(r04C9).val);
+ exec_list *const f04C8_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f04C8->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r04CB = equal(r03E5, body.constant(2047u));
+ ir_if *f04CA = new(mem_ctx) ir_if(operand(r04CB).val);
+ exec_list *const f04CA_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f04CA->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r04CD = bit_or(swizzle_x(r03DF), swizzle_y(r03DF));
+ ir_expression *const r04CE = nequal(r04CD, body.constant(0u));
+ ir_if *f04CC = new(mem_ctx) ir_if(operand(r04CE).val);
+ exec_list *const f04CC_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f04CC->then_instructions;
+
+ ir_variable *const r04CF = body.make_temp(glsl_type::uvec2_type, "a");
+ body.emit(assign(r04CF, swizzle_x(r03D7), 0x01));
+
+ ir_variable *const r04D0 = body.make_temp(glsl_type::uvec2_type, "b");
+ body.emit(assign(r04D0, swizzle_x(r03D8), 0x01));
+
+ ir_variable *const r04D1 = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r04D2 = body.make_temp(glsl_type::bool_type, "float64_is_signaling_nan_retval");
+ ir_expression *const r04D3 = rshift(swizzle_y(r03D7), body.constant(int(19)));
+ ir_expression *const r04D4 = bit_and(r04D3, body.constant(4095u));
+ ir_expression *const r04D5 = equal(r04D4, body.constant(4094u));
+ ir_expression *const r04D6 = nequal(swizzle_x(r03D7), body.constant(0u));
+ ir_expression *const r04D7 = bit_and(swizzle_y(r03D7), body.constant(524287u));
+ ir_expression *const r04D8 = nequal(r04D7, body.constant(0u));
+ ir_expression *const r04D9 = logic_or(r04D6, r04D8);
+ body.emit(assign(r04D2, logic_and(r04D5, r04D9), 0x01));
+
+ ir_variable *const r04DA = body.make_temp(glsl_type::bool_type, "float64_is_nan_retval");
+ ir_expression *const r04DB = lshift(swizzle_y(r03D8), body.constant(int(1)));
+ ir_expression *const r04DC = lequal(body.constant(4292870144u), r04DB);
+ ir_expression *const r04DD = nequal(swizzle_x(r03D8), body.constant(0u));
+ ir_expression *const r04DE = bit_and(swizzle_y(r03D8), body.constant(1048575u));
+ ir_expression *const r04DF = nequal(r04DE, body.constant(0u));
+ ir_expression *const r04E0 = logic_or(r04DD, r04DF);
+ body.emit(assign(r04DA, logic_and(r04DC, r04E0), 0x01));
+
+ body.emit(assign(r04CF, bit_or(swizzle_y(r03D7), body.constant(524288u)), 0x02));
+
+ body.emit(assign(r04D0, bit_or(swizzle_y(r03D8), body.constant(524288u)), 0x02));
+
+ /* IF CONDITION */
+ ir_expression *const r04E2 = lshift(swizzle_y(r03D7), body.constant(int(1)));
+ ir_expression *const r04E3 = lequal(body.constant(4292870144u), r04E2);
+ ir_expression *const r04E4 = nequal(swizzle_x(r03D7), body.constant(0u));
+ ir_expression *const r04E5 = bit_and(swizzle_y(r03D7), body.constant(1048575u));
+ ir_expression *const r04E6 = nequal(r04E5, body.constant(0u));
+ ir_expression *const r04E7 = logic_or(r04E4, r04E6);
+ ir_expression *const r04E8 = logic_and(r04E3, r04E7);
+ ir_if *f04E1 = new(mem_ctx) ir_if(operand(r04E8).val);
+ exec_list *const f04E1_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f04E1->then_instructions;
+
+ ir_variable *const r04E9 = body.make_temp(glsl_type::uvec2_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r04EB = logic_and(r04D2, r04DA);
+ ir_if *f04EA = new(mem_ctx) ir_if(operand(r04EB).val);
+ exec_list *const f04EA_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f04EA->then_instructions;
+
+ body.emit(assign(r04E9, r04D0, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f04EA->else_instructions;
+
+ body.emit(assign(r04E9, r04CF, 0x03));
+
+
+ body.instructions = f04EA_parent_instructions;
+ body.emit(f04EA);
+
+ /* END IF */
+
+ body.emit(assign(r04D1, r04E9, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f04E1->else_instructions;
+
+ body.emit(assign(r04D1, r04D0, 0x03));
+
+
+ body.instructions = f04E1_parent_instructions;
+ body.emit(f04E1);
+
+ /* END IF */
+
+ body.emit(assign(r03DA, r04D1, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f04CC->else_instructions;
+
+ ir_variable *const r04EC = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r04EC);
+ ir_expression *const r04ED = bit_xor(r03D9, body.constant(1u));
+ ir_expression *const r04EE = lshift(r04ED, body.constant(int(31)));
+ body.emit(assign(r04EC, add(r04EE, body.constant(2146435072u)), 0x01));
+
+ body.emit(assign(r04EC, body.constant(0u), 0x02));
+
+ body.emit(assign(r03DA, r04EC, 0x03));
+
+
+ body.instructions = f04CC_parent_instructions;
+ body.emit(f04CC);
+
+ /* END IF */
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f04CA->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r04F0 = equal(r03E2, body.constant(0u));
+ ir_if *f04EF = new(mem_ctx) ir_if(operand(r04F0).val);
+ exec_list *const f04EF_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f04EF->then_instructions;
+
+ body.emit(assign(r03DB, add(r03DB, body.constant(int(1))), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f04EF->else_instructions;
+
+ body.emit(assign(r03E0, bit_or(swizzle_x(r03E0), body.constant(1073741824u)), 0x01));
+
+
+ body.instructions = f04EF_parent_instructions;
+ body.emit(f04EF);
+
+ /* END IF */
+
+ ir_variable *const r04F1 = body.make_temp(glsl_type::int_type, "count");
+ body.emit(assign(r04F1, neg(r03DB), 0x01));
+
+ ir_variable *const r04F2 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r04F2);
+ ir_variable *const r04F3 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r04F3);
+ ir_variable *const r04F4 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r04F5 = neg(r04F1);
+ body.emit(assign(r04F4, bit_and(r04F5, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r04F7 = equal(r04F1, body.constant(int(0)));
+ ir_if *f04F6 = new(mem_ctx) ir_if(operand(r04F7).val);
+ exec_list *const f04F6_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f04F6->then_instructions;
+
+ body.emit(assign(r04F2, swizzle_y(r03E0), 0x01));
+
+ body.emit(assign(r04F3, swizzle_x(r03E0), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f04F6->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r04F9 = less(r04F1, body.constant(int(32)));
+ ir_if *f04F8 = new(mem_ctx) ir_if(operand(r04F9).val);
+ exec_list *const f04F8_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f04F8->then_instructions;
+
+ ir_expression *const r04FA = lshift(swizzle_x(r03E0), r04F4);
+ ir_expression *const r04FB = rshift(r03E9, r04F1);
+ ir_expression *const r04FC = bit_or(r04FA, r04FB);
+ ir_expression *const r04FD = lshift(r03E9, r04F4);
+ ir_expression *const r04FE = nequal(r04FD, body.constant(0u));
+ ir_expression *const r04FF = expr(ir_unop_b2i, r04FE);
+ ir_expression *const r0500 = expr(ir_unop_i2u, r04FF);
+ body.emit(assign(r04F2, bit_or(r04FC, r0500), 0x01));
+
+ body.emit(assign(r04F3, rshift(swizzle_x(r03E0), r04F1), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f04F8->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0502 = equal(r04F1, body.constant(int(32)));
+ ir_if *f0501 = new(mem_ctx) ir_if(operand(r0502).val);
+ exec_list *const f0501_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0501->then_instructions;
+
+ ir_expression *const r0503 = nequal(r03E9, body.constant(0u));
+ ir_expression *const r0504 = expr(ir_unop_b2i, r0503);
+ ir_expression *const r0505 = expr(ir_unop_i2u, r0504);
+ body.emit(assign(r04F2, bit_or(swizzle_x(r03E0), r0505), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0501->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0507 = less(r04F1, body.constant(int(64)));
+ ir_if *f0506 = new(mem_ctx) ir_if(operand(r0507).val);
+ exec_list *const f0506_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0506->then_instructions;
+
+ ir_expression *const r0508 = bit_and(r04F1, body.constant(int(31)));
+ ir_expression *const r0509 = rshift(swizzle_x(r03E0), r0508);
+ ir_expression *const r050A = lshift(swizzle_x(r03E0), r04F4);
+ ir_expression *const r050B = bit_or(r050A, r03E9);
+ ir_expression *const r050C = nequal(r050B, body.constant(0u));
+ ir_expression *const r050D = expr(ir_unop_b2i, r050C);
+ ir_expression *const r050E = expr(ir_unop_i2u, r050D);
+ body.emit(assign(r04F2, bit_or(r0509, r050E), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0506->else_instructions;
+
+ ir_expression *const r050F = bit_or(swizzle_x(r03E0), r03E9);
+ ir_expression *const r0510 = nequal(r050F, body.constant(0u));
+ ir_expression *const r0511 = expr(ir_unop_b2i, r0510);
+ body.emit(assign(r04F2, expr(ir_unop_i2u, r0511), 0x01));
+
+
+ body.instructions = f0506_parent_instructions;
+ body.emit(f0506);
+
+ /* END IF */
+
+
+ body.instructions = f0501_parent_instructions;
+ body.emit(f0501);
+
+ /* END IF */
+
+ body.emit(assign(r04F3, body.constant(0u), 0x01));
+
+
+ body.instructions = f04F8_parent_instructions;
+ body.emit(f04F8);
+
+ /* END IF */
+
+
+ body.instructions = f04F6_parent_instructions;
+ body.emit(f04F6);
+
+ /* END IF */
+
+ body.emit(assign(r03E0, r04F3, 0x01));
+
+ body.emit(assign(r03E0, r04F2, 0x02));
+
+ body.emit(assign(r03DF, bit_or(swizzle_x(r03DF), body.constant(1073741824u)), 0x01));
+
+ ir_variable *const r0512 = body.make_temp(glsl_type::uint_type, "z0Ptr");
+ ir_variable *const r0513 = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r0513, sub(swizzle_y(r03DF), r04F2), 0x01));
+
+ ir_expression *const r0514 = sub(swizzle_x(r03DF), r04F3);
+ ir_expression *const r0515 = less(swizzle_y(r03DF), r04F2);
+ ir_expression *const r0516 = expr(ir_unop_b2i, r0515);
+ ir_expression *const r0517 = expr(ir_unop_i2u, r0516);
+ body.emit(assign(r0512, sub(r0514, r0517), 0x01));
+
+ body.emit(assign(r03D9, bit_xor(r03D9, body.constant(1u)), 0x01));
+
+ body.emit(assign(r03DC, add(r03E5, body.constant(4294967295u)), 0x01));
+
+ ir_variable *const r0518 = body.make_temp(glsl_type::uint_type, "zExp");
+ body.emit(assign(r0518, add(r03DC, body.constant(4294967286u)), 0x01));
+
+ ir_variable *const r0519 = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r0519, r0512, 0x01));
+
+ ir_variable *const r051A = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r051A, r0513, 0x01));
+
+ ir_variable *const r051B = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac2", ir_var_auto);
+ body.emit(r051B);
+ ir_variable *const r051C = new(mem_ctx) ir_variable(glsl_type::int_type, "shiftCount", ir_var_auto);
+ body.emit(r051C);
+ /* IF CONDITION */
+ ir_expression *const r051E = equal(r0512, body.constant(0u));
+ ir_if *f051D = new(mem_ctx) ir_if(operand(r051E).val);
+ exec_list *const f051D_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f051D->then_instructions;
+
+ body.emit(assign(r0519, r0513, 0x01));
+
+ body.emit(assign(r051A, body.constant(0u), 0x01));
+
+ body.emit(assign(r0518, add(r0518, body.constant(4294967264u)), 0x01));
+
+
+ body.instructions = f051D_parent_instructions;
+ body.emit(f051D);
+
+ /* END IF */
+
+ ir_variable *const r051F = body.make_temp(glsl_type::uint_type, "a");
+ body.emit(assign(r051F, r0519, 0x01));
+
+ ir_variable *const r0520 = body.make_temp(glsl_type::uint_type, "return_value");
+ ir_variable *const r0521 = new(mem_ctx) ir_variable(glsl_type::uint_type, "shiftCount", ir_var_auto);
+ body.emit(r0521);
+ /* IF CONDITION */
+ ir_expression *const r0523 = equal(r0519, body.constant(0u));
+ ir_if *f0522 = new(mem_ctx) ir_if(operand(r0523).val);
+ exec_list *const f0522_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0522->then_instructions;
+
+ body.emit(assign(r0520, body.constant(32u), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0522->else_instructions;
+
+ body.emit(assign(r0521, body.constant(0u), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0525 = bit_and(r0519, body.constant(4294901760u));
+ ir_expression *const r0526 = equal(r0525, body.constant(0u));
+ ir_if *f0524 = new(mem_ctx) ir_if(operand(r0526).val);
+ exec_list *const f0524_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0524->then_instructions;
+
+ body.emit(assign(r0521, body.constant(16u), 0x01));
+
+ body.emit(assign(r051F, lshift(r0519, body.constant(int(16))), 0x01));
+
+
+ body.instructions = f0524_parent_instructions;
+ body.emit(f0524);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0528 = bit_and(r051F, body.constant(4278190080u));
+ ir_expression *const r0529 = equal(r0528, body.constant(0u));
+ ir_if *f0527 = new(mem_ctx) ir_if(operand(r0529).val);
+ exec_list *const f0527_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0527->then_instructions;
+
+ body.emit(assign(r0521, add(r0521, body.constant(8u)), 0x01));
+
+ body.emit(assign(r051F, lshift(r051F, body.constant(int(8))), 0x01));
+
+
+ body.instructions = f0527_parent_instructions;
+ body.emit(f0527);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r052B = bit_and(r051F, body.constant(4026531840u));
+ ir_expression *const r052C = equal(r052B, body.constant(0u));
+ ir_if *f052A = new(mem_ctx) ir_if(operand(r052C).val);
+ exec_list *const f052A_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f052A->then_instructions;
+
+ body.emit(assign(r0521, add(r0521, body.constant(4u)), 0x01));
+
+ body.emit(assign(r051F, lshift(r051F, body.constant(int(4))), 0x01));
+
+
+ body.instructions = f052A_parent_instructions;
+ body.emit(f052A);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r052E = bit_and(r051F, body.constant(3221225472u));
+ ir_expression *const r052F = equal(r052E, body.constant(0u));
+ ir_if *f052D = new(mem_ctx) ir_if(operand(r052F).val);
+ exec_list *const f052D_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f052D->then_instructions;
+
+ body.emit(assign(r0521, add(r0521, body.constant(2u)), 0x01));
+
+ body.emit(assign(r051F, lshift(r051F, body.constant(int(2))), 0x01));
+
+
+ body.instructions = f052D_parent_instructions;
+ body.emit(f052D);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0531 = bit_and(r051F, body.constant(2147483648u));
+ ir_expression *const r0532 = equal(r0531, body.constant(0u));
+ ir_if *f0530 = new(mem_ctx) ir_if(operand(r0532).val);
+ exec_list *const f0530_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0530->then_instructions;
+
+ body.emit(assign(r0521, add(r0521, body.constant(1u)), 0x01));
+
+
+ body.instructions = f0530_parent_instructions;
+ body.emit(f0530);
+
+ /* END IF */
+
+ body.emit(assign(r0520, r0521, 0x01));
+
+
+ body.instructions = f0522_parent_instructions;
+ body.emit(f0522);
+
+ /* END IF */
+
+ ir_expression *const r0533 = expr(ir_unop_u2i, r0520);
+ body.emit(assign(r051C, add(r0533, body.constant(int(-11))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0535 = lequal(body.constant(int(0)), r051C);
+ ir_if *f0534 = new(mem_ctx) ir_if(operand(r0535).val);
+ exec_list *const f0534_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0534->then_instructions;
+
+ body.emit(assign(r051B, body.constant(0u), 0x01));
+
+ ir_variable *const r0536 = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r0536, lshift(r051A, r051C), 0x01));
+
+ ir_variable *const r0537 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0539 = equal(r051C, body.constant(int(0)));
+ ir_if *f0538 = new(mem_ctx) ir_if(operand(r0539).val);
+ exec_list *const f0538_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0538->then_instructions;
+
+ body.emit(assign(r0537, r0519, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0538->else_instructions;
+
+ ir_expression *const r053A = lshift(r0519, r051C);
+ ir_expression *const r053B = neg(r051C);
+ ir_expression *const r053C = bit_and(r053B, body.constant(int(31)));
+ ir_expression *const r053D = rshift(r051A, r053C);
+ body.emit(assign(r0537, bit_or(r053A, r053D), 0x01));
+
+
+ body.instructions = f0538_parent_instructions;
+ body.emit(f0538);
+
+ /* END IF */
+
+ body.emit(assign(r0519, r0537, 0x01));
+
+ body.emit(assign(r051A, r0536, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0534->else_instructions;
+
+ ir_variable *const r053E = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r053E, body.constant(0u), 0x01));
+
+ ir_variable *const r053F = body.make_temp(glsl_type::int_type, "count");
+ body.emit(assign(r053F, neg(r051C), 0x01));
+
+ ir_variable *const r0540 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r0540);
+ ir_variable *const r0541 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0541);
+ ir_variable *const r0542 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r0542);
+ ir_variable *const r0543 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r0544 = neg(r053F);
+ body.emit(assign(r0543, bit_and(r0544, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0546 = equal(r053F, body.constant(int(0)));
+ ir_if *f0545 = new(mem_ctx) ir_if(operand(r0546).val);
+ exec_list *const f0545_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0545->then_instructions;
+
+ body.emit(assign(r0540, r053E, 0x01));
+
+ body.emit(assign(r0541, r051A, 0x01));
+
+ body.emit(assign(r0542, r0519, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0545->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0548 = less(r053F, body.constant(int(32)));
+ ir_if *f0547 = new(mem_ctx) ir_if(operand(r0548).val);
+ exec_list *const f0547_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0547->then_instructions;
+
+ body.emit(assign(r0540, lshift(r051A, r0543), 0x01));
+
+ ir_expression *const r0549 = lshift(r0519, r0543);
+ ir_expression *const r054A = rshift(r051A, r053F);
+ body.emit(assign(r0541, bit_or(r0549, r054A), 0x01));
+
+ body.emit(assign(r0542, rshift(r0519, r053F), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0547->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r054C = equal(r053F, body.constant(int(32)));
+ ir_if *f054B = new(mem_ctx) ir_if(operand(r054C).val);
+ exec_list *const f054B_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f054B->then_instructions;
+
+ body.emit(assign(r0540, r051A, 0x01));
+
+ body.emit(assign(r0541, r0519, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f054B->else_instructions;
+
+ body.emit(assign(r053E, bit_or(body.constant(0u), r051A), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r054E = less(r053F, body.constant(int(64)));
+ ir_if *f054D = new(mem_ctx) ir_if(operand(r054E).val);
+ exec_list *const f054D_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f054D->then_instructions;
+
+ body.emit(assign(r0540, lshift(r0519, r0543), 0x01));
+
+ ir_expression *const r054F = bit_and(r053F, body.constant(int(31)));
+ body.emit(assign(r0541, rshift(r0519, r054F), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f054D->else_instructions;
+
+ ir_variable *const r0550 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0552 = equal(r053F, body.constant(int(64)));
+ ir_if *f0551 = new(mem_ctx) ir_if(operand(r0552).val);
+ exec_list *const f0551_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0551->then_instructions;
+
+ body.emit(assign(r0550, r0519, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0551->else_instructions;
+
+ ir_expression *const r0553 = nequal(r0519, body.constant(0u));
+ ir_expression *const r0554 = expr(ir_unop_b2i, r0553);
+ body.emit(assign(r0550, expr(ir_unop_i2u, r0554), 0x01));
+
+
+ body.instructions = f0551_parent_instructions;
+ body.emit(f0551);
+
+ /* END IF */
+
+ body.emit(assign(r0540, r0550, 0x01));
+
+ body.emit(assign(r0541, body.constant(0u), 0x01));
+
+
+ body.instructions = f054D_parent_instructions;
+ body.emit(f054D);
+
+ /* END IF */
+
+
+ body.instructions = f054B_parent_instructions;
+ body.emit(f054B);
+
+ /* END IF */
+
+ body.emit(assign(r0542, body.constant(0u), 0x01));
+
+
+ body.instructions = f0547_parent_instructions;
+ body.emit(f0547);
+
+ /* END IF */
+
+ ir_expression *const r0555 = nequal(r053E, body.constant(0u));
+ ir_expression *const r0556 = expr(ir_unop_b2i, r0555);
+ ir_expression *const r0557 = expr(ir_unop_i2u, r0556);
+ body.emit(assign(r0540, bit_or(r0540, r0557), 0x01));
+
+
+ body.instructions = f0545_parent_instructions;
+ body.emit(f0545);
+
+ /* END IF */
+
+ body.emit(assign(r0519, r0542, 0x01));
+
+ body.emit(assign(r051A, r0541, 0x01));
+
+ body.emit(assign(r051B, r0540, 0x01));
+
+
+ body.instructions = f0534_parent_instructions;
+ body.emit(f0534);
+
+ /* END IF */
+
+ ir_expression *const r0558 = expr(ir_unop_i2u, r051C);
+ body.emit(assign(r0518, sub(r0518, r0558), 0x01));
+
+ ir_variable *const r0559 = body.make_temp(glsl_type::uint_type, "zExp");
+ body.emit(assign(r0559, r0518, 0x01));
+
+ ir_variable *const r055A = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r055A, r0519, 0x01));
+
+ ir_variable *const r055B = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r055B, r051A, 0x01));
+
+ ir_variable *const r055C = body.make_temp(glsl_type::uint_type, "zFrac2");
+ body.emit(assign(r055C, r051B, 0x01));
+
+ ir_variable *const r055D = body.make_temp(glsl_type::bool_type, "execute_flag");
+ body.emit(assign(r055D, body.constant(true), 0x01));
+
+ ir_variable *const r055E = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r055F = new(mem_ctx) ir_variable(glsl_type::uint_type, "increment", ir_var_auto);
+ body.emit(r055F);
+ ir_expression *const r0560 = less(r051B, body.constant(0u));
+ ir_expression *const r0561 = expr(ir_unop_b2i, r0560);
+ body.emit(assign(r055F, expr(ir_unop_i2u, r0561), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0563 = lequal(body.constant(2045u), r0518);
+ ir_if *f0562 = new(mem_ctx) ir_if(operand(r0563).val);
+ exec_list *const f0562_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0562->then_instructions;
+
+ ir_variable *const r0564 = body.make_temp(glsl_type::bool_type, "or_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0566 = less(body.constant(2045u), r0518);
+ ir_if *f0565 = new(mem_ctx) ir_if(operand(r0566).val);
+ exec_list *const f0565_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0565->then_instructions;
+
+ body.emit(assign(r0564, body.constant(true), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0565->else_instructions;
+
+ ir_variable *const r0567 = body.make_temp(glsl_type::bool_type, "and_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0569 = equal(r0518, body.constant(2045u));
+ ir_if *f0568 = new(mem_ctx) ir_if(operand(r0569).val);
+ exec_list *const f0568_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0568->then_instructions;
+
+ ir_expression *const r056A = equal(body.constant(2097151u), r0519);
+ ir_expression *const r056B = equal(body.constant(4294967295u), r051A);
+ body.emit(assign(r0567, logic_and(r056A, r056B), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0568->else_instructions;
+
+ body.emit(assign(r0567, body.constant(false), 0x01));
+
+
+ body.instructions = f0568_parent_instructions;
+ body.emit(f0568);
+
+ /* END IF */
+
+ ir_expression *const r056C = nequal(r055F, body.constant(0u));
+ body.emit(assign(r0564, logic_and(r0567, r056C), 0x01));
+
+
+ body.instructions = f0565_parent_instructions;
+ body.emit(f0565);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f056D = new(mem_ctx) ir_if(operand(r0564).val);
+ exec_list *const f056D_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f056D->then_instructions;
+
+ ir_variable *const r056E = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r056E);
+ ir_expression *const r056F = lshift(r03D9, body.constant(int(31)));
+ body.emit(assign(r056E, add(r056F, body.constant(2146435072u)), 0x01));
+
+ body.emit(assign(r056E, body.constant(0u), 0x02));
+
+ body.emit(assign(r055E, r056E, 0x03));
+
+ body.emit(assign(r055D, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f056D->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0571 = less(r0518, body.constant(0u));
+ ir_if *f0570 = new(mem_ctx) ir_if(operand(r0571).val);
+ exec_list *const f0570_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0570->then_instructions;
+
+ ir_variable *const r0572 = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r0572, r051B, 0x01));
+
+ ir_variable *const r0573 = body.make_temp(glsl_type::int_type, "count");
+ ir_expression *const r0574 = neg(r0518);
+ body.emit(assign(r0573, expr(ir_unop_u2i, r0574), 0x01));
+
+ ir_variable *const r0575 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r0575);
+ ir_variable *const r0576 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0576);
+ ir_variable *const r0577 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r0577);
+ ir_variable *const r0578 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r0579 = neg(r0573);
+ body.emit(assign(r0578, bit_and(r0579, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r057B = equal(r0573, body.constant(int(0)));
+ ir_if *f057A = new(mem_ctx) ir_if(operand(r057B).val);
+ exec_list *const f057A_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f057A->then_instructions;
+
+ body.emit(assign(r0575, r051B, 0x01));
+
+ body.emit(assign(r0576, r051A, 0x01));
+
+ body.emit(assign(r0577, r0519, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f057A->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r057D = less(r0573, body.constant(int(32)));
+ ir_if *f057C = new(mem_ctx) ir_if(operand(r057D).val);
+ exec_list *const f057C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f057C->then_instructions;
+
+ body.emit(assign(r0575, lshift(r051A, r0578), 0x01));
+
+ ir_expression *const r057E = lshift(r0519, r0578);
+ ir_expression *const r057F = rshift(r051A, r0573);
+ body.emit(assign(r0576, bit_or(r057E, r057F), 0x01));
+
+ body.emit(assign(r0577, rshift(r0519, r0573), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f057C->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0581 = equal(r0573, body.constant(int(32)));
+ ir_if *f0580 = new(mem_ctx) ir_if(operand(r0581).val);
+ exec_list *const f0580_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0580->then_instructions;
+
+ body.emit(assign(r0575, r051A, 0x01));
+
+ body.emit(assign(r0576, r0519, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0580->else_instructions;
+
+ body.emit(assign(r0572, bit_or(r051B, r051A), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0583 = less(r0573, body.constant(int(64)));
+ ir_if *f0582 = new(mem_ctx) ir_if(operand(r0583).val);
+ exec_list *const f0582_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0582->then_instructions;
+
+ body.emit(assign(r0575, lshift(r0519, r0578), 0x01));
+
+ ir_expression *const r0584 = bit_and(r0573, body.constant(int(31)));
+ body.emit(assign(r0576, rshift(r0519, r0584), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0582->else_instructions;
+
+ ir_variable *const r0585 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0587 = equal(r0573, body.constant(int(64)));
+ ir_if *f0586 = new(mem_ctx) ir_if(operand(r0587).val);
+ exec_list *const f0586_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0586->then_instructions;
+
+ body.emit(assign(r0585, r0519, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0586->else_instructions;
+
+ ir_expression *const r0588 = nequal(r0519, body.constant(0u));
+ ir_expression *const r0589 = expr(ir_unop_b2i, r0588);
+ body.emit(assign(r0585, expr(ir_unop_i2u, r0589), 0x01));
+
+
+ body.instructions = f0586_parent_instructions;
+ body.emit(f0586);
+
+ /* END IF */
+
+ body.emit(assign(r0575, r0585, 0x01));
+
+ body.emit(assign(r0576, body.constant(0u), 0x01));
+
+
+ body.instructions = f0582_parent_instructions;
+ body.emit(f0582);
+
+ /* END IF */
+
+
+ body.instructions = f0580_parent_instructions;
+ body.emit(f0580);
+
+ /* END IF */
+
+ body.emit(assign(r0577, body.constant(0u), 0x01));
+
+
+ body.instructions = f057C_parent_instructions;
+ body.emit(f057C);
+
+ /* END IF */
+
+ ir_expression *const r058A = nequal(r0572, body.constant(0u));
+ ir_expression *const r058B = expr(ir_unop_b2i, r058A);
+ ir_expression *const r058C = expr(ir_unop_i2u, r058B);
+ body.emit(assign(r0575, bit_or(r0575, r058C), 0x01));
+
+
+ body.instructions = f057A_parent_instructions;
+ body.emit(f057A);
+
+ /* END IF */
+
+ body.emit(assign(r055A, r0577, 0x01));
+
+ body.emit(assign(r055B, r0576, 0x01));
+
+ body.emit(assign(r055C, r0575, 0x01));
+
+ body.emit(assign(r0559, body.constant(0u), 0x01));
+
+ ir_expression *const r058D = less(r0575, body.constant(0u));
+ ir_expression *const r058E = expr(ir_unop_b2i, r058D);
+ body.emit(assign(r055F, expr(ir_unop_i2u, r058E), 0x01));
+
+
+ body.instructions = f0570_parent_instructions;
+ body.emit(f0570);
+
+ /* END IF */
+
+
+ body.instructions = f056D_parent_instructions;
+ body.emit(f056D);
+
+ /* END IF */
+
+
+ body.instructions = f0562_parent_instructions;
+ body.emit(f0562);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f058F = new(mem_ctx) ir_if(operand(r055D).val);
+ exec_list *const f058F_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f058F->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0591 = nequal(r055F, body.constant(0u));
+ ir_if *f0590 = new(mem_ctx) ir_if(operand(r0591).val);
+ exec_list *const f0590_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0590->then_instructions;
+
+ ir_variable *const r0592 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0592);
+ body.emit(assign(r0592, add(r055B, body.constant(1u)), 0x01));
+
+ ir_expression *const r0593 = less(r0592, r055B);
+ ir_expression *const r0594 = expr(ir_unop_b2i, r0593);
+ ir_expression *const r0595 = expr(ir_unop_i2u, r0594);
+ body.emit(assign(r055A, add(r055A, r0595), 0x01));
+
+ ir_expression *const r0596 = neg(r055C);
+ ir_expression *const r0597 = equal(r055C, r0596);
+ ir_expression *const r0598 = expr(ir_unop_b2i, r0597);
+ ir_expression *const r0599 = expr(ir_unop_i2u, r0598);
+ ir_expression *const r059A = bit_and(r0599, body.constant(1u));
+ ir_expression *const r059B = expr(ir_unop_bit_not, r059A);
+ body.emit(assign(r055B, bit_and(r0592, r059B), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0590->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r059D = bit_or(r055A, r055B);
+ ir_expression *const r059E = equal(r059D, body.constant(0u));
+ ir_if *f059C = new(mem_ctx) ir_if(operand(r059E).val);
+ exec_list *const f059C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f059C->then_instructions;
+
+ body.emit(assign(r0559, body.constant(0u), 0x01));
+
+
+ body.instructions = f059C_parent_instructions;
+ body.emit(f059C);
+
+ /* END IF */
+
+
+ body.instructions = f0590_parent_instructions;
+ body.emit(f0590);
+
+ /* END IF */
+
+ ir_variable *const r059F = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r059F);
+ ir_expression *const r05A0 = lshift(r03D9, body.constant(int(31)));
+ ir_expression *const r05A1 = lshift(r0559, body.constant(int(20)));
+ ir_expression *const r05A2 = add(r05A0, r05A1);
+ body.emit(assign(r059F, add(r05A2, r055A), 0x01));
+
+ body.emit(assign(r059F, r055B, 0x02));
+
+ body.emit(assign(r055E, r059F, 0x03));
+
+ body.emit(assign(r055D, body.constant(false), 0x01));
+
+
+ body.instructions = f058F_parent_instructions;
+ body.emit(f058F);
+
+ /* END IF */
+
+ body.emit(assign(r03DA, r055E, 0x03));
+
+
+ body.instructions = f04CA_parent_instructions;
+ body.emit(f04CA);
+
+ /* END IF */
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f04C8->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r05A4 = equal(r03E2, body.constant(2047u));
+ ir_if *f05A3 = new(mem_ctx) ir_if(operand(r05A4).val);
+ exec_list *const f05A3_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f05A3->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r05A6 = bit_or(swizzle_x(r03E0), swizzle_y(r03E0));
+ ir_expression *const r05A7 = bit_or(swizzle_x(r03DF), swizzle_y(r03DF));
+ ir_expression *const r05A8 = bit_or(r05A6, r05A7);
+ ir_expression *const r05A9 = nequal(r05A8, body.constant(0u));
+ ir_if *f05A5 = new(mem_ctx) ir_if(operand(r05A9).val);
+ exec_list *const f05A5_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f05A5->then_instructions;
+
+ ir_variable *const r05AA = body.make_temp(glsl_type::uvec2_type, "a");
+ body.emit(assign(r05AA, swizzle_x(r03D7), 0x01));
+
+ ir_variable *const r05AB = body.make_temp(glsl_type::uvec2_type, "b");
+ body.emit(assign(r05AB, swizzle_x(r03D8), 0x01));
+
+ ir_variable *const r05AC = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r05AD = body.make_temp(glsl_type::bool_type, "float64_is_signaling_nan_retval");
+ ir_expression *const r05AE = rshift(swizzle_y(r03D7), body.constant(int(19)));
+ ir_expression *const r05AF = bit_and(r05AE, body.constant(4095u));
+ ir_expression *const r05B0 = equal(r05AF, body.constant(4094u));
+ ir_expression *const r05B1 = nequal(swizzle_x(r03D7), body.constant(0u));
+ ir_expression *const r05B2 = bit_and(swizzle_y(r03D7), body.constant(524287u));
+ ir_expression *const r05B3 = nequal(r05B2, body.constant(0u));
+ ir_expression *const r05B4 = logic_or(r05B1, r05B3);
+ body.emit(assign(r05AD, logic_and(r05B0, r05B4), 0x01));
+
+ ir_variable *const r05B5 = body.make_temp(glsl_type::bool_type, "float64_is_nan_retval");
+ ir_expression *const r05B6 = lshift(swizzle_y(r03D8), body.constant(int(1)));
+ ir_expression *const r05B7 = lequal(body.constant(4292870144u), r05B6);
+ ir_expression *const r05B8 = nequal(swizzle_x(r03D8), body.constant(0u));
+ ir_expression *const r05B9 = bit_and(swizzle_y(r03D8), body.constant(1048575u));
+ ir_expression *const r05BA = nequal(r05B9, body.constant(0u));
+ ir_expression *const r05BB = logic_or(r05B8, r05BA);
+ body.emit(assign(r05B5, logic_and(r05B7, r05BB), 0x01));
+
+ body.emit(assign(r05AA, bit_or(swizzle_y(r03D7), body.constant(524288u)), 0x02));
+
+ body.emit(assign(r05AB, bit_or(swizzle_y(r03D8), body.constant(524288u)), 0x02));
+
+ /* IF CONDITION */
+ ir_expression *const r05BD = lshift(swizzle_y(r03D7), body.constant(int(1)));
+ ir_expression *const r05BE = lequal(body.constant(4292870144u), r05BD);
+ ir_expression *const r05BF = nequal(swizzle_x(r03D7), body.constant(0u));
+ ir_expression *const r05C0 = bit_and(swizzle_y(r03D7), body.constant(1048575u));
+ ir_expression *const r05C1 = nequal(r05C0, body.constant(0u));
+ ir_expression *const r05C2 = logic_or(r05BF, r05C1);
+ ir_expression *const r05C3 = logic_and(r05BE, r05C2);
+ ir_if *f05BC = new(mem_ctx) ir_if(operand(r05C3).val);
+ exec_list *const f05BC_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f05BC->then_instructions;
+
+ ir_variable *const r05C4 = body.make_temp(glsl_type::uvec2_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r05C6 = logic_and(r05AD, r05B5);
+ ir_if *f05C5 = new(mem_ctx) ir_if(operand(r05C6).val);
+ exec_list *const f05C5_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f05C5->then_instructions;
+
+ body.emit(assign(r05C4, r05AB, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f05C5->else_instructions;
+
+ body.emit(assign(r05C4, r05AA, 0x03));
+
+
+ body.instructions = f05C5_parent_instructions;
+ body.emit(f05C5);
+
+ /* END IF */
+
+ body.emit(assign(r05AC, r05C4, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f05BC->else_instructions;
+
+ body.emit(assign(r05AC, r05AB, 0x03));
+
+
+ body.instructions = f05BC_parent_instructions;
+ body.emit(f05BC);
+
+ /* END IF */
+
+ body.emit(assign(r03DA, r05AC, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f05A5->else_instructions;
+
+ ir_constant_data r05C7_data;
+ memset(&r05C7_data, 0, sizeof(ir_constant_data));
+r05C7_data.u[0] = 4294967295;
+r05C7_data.u[1] = 4294967295;
+ ir_constant *const r05C7 = new(mem_ctx) ir_constant(glsl_type::uvec2_type, &r05C7_data);
+ body.emit(assign(r03DA, r05C7, 0x03));
+
+
+ body.instructions = f05A5_parent_instructions;
+ body.emit(f05A5);
+
+ /* END IF */
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f05A3->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r05C9 = equal(r03E2, body.constant(0u));
+ ir_if *f05C8 = new(mem_ctx) ir_if(operand(r05C9).val);
+ exec_list *const f05C8_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f05C8->then_instructions;
+
+ body.emit(assign(r03DE, body.constant(1u), 0x01));
+
+ body.emit(assign(r03DD, body.constant(1u), 0x01));
+
+
+ body.instructions = f05C8_parent_instructions;
+ body.emit(f05C8);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r05CB = less(swizzle_x(r03DF), swizzle_x(r03E0));
+ ir_if *f05CA = new(mem_ctx) ir_if(operand(r05CB).val);
+ exec_list *const f05CA_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f05CA->then_instructions;
+
+ ir_variable *const r05CC = body.make_temp(glsl_type::uint_type, "z0Ptr");
+ ir_variable *const r05CD = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r05CD, sub(swizzle_y(r03E0), swizzle_y(r03DF)), 0x01));
+
+ ir_expression *const r05CE = sub(swizzle_x(r03E0), swizzle_x(r03DF));
+ ir_expression *const r05CF = less(swizzle_y(r03E0), swizzle_y(r03DF));
+ ir_expression *const r05D0 = expr(ir_unop_b2i, r05CF);
+ ir_expression *const r05D1 = expr(ir_unop_i2u, r05D0);
+ body.emit(assign(r05CC, sub(r05CE, r05D1), 0x01));
+
+ body.emit(assign(r03DC, add(r03DE, body.constant(4294967295u)), 0x01));
+
+ ir_variable *const r05D2 = body.make_temp(glsl_type::uint_type, "zExp");
+ body.emit(assign(r05D2, add(r03DC, body.constant(4294967286u)), 0x01));
+
+ ir_variable *const r05D3 = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r05D3, r05CC, 0x01));
+
+ ir_variable *const r05D4 = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r05D4, r05CD, 0x01));
+
+ ir_variable *const r05D5 = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac2", ir_var_auto);
+ body.emit(r05D5);
+ ir_variable *const r05D6 = new(mem_ctx) ir_variable(glsl_type::int_type, "shiftCount", ir_var_auto);
+ body.emit(r05D6);
+ /* IF CONDITION */
+ ir_expression *const r05D8 = equal(r05CC, body.constant(0u));
+ ir_if *f05D7 = new(mem_ctx) ir_if(operand(r05D8).val);
+ exec_list *const f05D7_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f05D7->then_instructions;
+
+ body.emit(assign(r05D3, r05CD, 0x01));
+
+ body.emit(assign(r05D4, body.constant(0u), 0x01));
+
+ body.emit(assign(r05D2, add(r05D2, body.constant(4294967264u)), 0x01));
+
+
+ body.instructions = f05D7_parent_instructions;
+ body.emit(f05D7);
+
+ /* END IF */
+
+ ir_variable *const r05D9 = body.make_temp(glsl_type::uint_type, "a");
+ body.emit(assign(r05D9, r05D3, 0x01));
+
+ ir_variable *const r05DA = body.make_temp(glsl_type::uint_type, "return_value");
+ ir_variable *const r05DB = new(mem_ctx) ir_variable(glsl_type::uint_type, "shiftCount", ir_var_auto);
+ body.emit(r05DB);
+ /* IF CONDITION */
+ ir_expression *const r05DD = equal(r05D3, body.constant(0u));
+ ir_if *f05DC = new(mem_ctx) ir_if(operand(r05DD).val);
+ exec_list *const f05DC_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f05DC->then_instructions;
+
+ body.emit(assign(r05DA, body.constant(32u), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f05DC->else_instructions;
+
+ body.emit(assign(r05DB, body.constant(0u), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r05DF = bit_and(r05D3, body.constant(4294901760u));
+ ir_expression *const r05E0 = equal(r05DF, body.constant(0u));
+ ir_if *f05DE = new(mem_ctx) ir_if(operand(r05E0).val);
+ exec_list *const f05DE_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f05DE->then_instructions;
+
+ body.emit(assign(r05DB, body.constant(16u), 0x01));
+
+ body.emit(assign(r05D9, lshift(r05D3, body.constant(int(16))), 0x01));
+
+
+ body.instructions = f05DE_parent_instructions;
+ body.emit(f05DE);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r05E2 = bit_and(r05D9, body.constant(4278190080u));
+ ir_expression *const r05E3 = equal(r05E2, body.constant(0u));
+ ir_if *f05E1 = new(mem_ctx) ir_if(operand(r05E3).val);
+ exec_list *const f05E1_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f05E1->then_instructions;
+
+ body.emit(assign(r05DB, add(r05DB, body.constant(8u)), 0x01));
+
+ body.emit(assign(r05D9, lshift(r05D9, body.constant(int(8))), 0x01));
+
+
+ body.instructions = f05E1_parent_instructions;
+ body.emit(f05E1);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r05E5 = bit_and(r05D9, body.constant(4026531840u));
+ ir_expression *const r05E6 = equal(r05E5, body.constant(0u));
+ ir_if *f05E4 = new(mem_ctx) ir_if(operand(r05E6).val);
+ exec_list *const f05E4_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f05E4->then_instructions;
+
+ body.emit(assign(r05DB, add(r05DB, body.constant(4u)), 0x01));
+
+ body.emit(assign(r05D9, lshift(r05D9, body.constant(int(4))), 0x01));
+
+
+ body.instructions = f05E4_parent_instructions;
+ body.emit(f05E4);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r05E8 = bit_and(r05D9, body.constant(3221225472u));
+ ir_expression *const r05E9 = equal(r05E8, body.constant(0u));
+ ir_if *f05E7 = new(mem_ctx) ir_if(operand(r05E9).val);
+ exec_list *const f05E7_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f05E7->then_instructions;
+
+ body.emit(assign(r05DB, add(r05DB, body.constant(2u)), 0x01));
+
+ body.emit(assign(r05D9, lshift(r05D9, body.constant(int(2))), 0x01));
+
+
+ body.instructions = f05E7_parent_instructions;
+ body.emit(f05E7);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r05EB = bit_and(r05D9, body.constant(2147483648u));
+ ir_expression *const r05EC = equal(r05EB, body.constant(0u));
+ ir_if *f05EA = new(mem_ctx) ir_if(operand(r05EC).val);
+ exec_list *const f05EA_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f05EA->then_instructions;
+
+ body.emit(assign(r05DB, add(r05DB, body.constant(1u)), 0x01));
+
+
+ body.instructions = f05EA_parent_instructions;
+ body.emit(f05EA);
+
+ /* END IF */
+
+ body.emit(assign(r05DA, r05DB, 0x01));
+
+
+ body.instructions = f05DC_parent_instructions;
+ body.emit(f05DC);
+
+ /* END IF */
+
+ ir_expression *const r05ED = expr(ir_unop_u2i, r05DA);
+ body.emit(assign(r05D6, add(r05ED, body.constant(int(-11))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r05EF = lequal(body.constant(int(0)), r05D6);
+ ir_if *f05EE = new(mem_ctx) ir_if(operand(r05EF).val);
+ exec_list *const f05EE_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f05EE->then_instructions;
+
+ body.emit(assign(r05D5, body.constant(0u), 0x01));
+
+ ir_variable *const r05F0 = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r05F0, lshift(r05D4, r05D6), 0x01));
+
+ ir_variable *const r05F1 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r05F3 = equal(r05D6, body.constant(int(0)));
+ ir_if *f05F2 = new(mem_ctx) ir_if(operand(r05F3).val);
+ exec_list *const f05F2_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f05F2->then_instructions;
+
+ body.emit(assign(r05F1, r05D3, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f05F2->else_instructions;
+
+ ir_expression *const r05F4 = lshift(r05D3, r05D6);
+ ir_expression *const r05F5 = neg(r05D6);
+ ir_expression *const r05F6 = bit_and(r05F5, body.constant(int(31)));
+ ir_expression *const r05F7 = rshift(r05D4, r05F6);
+ body.emit(assign(r05F1, bit_or(r05F4, r05F7), 0x01));
+
+
+ body.instructions = f05F2_parent_instructions;
+ body.emit(f05F2);
+
+ /* END IF */
+
+ body.emit(assign(r05D3, r05F1, 0x01));
+
+ body.emit(assign(r05D4, r05F0, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f05EE->else_instructions;
+
+ ir_variable *const r05F8 = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r05F8, body.constant(0u), 0x01));
+
+ ir_variable *const r05F9 = body.make_temp(glsl_type::int_type, "count");
+ body.emit(assign(r05F9, neg(r05D6), 0x01));
+
+ ir_variable *const r05FA = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r05FA);
+ ir_variable *const r05FB = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r05FB);
+ ir_variable *const r05FC = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r05FC);
+ ir_variable *const r05FD = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r05FE = neg(r05F9);
+ body.emit(assign(r05FD, bit_and(r05FE, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0600 = equal(r05F9, body.constant(int(0)));
+ ir_if *f05FF = new(mem_ctx) ir_if(operand(r0600).val);
+ exec_list *const f05FF_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f05FF->then_instructions;
+
+ body.emit(assign(r05FA, r05F8, 0x01));
+
+ body.emit(assign(r05FB, r05D4, 0x01));
+
+ body.emit(assign(r05FC, r05D3, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f05FF->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0602 = less(r05F9, body.constant(int(32)));
+ ir_if *f0601 = new(mem_ctx) ir_if(operand(r0602).val);
+ exec_list *const f0601_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0601->then_instructions;
+
+ body.emit(assign(r05FA, lshift(r05D4, r05FD), 0x01));
+
+ ir_expression *const r0603 = lshift(r05D3, r05FD);
+ ir_expression *const r0604 = rshift(r05D4, r05F9);
+ body.emit(assign(r05FB, bit_or(r0603, r0604), 0x01));
+
+ body.emit(assign(r05FC, rshift(r05D3, r05F9), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0601->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0606 = equal(r05F9, body.constant(int(32)));
+ ir_if *f0605 = new(mem_ctx) ir_if(operand(r0606).val);
+ exec_list *const f0605_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0605->then_instructions;
+
+ body.emit(assign(r05FA, r05D4, 0x01));
+
+ body.emit(assign(r05FB, r05D3, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0605->else_instructions;
+
+ body.emit(assign(r05F8, bit_or(body.constant(0u), r05D4), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0608 = less(r05F9, body.constant(int(64)));
+ ir_if *f0607 = new(mem_ctx) ir_if(operand(r0608).val);
+ exec_list *const f0607_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0607->then_instructions;
+
+ body.emit(assign(r05FA, lshift(r05D3, r05FD), 0x01));
+
+ ir_expression *const r0609 = bit_and(r05F9, body.constant(int(31)));
+ body.emit(assign(r05FB, rshift(r05D3, r0609), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0607->else_instructions;
+
+ ir_variable *const r060A = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r060C = equal(r05F9, body.constant(int(64)));
+ ir_if *f060B = new(mem_ctx) ir_if(operand(r060C).val);
+ exec_list *const f060B_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f060B->then_instructions;
+
+ body.emit(assign(r060A, r05D3, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f060B->else_instructions;
+
+ ir_expression *const r060D = nequal(r05D3, body.constant(0u));
+ ir_expression *const r060E = expr(ir_unop_b2i, r060D);
+ body.emit(assign(r060A, expr(ir_unop_i2u, r060E), 0x01));
+
+
+ body.instructions = f060B_parent_instructions;
+ body.emit(f060B);
+
+ /* END IF */
+
+ body.emit(assign(r05FA, r060A, 0x01));
+
+ body.emit(assign(r05FB, body.constant(0u), 0x01));
+
+
+ body.instructions = f0607_parent_instructions;
+ body.emit(f0607);
+
+ /* END IF */
+
+
+ body.instructions = f0605_parent_instructions;
+ body.emit(f0605);
+
+ /* END IF */
+
+ body.emit(assign(r05FC, body.constant(0u), 0x01));
+
+
+ body.instructions = f0601_parent_instructions;
+ body.emit(f0601);
+
+ /* END IF */
+
+ ir_expression *const r060F = nequal(r05F8, body.constant(0u));
+ ir_expression *const r0610 = expr(ir_unop_b2i, r060F);
+ ir_expression *const r0611 = expr(ir_unop_i2u, r0610);
+ body.emit(assign(r05FA, bit_or(r05FA, r0611), 0x01));
+
+
+ body.instructions = f05FF_parent_instructions;
+ body.emit(f05FF);
+
+ /* END IF */
+
+ body.emit(assign(r05D3, r05FC, 0x01));
+
+ body.emit(assign(r05D4, r05FB, 0x01));
+
+ body.emit(assign(r05D5, r05FA, 0x01));
+
+
+ body.instructions = f05EE_parent_instructions;
+ body.emit(f05EE);
+
+ /* END IF */
+
+ ir_expression *const r0612 = expr(ir_unop_i2u, r05D6);
+ body.emit(assign(r05D2, sub(r05D2, r0612), 0x01));
+
+ ir_variable *const r0613 = body.make_temp(glsl_type::uint_type, "zExp");
+ body.emit(assign(r0613, r05D2, 0x01));
+
+ ir_variable *const r0614 = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r0614, r05D3, 0x01));
+
+ ir_variable *const r0615 = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r0615, r05D4, 0x01));
+
+ ir_variable *const r0616 = body.make_temp(glsl_type::uint_type, "zFrac2");
+ body.emit(assign(r0616, r05D5, 0x01));
+
+ ir_variable *const r0617 = body.make_temp(glsl_type::bool_type, "execute_flag");
+ body.emit(assign(r0617, body.constant(true), 0x01));
+
+ ir_variable *const r0618 = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r0619 = new(mem_ctx) ir_variable(glsl_type::uint_type, "increment", ir_var_auto);
+ body.emit(r0619);
+ ir_expression *const r061A = less(r05D5, body.constant(0u));
+ ir_expression *const r061B = expr(ir_unop_b2i, r061A);
+ body.emit(assign(r0619, expr(ir_unop_i2u, r061B), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r061D = lequal(body.constant(2045u), r05D2);
+ ir_if *f061C = new(mem_ctx) ir_if(operand(r061D).val);
+ exec_list *const f061C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f061C->then_instructions;
+
+ ir_variable *const r061E = body.make_temp(glsl_type::bool_type, "or_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0620 = less(body.constant(2045u), r05D2);
+ ir_if *f061F = new(mem_ctx) ir_if(operand(r0620).val);
+ exec_list *const f061F_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f061F->then_instructions;
+
+ body.emit(assign(r061E, body.constant(true), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f061F->else_instructions;
+
+ ir_variable *const r0621 = body.make_temp(glsl_type::bool_type, "and_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0623 = equal(r05D2, body.constant(2045u));
+ ir_if *f0622 = new(mem_ctx) ir_if(operand(r0623).val);
+ exec_list *const f0622_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0622->then_instructions;
+
+ ir_expression *const r0624 = equal(body.constant(2097151u), r05D3);
+ ir_expression *const r0625 = equal(body.constant(4294967295u), r05D4);
+ body.emit(assign(r0621, logic_and(r0624, r0625), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0622->else_instructions;
+
+ body.emit(assign(r0621, body.constant(false), 0x01));
+
+
+ body.instructions = f0622_parent_instructions;
+ body.emit(f0622);
+
+ /* END IF */
+
+ ir_expression *const r0626 = nequal(r0619, body.constant(0u));
+ body.emit(assign(r061E, logic_and(r0621, r0626), 0x01));
+
+
+ body.instructions = f061F_parent_instructions;
+ body.emit(f061F);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f0627 = new(mem_ctx) ir_if(operand(r061E).val);
+ exec_list *const f0627_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0627->then_instructions;
+
+ ir_variable *const r0628 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r0628);
+ ir_expression *const r0629 = lshift(r03D9, body.constant(int(31)));
+ body.emit(assign(r0628, add(r0629, body.constant(2146435072u)), 0x01));
+
+ body.emit(assign(r0628, body.constant(0u), 0x02));
+
+ body.emit(assign(r0618, r0628, 0x03));
+
+ body.emit(assign(r0617, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0627->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r062B = less(r05D2, body.constant(0u));
+ ir_if *f062A = new(mem_ctx) ir_if(operand(r062B).val);
+ exec_list *const f062A_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f062A->then_instructions;
+
+ ir_variable *const r062C = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r062C, r05D5, 0x01));
+
+ ir_variable *const r062D = body.make_temp(glsl_type::int_type, "count");
+ ir_expression *const r062E = neg(r05D2);
+ body.emit(assign(r062D, expr(ir_unop_u2i, r062E), 0x01));
+
+ ir_variable *const r062F = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r062F);
+ ir_variable *const r0630 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0630);
+ ir_variable *const r0631 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r0631);
+ ir_variable *const r0632 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r0633 = neg(r062D);
+ body.emit(assign(r0632, bit_and(r0633, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0635 = equal(r062D, body.constant(int(0)));
+ ir_if *f0634 = new(mem_ctx) ir_if(operand(r0635).val);
+ exec_list *const f0634_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0634->then_instructions;
+
+ body.emit(assign(r062F, r05D5, 0x01));
+
+ body.emit(assign(r0630, r05D4, 0x01));
+
+ body.emit(assign(r0631, r05D3, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0634->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0637 = less(r062D, body.constant(int(32)));
+ ir_if *f0636 = new(mem_ctx) ir_if(operand(r0637).val);
+ exec_list *const f0636_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0636->then_instructions;
+
+ body.emit(assign(r062F, lshift(r05D4, r0632), 0x01));
+
+ ir_expression *const r0638 = lshift(r05D3, r0632);
+ ir_expression *const r0639 = rshift(r05D4, r062D);
+ body.emit(assign(r0630, bit_or(r0638, r0639), 0x01));
+
+ body.emit(assign(r0631, rshift(r05D3, r062D), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0636->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r063B = equal(r062D, body.constant(int(32)));
+ ir_if *f063A = new(mem_ctx) ir_if(operand(r063B).val);
+ exec_list *const f063A_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f063A->then_instructions;
+
+ body.emit(assign(r062F, r05D4, 0x01));
+
+ body.emit(assign(r0630, r05D3, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f063A->else_instructions;
+
+ body.emit(assign(r062C, bit_or(r05D5, r05D4), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r063D = less(r062D, body.constant(int(64)));
+ ir_if *f063C = new(mem_ctx) ir_if(operand(r063D).val);
+ exec_list *const f063C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f063C->then_instructions;
+
+ body.emit(assign(r062F, lshift(r05D3, r0632), 0x01));
+
+ ir_expression *const r063E = bit_and(r062D, body.constant(int(31)));
+ body.emit(assign(r0630, rshift(r05D3, r063E), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f063C->else_instructions;
+
+ ir_variable *const r063F = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0641 = equal(r062D, body.constant(int(64)));
+ ir_if *f0640 = new(mem_ctx) ir_if(operand(r0641).val);
+ exec_list *const f0640_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0640->then_instructions;
+
+ body.emit(assign(r063F, r05D3, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0640->else_instructions;
+
+ ir_expression *const r0642 = nequal(r05D3, body.constant(0u));
+ ir_expression *const r0643 = expr(ir_unop_b2i, r0642);
+ body.emit(assign(r063F, expr(ir_unop_i2u, r0643), 0x01));
+
+
+ body.instructions = f0640_parent_instructions;
+ body.emit(f0640);
+
+ /* END IF */
+
+ body.emit(assign(r062F, r063F, 0x01));
+
+ body.emit(assign(r0630, body.constant(0u), 0x01));
+
+
+ body.instructions = f063C_parent_instructions;
+ body.emit(f063C);
+
+ /* END IF */
+
+
+ body.instructions = f063A_parent_instructions;
+ body.emit(f063A);
+
+ /* END IF */
+
+ body.emit(assign(r0631, body.constant(0u), 0x01));
+
+
+ body.instructions = f0636_parent_instructions;
+ body.emit(f0636);
+
+ /* END IF */
+
+ ir_expression *const r0644 = nequal(r062C, body.constant(0u));
+ ir_expression *const r0645 = expr(ir_unop_b2i, r0644);
+ ir_expression *const r0646 = expr(ir_unop_i2u, r0645);
+ body.emit(assign(r062F, bit_or(r062F, r0646), 0x01));
+
+
+ body.instructions = f0634_parent_instructions;
+ body.emit(f0634);
+
+ /* END IF */
+
+ body.emit(assign(r0614, r0631, 0x01));
+
+ body.emit(assign(r0615, r0630, 0x01));
+
+ body.emit(assign(r0616, r062F, 0x01));
+
+ body.emit(assign(r0613, body.constant(0u), 0x01));
+
+ ir_expression *const r0647 = less(r062F, body.constant(0u));
+ ir_expression *const r0648 = expr(ir_unop_b2i, r0647);
+ body.emit(assign(r0619, expr(ir_unop_i2u, r0648), 0x01));
+
+
+ body.instructions = f062A_parent_instructions;
+ body.emit(f062A);
+
+ /* END IF */
+
+
+ body.instructions = f0627_parent_instructions;
+ body.emit(f0627);
+
+ /* END IF */
+
+
+ body.instructions = f061C_parent_instructions;
+ body.emit(f061C);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f0649 = new(mem_ctx) ir_if(operand(r0617).val);
+ exec_list *const f0649_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0649->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r064B = nequal(r0619, body.constant(0u));
+ ir_if *f064A = new(mem_ctx) ir_if(operand(r064B).val);
+ exec_list *const f064A_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f064A->then_instructions;
+
+ ir_variable *const r064C = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r064C);
+ body.emit(assign(r064C, add(r0615, body.constant(1u)), 0x01));
+
+ ir_expression *const r064D = less(r064C, r0615);
+ ir_expression *const r064E = expr(ir_unop_b2i, r064D);
+ ir_expression *const r064F = expr(ir_unop_i2u, r064E);
+ body.emit(assign(r0614, add(r0614, r064F), 0x01));
+
+ ir_expression *const r0650 = neg(r0616);
+ ir_expression *const r0651 = equal(r0616, r0650);
+ ir_expression *const r0652 = expr(ir_unop_b2i, r0651);
+ ir_expression *const r0653 = expr(ir_unop_i2u, r0652);
+ ir_expression *const r0654 = bit_and(r0653, body.constant(1u));
+ ir_expression *const r0655 = expr(ir_unop_bit_not, r0654);
+ body.emit(assign(r0615, bit_and(r064C, r0655), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f064A->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0657 = bit_or(r0614, r0615);
+ ir_expression *const r0658 = equal(r0657, body.constant(0u));
+ ir_if *f0656 = new(mem_ctx) ir_if(operand(r0658).val);
+ exec_list *const f0656_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0656->then_instructions;
+
+ body.emit(assign(r0613, body.constant(0u), 0x01));
+
+
+ body.instructions = f0656_parent_instructions;
+ body.emit(f0656);
+
+ /* END IF */
+
+
+ body.instructions = f064A_parent_instructions;
+ body.emit(f064A);
+
+ /* END IF */
+
+ ir_variable *const r0659 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r0659);
+ ir_expression *const r065A = lshift(r03D9, body.constant(int(31)));
+ ir_expression *const r065B = lshift(r0613, body.constant(int(20)));
+ ir_expression *const r065C = add(r065A, r065B);
+ body.emit(assign(r0659, add(r065C, r0614), 0x01));
+
+ body.emit(assign(r0659, r0615, 0x02));
+
+ body.emit(assign(r0618, r0659, 0x03));
+
+ body.emit(assign(r0617, body.constant(false), 0x01));
+
+
+ body.instructions = f0649_parent_instructions;
+ body.emit(f0649);
+
+ /* END IF */
+
+ body.emit(assign(r03DA, r0618, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f05CA->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r065E = less(swizzle_x(r03E0), swizzle_x(r03DF));
+ ir_if *f065D = new(mem_ctx) ir_if(operand(r065E).val);
+ exec_list *const f065D_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f065D->then_instructions;
+
+ ir_variable *const r065F = body.make_temp(glsl_type::uint_type, "z0Ptr");
+ ir_variable *const r0660 = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r0660, sub(swizzle_y(r03DF), swizzle_y(r03E0)), 0x01));
+
+ ir_expression *const r0661 = sub(swizzle_x(r03DF), swizzle_x(r03E0));
+ ir_expression *const r0662 = less(swizzle_y(r03DF), swizzle_y(r03E0));
+ ir_expression *const r0663 = expr(ir_unop_b2i, r0662);
+ ir_expression *const r0664 = expr(ir_unop_i2u, r0663);
+ body.emit(assign(r065F, sub(r0661, r0664), 0x01));
+
+ body.emit(assign(r03D9, bit_xor(r03D9, body.constant(1u)), 0x01));
+
+ body.emit(assign(r03DC, add(r03DD, body.constant(4294967295u)), 0x01));
+
+ ir_variable *const r0665 = body.make_temp(glsl_type::uint_type, "zExp");
+ body.emit(assign(r0665, add(r03DC, body.constant(4294967286u)), 0x01));
+
+ ir_variable *const r0666 = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r0666, r065F, 0x01));
+
+ ir_variable *const r0667 = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r0667, r0660, 0x01));
+
+ ir_variable *const r0668 = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac2", ir_var_auto);
+ body.emit(r0668);
+ ir_variable *const r0669 = new(mem_ctx) ir_variable(glsl_type::int_type, "shiftCount", ir_var_auto);
+ body.emit(r0669);
+ /* IF CONDITION */
+ ir_expression *const r066B = equal(r065F, body.constant(0u));
+ ir_if *f066A = new(mem_ctx) ir_if(operand(r066B).val);
+ exec_list *const f066A_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f066A->then_instructions;
+
+ body.emit(assign(r0666, r0660, 0x01));
+
+ body.emit(assign(r0667, body.constant(0u), 0x01));
+
+ body.emit(assign(r0665, add(r0665, body.constant(4294967264u)), 0x01));
+
+
+ body.instructions = f066A_parent_instructions;
+ body.emit(f066A);
+
+ /* END IF */
+
+ ir_variable *const r066C = body.make_temp(glsl_type::uint_type, "a");
+ body.emit(assign(r066C, r0666, 0x01));
+
+ ir_variable *const r066D = body.make_temp(glsl_type::uint_type, "return_value");
+ ir_variable *const r066E = new(mem_ctx) ir_variable(glsl_type::uint_type, "shiftCount", ir_var_auto);
+ body.emit(r066E);
+ /* IF CONDITION */
+ ir_expression *const r0670 = equal(r0666, body.constant(0u));
+ ir_if *f066F = new(mem_ctx) ir_if(operand(r0670).val);
+ exec_list *const f066F_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f066F->then_instructions;
+
+ body.emit(assign(r066D, body.constant(32u), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f066F->else_instructions;
+
+ body.emit(assign(r066E, body.constant(0u), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0672 = bit_and(r0666, body.constant(4294901760u));
+ ir_expression *const r0673 = equal(r0672, body.constant(0u));
+ ir_if *f0671 = new(mem_ctx) ir_if(operand(r0673).val);
+ exec_list *const f0671_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0671->then_instructions;
+
+ body.emit(assign(r066E, body.constant(16u), 0x01));
+
+ body.emit(assign(r066C, lshift(r0666, body.constant(int(16))), 0x01));
+
+
+ body.instructions = f0671_parent_instructions;
+ body.emit(f0671);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0675 = bit_and(r066C, body.constant(4278190080u));
+ ir_expression *const r0676 = equal(r0675, body.constant(0u));
+ ir_if *f0674 = new(mem_ctx) ir_if(operand(r0676).val);
+ exec_list *const f0674_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0674->then_instructions;
+
+ body.emit(assign(r066E, add(r066E, body.constant(8u)), 0x01));
+
+ body.emit(assign(r066C, lshift(r066C, body.constant(int(8))), 0x01));
+
+
+ body.instructions = f0674_parent_instructions;
+ body.emit(f0674);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0678 = bit_and(r066C, body.constant(4026531840u));
+ ir_expression *const r0679 = equal(r0678, body.constant(0u));
+ ir_if *f0677 = new(mem_ctx) ir_if(operand(r0679).val);
+ exec_list *const f0677_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0677->then_instructions;
+
+ body.emit(assign(r066E, add(r066E, body.constant(4u)), 0x01));
+
+ body.emit(assign(r066C, lshift(r066C, body.constant(int(4))), 0x01));
+
+
+ body.instructions = f0677_parent_instructions;
+ body.emit(f0677);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r067B = bit_and(r066C, body.constant(3221225472u));
+ ir_expression *const r067C = equal(r067B, body.constant(0u));
+ ir_if *f067A = new(mem_ctx) ir_if(operand(r067C).val);
+ exec_list *const f067A_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f067A->then_instructions;
+
+ body.emit(assign(r066E, add(r066E, body.constant(2u)), 0x01));
+
+ body.emit(assign(r066C, lshift(r066C, body.constant(int(2))), 0x01));
+
+
+ body.instructions = f067A_parent_instructions;
+ body.emit(f067A);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r067E = bit_and(r066C, body.constant(2147483648u));
+ ir_expression *const r067F = equal(r067E, body.constant(0u));
+ ir_if *f067D = new(mem_ctx) ir_if(operand(r067F).val);
+ exec_list *const f067D_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f067D->then_instructions;
+
+ body.emit(assign(r066E, add(r066E, body.constant(1u)), 0x01));
+
+
+ body.instructions = f067D_parent_instructions;
+ body.emit(f067D);
+
+ /* END IF */
+
+ body.emit(assign(r066D, r066E, 0x01));
+
+
+ body.instructions = f066F_parent_instructions;
+ body.emit(f066F);
+
+ /* END IF */
+
+ ir_expression *const r0680 = expr(ir_unop_u2i, r066D);
+ body.emit(assign(r0669, add(r0680, body.constant(int(-11))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0682 = lequal(body.constant(int(0)), r0669);
+ ir_if *f0681 = new(mem_ctx) ir_if(operand(r0682).val);
+ exec_list *const f0681_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0681->then_instructions;
+
+ body.emit(assign(r0668, body.constant(0u), 0x01));
+
+ ir_variable *const r0683 = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r0683, lshift(r0667, r0669), 0x01));
+
+ ir_variable *const r0684 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0686 = equal(r0669, body.constant(int(0)));
+ ir_if *f0685 = new(mem_ctx) ir_if(operand(r0686).val);
+ exec_list *const f0685_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0685->then_instructions;
+
+ body.emit(assign(r0684, r0666, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0685->else_instructions;
+
+ ir_expression *const r0687 = lshift(r0666, r0669);
+ ir_expression *const r0688 = neg(r0669);
+ ir_expression *const r0689 = bit_and(r0688, body.constant(int(31)));
+ ir_expression *const r068A = rshift(r0667, r0689);
+ body.emit(assign(r0684, bit_or(r0687, r068A), 0x01));
+
+
+ body.instructions = f0685_parent_instructions;
+ body.emit(f0685);
+
+ /* END IF */
+
+ body.emit(assign(r0666, r0684, 0x01));
+
+ body.emit(assign(r0667, r0683, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0681->else_instructions;
+
+ ir_variable *const r068B = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r068B, body.constant(0u), 0x01));
+
+ ir_variable *const r068C = body.make_temp(glsl_type::int_type, "count");
+ body.emit(assign(r068C, neg(r0669), 0x01));
+
+ ir_variable *const r068D = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r068D);
+ ir_variable *const r068E = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r068E);
+ ir_variable *const r068F = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r068F);
+ ir_variable *const r0690 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r0691 = neg(r068C);
+ body.emit(assign(r0690, bit_and(r0691, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0693 = equal(r068C, body.constant(int(0)));
+ ir_if *f0692 = new(mem_ctx) ir_if(operand(r0693).val);
+ exec_list *const f0692_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0692->then_instructions;
+
+ body.emit(assign(r068D, r068B, 0x01));
+
+ body.emit(assign(r068E, r0667, 0x01));
+
+ body.emit(assign(r068F, r0666, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0692->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0695 = less(r068C, body.constant(int(32)));
+ ir_if *f0694 = new(mem_ctx) ir_if(operand(r0695).val);
+ exec_list *const f0694_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0694->then_instructions;
+
+ body.emit(assign(r068D, lshift(r0667, r0690), 0x01));
+
+ ir_expression *const r0696 = lshift(r0666, r0690);
+ ir_expression *const r0697 = rshift(r0667, r068C);
+ body.emit(assign(r068E, bit_or(r0696, r0697), 0x01));
+
+ body.emit(assign(r068F, rshift(r0666, r068C), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0694->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0699 = equal(r068C, body.constant(int(32)));
+ ir_if *f0698 = new(mem_ctx) ir_if(operand(r0699).val);
+ exec_list *const f0698_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0698->then_instructions;
+
+ body.emit(assign(r068D, r0667, 0x01));
+
+ body.emit(assign(r068E, r0666, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0698->else_instructions;
+
+ body.emit(assign(r068B, bit_or(body.constant(0u), r0667), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r069B = less(r068C, body.constant(int(64)));
+ ir_if *f069A = new(mem_ctx) ir_if(operand(r069B).val);
+ exec_list *const f069A_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f069A->then_instructions;
+
+ body.emit(assign(r068D, lshift(r0666, r0690), 0x01));
+
+ ir_expression *const r069C = bit_and(r068C, body.constant(int(31)));
+ body.emit(assign(r068E, rshift(r0666, r069C), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f069A->else_instructions;
+
+ ir_variable *const r069D = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r069F = equal(r068C, body.constant(int(64)));
+ ir_if *f069E = new(mem_ctx) ir_if(operand(r069F).val);
+ exec_list *const f069E_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f069E->then_instructions;
+
+ body.emit(assign(r069D, r0666, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f069E->else_instructions;
+
+ ir_expression *const r06A0 = nequal(r0666, body.constant(0u));
+ ir_expression *const r06A1 = expr(ir_unop_b2i, r06A0);
+ body.emit(assign(r069D, expr(ir_unop_i2u, r06A1), 0x01));
+
+
+ body.instructions = f069E_parent_instructions;
+ body.emit(f069E);
+
+ /* END IF */
+
+ body.emit(assign(r068D, r069D, 0x01));
+
+ body.emit(assign(r068E, body.constant(0u), 0x01));
+
+
+ body.instructions = f069A_parent_instructions;
+ body.emit(f069A);
+
+ /* END IF */
+
+
+ body.instructions = f0698_parent_instructions;
+ body.emit(f0698);
+
+ /* END IF */
+
+ body.emit(assign(r068F, body.constant(0u), 0x01));
+
+
+ body.instructions = f0694_parent_instructions;
+ body.emit(f0694);
+
+ /* END IF */
+
+ ir_expression *const r06A2 = nequal(r068B, body.constant(0u));
+ ir_expression *const r06A3 = expr(ir_unop_b2i, r06A2);
+ ir_expression *const r06A4 = expr(ir_unop_i2u, r06A3);
+ body.emit(assign(r068D, bit_or(r068D, r06A4), 0x01));
+
+
+ body.instructions = f0692_parent_instructions;
+ body.emit(f0692);
+
+ /* END IF */
+
+ body.emit(assign(r0666, r068F, 0x01));
+
+ body.emit(assign(r0667, r068E, 0x01));
+
+ body.emit(assign(r0668, r068D, 0x01));
+
+
+ body.instructions = f0681_parent_instructions;
+ body.emit(f0681);
+
+ /* END IF */
+
+ ir_expression *const r06A5 = expr(ir_unop_i2u, r0669);
+ body.emit(assign(r0665, sub(r0665, r06A5), 0x01));
+
+ ir_variable *const r06A6 = body.make_temp(glsl_type::uint_type, "zExp");
+ body.emit(assign(r06A6, r0665, 0x01));
+
+ ir_variable *const r06A7 = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r06A7, r0666, 0x01));
+
+ ir_variable *const r06A8 = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r06A8, r0667, 0x01));
+
+ ir_variable *const r06A9 = body.make_temp(glsl_type::uint_type, "zFrac2");
+ body.emit(assign(r06A9, r0668, 0x01));
+
+ ir_variable *const r06AA = body.make_temp(glsl_type::bool_type, "execute_flag");
+ body.emit(assign(r06AA, body.constant(true), 0x01));
+
+ ir_variable *const r06AB = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r06AC = new(mem_ctx) ir_variable(glsl_type::uint_type, "increment", ir_var_auto);
+ body.emit(r06AC);
+ ir_expression *const r06AD = less(r0668, body.constant(0u));
+ ir_expression *const r06AE = expr(ir_unop_b2i, r06AD);
+ body.emit(assign(r06AC, expr(ir_unop_i2u, r06AE), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r06B0 = lequal(body.constant(2045u), r0665);
+ ir_if *f06AF = new(mem_ctx) ir_if(operand(r06B0).val);
+ exec_list *const f06AF_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f06AF->then_instructions;
+
+ ir_variable *const r06B1 = body.make_temp(glsl_type::bool_type, "or_tmp");
+ /* IF CONDITION */
+ ir_expression *const r06B3 = less(body.constant(2045u), r0665);
+ ir_if *f06B2 = new(mem_ctx) ir_if(operand(r06B3).val);
+ exec_list *const f06B2_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f06B2->then_instructions;
+
+ body.emit(assign(r06B1, body.constant(true), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f06B2->else_instructions;
+
+ ir_variable *const r06B4 = body.make_temp(glsl_type::bool_type, "and_tmp");
+ /* IF CONDITION */
+ ir_expression *const r06B6 = equal(r0665, body.constant(2045u));
+ ir_if *f06B5 = new(mem_ctx) ir_if(operand(r06B6).val);
+ exec_list *const f06B5_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f06B5->then_instructions;
+
+ ir_expression *const r06B7 = equal(body.constant(2097151u), r0666);
+ ir_expression *const r06B8 = equal(body.constant(4294967295u), r0667);
+ body.emit(assign(r06B4, logic_and(r06B7, r06B8), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f06B5->else_instructions;
+
+ body.emit(assign(r06B4, body.constant(false), 0x01));
+
+
+ body.instructions = f06B5_parent_instructions;
+ body.emit(f06B5);
+
+ /* END IF */
+
+ ir_expression *const r06B9 = nequal(r06AC, body.constant(0u));
+ body.emit(assign(r06B1, logic_and(r06B4, r06B9), 0x01));
+
+
+ body.instructions = f06B2_parent_instructions;
+ body.emit(f06B2);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f06BA = new(mem_ctx) ir_if(operand(r06B1).val);
+ exec_list *const f06BA_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f06BA->then_instructions;
+
+ ir_variable *const r06BB = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r06BB);
+ ir_expression *const r06BC = lshift(r03D9, body.constant(int(31)));
+ body.emit(assign(r06BB, add(r06BC, body.constant(2146435072u)), 0x01));
+
+ body.emit(assign(r06BB, body.constant(0u), 0x02));
+
+ body.emit(assign(r06AB, r06BB, 0x03));
+
+ body.emit(assign(r06AA, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f06BA->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r06BE = less(r0665, body.constant(0u));
+ ir_if *f06BD = new(mem_ctx) ir_if(operand(r06BE).val);
+ exec_list *const f06BD_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f06BD->then_instructions;
+
+ ir_variable *const r06BF = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r06BF, r0668, 0x01));
+
+ ir_variable *const r06C0 = body.make_temp(glsl_type::int_type, "count");
+ ir_expression *const r06C1 = neg(r0665);
+ body.emit(assign(r06C0, expr(ir_unop_u2i, r06C1), 0x01));
+
+ ir_variable *const r06C2 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r06C2);
+ ir_variable *const r06C3 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r06C3);
+ ir_variable *const r06C4 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r06C4);
+ ir_variable *const r06C5 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r06C6 = neg(r06C0);
+ body.emit(assign(r06C5, bit_and(r06C6, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r06C8 = equal(r06C0, body.constant(int(0)));
+ ir_if *f06C7 = new(mem_ctx) ir_if(operand(r06C8).val);
+ exec_list *const f06C7_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f06C7->then_instructions;
+
+ body.emit(assign(r06C2, r0668, 0x01));
+
+ body.emit(assign(r06C3, r0667, 0x01));
+
+ body.emit(assign(r06C4, r0666, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f06C7->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r06CA = less(r06C0, body.constant(int(32)));
+ ir_if *f06C9 = new(mem_ctx) ir_if(operand(r06CA).val);
+ exec_list *const f06C9_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f06C9->then_instructions;
+
+ body.emit(assign(r06C2, lshift(r0667, r06C5), 0x01));
+
+ ir_expression *const r06CB = lshift(r0666, r06C5);
+ ir_expression *const r06CC = rshift(r0667, r06C0);
+ body.emit(assign(r06C3, bit_or(r06CB, r06CC), 0x01));
+
+ body.emit(assign(r06C4, rshift(r0666, r06C0), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f06C9->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r06CE = equal(r06C0, body.constant(int(32)));
+ ir_if *f06CD = new(mem_ctx) ir_if(operand(r06CE).val);
+ exec_list *const f06CD_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f06CD->then_instructions;
+
+ body.emit(assign(r06C2, r0667, 0x01));
+
+ body.emit(assign(r06C3, r0666, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f06CD->else_instructions;
+
+ body.emit(assign(r06BF, bit_or(r0668, r0667), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r06D0 = less(r06C0, body.constant(int(64)));
+ ir_if *f06CF = new(mem_ctx) ir_if(operand(r06D0).val);
+ exec_list *const f06CF_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f06CF->then_instructions;
+
+ body.emit(assign(r06C2, lshift(r0666, r06C5), 0x01));
+
+ ir_expression *const r06D1 = bit_and(r06C0, body.constant(int(31)));
+ body.emit(assign(r06C3, rshift(r0666, r06D1), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f06CF->else_instructions;
+
+ ir_variable *const r06D2 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r06D4 = equal(r06C0, body.constant(int(64)));
+ ir_if *f06D3 = new(mem_ctx) ir_if(operand(r06D4).val);
+ exec_list *const f06D3_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f06D3->then_instructions;
+
+ body.emit(assign(r06D2, r0666, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f06D3->else_instructions;
+
+ ir_expression *const r06D5 = nequal(r0666, body.constant(0u));
+ ir_expression *const r06D6 = expr(ir_unop_b2i, r06D5);
+ body.emit(assign(r06D2, expr(ir_unop_i2u, r06D6), 0x01));
+
+
+ body.instructions = f06D3_parent_instructions;
+ body.emit(f06D3);
+
+ /* END IF */
+
+ body.emit(assign(r06C2, r06D2, 0x01));
+
+ body.emit(assign(r06C3, body.constant(0u), 0x01));
+
+
+ body.instructions = f06CF_parent_instructions;
+ body.emit(f06CF);
+
+ /* END IF */
+
+
+ body.instructions = f06CD_parent_instructions;
+ body.emit(f06CD);
+
+ /* END IF */
+
+ body.emit(assign(r06C4, body.constant(0u), 0x01));
+
+
+ body.instructions = f06C9_parent_instructions;
+ body.emit(f06C9);
+
+ /* END IF */
+
+ ir_expression *const r06D7 = nequal(r06BF, body.constant(0u));
+ ir_expression *const r06D8 = expr(ir_unop_b2i, r06D7);
+ ir_expression *const r06D9 = expr(ir_unop_i2u, r06D8);
+ body.emit(assign(r06C2, bit_or(r06C2, r06D9), 0x01));
+
+
+ body.instructions = f06C7_parent_instructions;
+ body.emit(f06C7);
+
+ /* END IF */
+
+ body.emit(assign(r06A7, r06C4, 0x01));
+
+ body.emit(assign(r06A8, r06C3, 0x01));
+
+ body.emit(assign(r06A9, r06C2, 0x01));
+
+ body.emit(assign(r06A6, body.constant(0u), 0x01));
+
+ ir_expression *const r06DA = less(r06C2, body.constant(0u));
+ ir_expression *const r06DB = expr(ir_unop_b2i, r06DA);
+ body.emit(assign(r06AC, expr(ir_unop_i2u, r06DB), 0x01));
+
+
+ body.instructions = f06BD_parent_instructions;
+ body.emit(f06BD);
+
+ /* END IF */
+
+
+ body.instructions = f06BA_parent_instructions;
+ body.emit(f06BA);
+
+ /* END IF */
+
+
+ body.instructions = f06AF_parent_instructions;
+ body.emit(f06AF);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f06DC = new(mem_ctx) ir_if(operand(r06AA).val);
+ exec_list *const f06DC_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f06DC->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r06DE = nequal(r06AC, body.constant(0u));
+ ir_if *f06DD = new(mem_ctx) ir_if(operand(r06DE).val);
+ exec_list *const f06DD_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f06DD->then_instructions;
+
+ ir_variable *const r06DF = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r06DF);
+ body.emit(assign(r06DF, add(r06A8, body.constant(1u)), 0x01));
+
+ ir_expression *const r06E0 = less(r06DF, r06A8);
+ ir_expression *const r06E1 = expr(ir_unop_b2i, r06E0);
+ ir_expression *const r06E2 = expr(ir_unop_i2u, r06E1);
+ body.emit(assign(r06A7, add(r06A7, r06E2), 0x01));
+
+ ir_expression *const r06E3 = neg(r06A9);
+ ir_expression *const r06E4 = equal(r06A9, r06E3);
+ ir_expression *const r06E5 = expr(ir_unop_b2i, r06E4);
+ ir_expression *const r06E6 = expr(ir_unop_i2u, r06E5);
+ ir_expression *const r06E7 = bit_and(r06E6, body.constant(1u));
+ ir_expression *const r06E8 = expr(ir_unop_bit_not, r06E7);
+ body.emit(assign(r06A8, bit_and(r06DF, r06E8), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f06DD->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r06EA = bit_or(r06A7, r06A8);
+ ir_expression *const r06EB = equal(r06EA, body.constant(0u));
+ ir_if *f06E9 = new(mem_ctx) ir_if(operand(r06EB).val);
+ exec_list *const f06E9_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f06E9->then_instructions;
+
+ body.emit(assign(r06A6, body.constant(0u), 0x01));
+
+
+ body.instructions = f06E9_parent_instructions;
+ body.emit(f06E9);
+
+ /* END IF */
+
+
+ body.instructions = f06DD_parent_instructions;
+ body.emit(f06DD);
+
+ /* END IF */
+
+ ir_variable *const r06EC = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r06EC);
+ ir_expression *const r06ED = lshift(r03D9, body.constant(int(31)));
+ ir_expression *const r06EE = lshift(r06A6, body.constant(int(20)));
+ ir_expression *const r06EF = add(r06ED, r06EE);
+ body.emit(assign(r06EC, add(r06EF, r06A7), 0x01));
+
+ body.emit(assign(r06EC, r06A8, 0x02));
+
+ body.emit(assign(r06AB, r06EC, 0x03));
+
+ body.emit(assign(r06AA, body.constant(false), 0x01));
+
+
+ body.instructions = f06DC_parent_instructions;
+ body.emit(f06DC);
+
+ /* END IF */
+
+ body.emit(assign(r03DA, r06AB, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f065D->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r06F1 = less(swizzle_y(r03DF), swizzle_y(r03E0));
+ ir_if *f06F0 = new(mem_ctx) ir_if(operand(r06F1).val);
+ exec_list *const f06F0_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f06F0->then_instructions;
+
+ ir_variable *const r06F2 = body.make_temp(glsl_type::uint_type, "z0Ptr");
+ ir_variable *const r06F3 = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r06F3, sub(swizzle_y(r03E0), swizzle_y(r03DF)), 0x01));
+
+ ir_expression *const r06F4 = sub(swizzle_x(r03E0), swizzle_x(r03DF));
+ ir_expression *const r06F5 = less(swizzle_y(r03E0), swizzle_y(r03DF));
+ ir_expression *const r06F6 = expr(ir_unop_b2i, r06F5);
+ ir_expression *const r06F7 = expr(ir_unop_i2u, r06F6);
+ body.emit(assign(r06F2, sub(r06F4, r06F7), 0x01));
+
+ body.emit(assign(r03DC, add(r03DE, body.constant(4294967295u)), 0x01));
+
+ ir_variable *const r06F8 = body.make_temp(glsl_type::uint_type, "zExp");
+ body.emit(assign(r06F8, add(r03DC, body.constant(4294967286u)), 0x01));
+
+ ir_variable *const r06F9 = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r06F9, r06F2, 0x01));
+
+ ir_variable *const r06FA = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r06FA, r06F3, 0x01));
+
+ ir_variable *const r06FB = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac2", ir_var_auto);
+ body.emit(r06FB);
+ ir_variable *const r06FC = new(mem_ctx) ir_variable(glsl_type::int_type, "shiftCount", ir_var_auto);
+ body.emit(r06FC);
+ /* IF CONDITION */
+ ir_expression *const r06FE = equal(r06F2, body.constant(0u));
+ ir_if *f06FD = new(mem_ctx) ir_if(operand(r06FE).val);
+ exec_list *const f06FD_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f06FD->then_instructions;
+
+ body.emit(assign(r06F9, r06F3, 0x01));
+
+ body.emit(assign(r06FA, body.constant(0u), 0x01));
+
+ body.emit(assign(r06F8, add(r06F8, body.constant(4294967264u)), 0x01));
+
+
+ body.instructions = f06FD_parent_instructions;
+ body.emit(f06FD);
+
+ /* END IF */
+
+ ir_variable *const r06FF = body.make_temp(glsl_type::uint_type, "a");
+ body.emit(assign(r06FF, r06F9, 0x01));
+
+ ir_variable *const r0700 = body.make_temp(glsl_type::uint_type, "return_value");
+ ir_variable *const r0701 = new(mem_ctx) ir_variable(glsl_type::uint_type, "shiftCount", ir_var_auto);
+ body.emit(r0701);
+ /* IF CONDITION */
+ ir_expression *const r0703 = equal(r06F9, body.constant(0u));
+ ir_if *f0702 = new(mem_ctx) ir_if(operand(r0703).val);
+ exec_list *const f0702_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0702->then_instructions;
+
+ body.emit(assign(r0700, body.constant(32u), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0702->else_instructions;
+
+ body.emit(assign(r0701, body.constant(0u), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0705 = bit_and(r06F9, body.constant(4294901760u));
+ ir_expression *const r0706 = equal(r0705, body.constant(0u));
+ ir_if *f0704 = new(mem_ctx) ir_if(operand(r0706).val);
+ exec_list *const f0704_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0704->then_instructions;
+
+ body.emit(assign(r0701, body.constant(16u), 0x01));
+
+ body.emit(assign(r06FF, lshift(r06F9, body.constant(int(16))), 0x01));
+
+
+ body.instructions = f0704_parent_instructions;
+ body.emit(f0704);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0708 = bit_and(r06FF, body.constant(4278190080u));
+ ir_expression *const r0709 = equal(r0708, body.constant(0u));
+ ir_if *f0707 = new(mem_ctx) ir_if(operand(r0709).val);
+ exec_list *const f0707_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0707->then_instructions;
+
+ body.emit(assign(r0701, add(r0701, body.constant(8u)), 0x01));
+
+ body.emit(assign(r06FF, lshift(r06FF, body.constant(int(8))), 0x01));
+
+
+ body.instructions = f0707_parent_instructions;
+ body.emit(f0707);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r070B = bit_and(r06FF, body.constant(4026531840u));
+ ir_expression *const r070C = equal(r070B, body.constant(0u));
+ ir_if *f070A = new(mem_ctx) ir_if(operand(r070C).val);
+ exec_list *const f070A_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f070A->then_instructions;
+
+ body.emit(assign(r0701, add(r0701, body.constant(4u)), 0x01));
+
+ body.emit(assign(r06FF, lshift(r06FF, body.constant(int(4))), 0x01));
+
+
+ body.instructions = f070A_parent_instructions;
+ body.emit(f070A);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r070E = bit_and(r06FF, body.constant(3221225472u));
+ ir_expression *const r070F = equal(r070E, body.constant(0u));
+ ir_if *f070D = new(mem_ctx) ir_if(operand(r070F).val);
+ exec_list *const f070D_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f070D->then_instructions;
+
+ body.emit(assign(r0701, add(r0701, body.constant(2u)), 0x01));
+
+ body.emit(assign(r06FF, lshift(r06FF, body.constant(int(2))), 0x01));
+
+
+ body.instructions = f070D_parent_instructions;
+ body.emit(f070D);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0711 = bit_and(r06FF, body.constant(2147483648u));
+ ir_expression *const r0712 = equal(r0711, body.constant(0u));
+ ir_if *f0710 = new(mem_ctx) ir_if(operand(r0712).val);
+ exec_list *const f0710_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0710->then_instructions;
+
+ body.emit(assign(r0701, add(r0701, body.constant(1u)), 0x01));
+
+
+ body.instructions = f0710_parent_instructions;
+ body.emit(f0710);
+
+ /* END IF */
+
+ body.emit(assign(r0700, r0701, 0x01));
+
+
+ body.instructions = f0702_parent_instructions;
+ body.emit(f0702);
+
+ /* END IF */
+
+ ir_expression *const r0713 = expr(ir_unop_u2i, r0700);
+ body.emit(assign(r06FC, add(r0713, body.constant(int(-11))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0715 = lequal(body.constant(int(0)), r06FC);
+ ir_if *f0714 = new(mem_ctx) ir_if(operand(r0715).val);
+ exec_list *const f0714_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0714->then_instructions;
+
+ body.emit(assign(r06FB, body.constant(0u), 0x01));
+
+ ir_variable *const r0716 = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r0716, lshift(r06FA, r06FC), 0x01));
+
+ ir_variable *const r0717 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0719 = equal(r06FC, body.constant(int(0)));
+ ir_if *f0718 = new(mem_ctx) ir_if(operand(r0719).val);
+ exec_list *const f0718_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0718->then_instructions;
+
+ body.emit(assign(r0717, r06F9, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0718->else_instructions;
+
+ ir_expression *const r071A = lshift(r06F9, r06FC);
+ ir_expression *const r071B = neg(r06FC);
+ ir_expression *const r071C = bit_and(r071B, body.constant(int(31)));
+ ir_expression *const r071D = rshift(r06FA, r071C);
+ body.emit(assign(r0717, bit_or(r071A, r071D), 0x01));
+
+
+ body.instructions = f0718_parent_instructions;
+ body.emit(f0718);
+
+ /* END IF */
+
+ body.emit(assign(r06F9, r0717, 0x01));
+
+ body.emit(assign(r06FA, r0716, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0714->else_instructions;
+
+ ir_variable *const r071E = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r071E, body.constant(0u), 0x01));
+
+ ir_variable *const r071F = body.make_temp(glsl_type::int_type, "count");
+ body.emit(assign(r071F, neg(r06FC), 0x01));
+
+ ir_variable *const r0720 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r0720);
+ ir_variable *const r0721 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0721);
+ ir_variable *const r0722 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r0722);
+ ir_variable *const r0723 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r0724 = neg(r071F);
+ body.emit(assign(r0723, bit_and(r0724, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0726 = equal(r071F, body.constant(int(0)));
+ ir_if *f0725 = new(mem_ctx) ir_if(operand(r0726).val);
+ exec_list *const f0725_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0725->then_instructions;
+
+ body.emit(assign(r0720, r071E, 0x01));
+
+ body.emit(assign(r0721, r06FA, 0x01));
+
+ body.emit(assign(r0722, r06F9, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0725->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0728 = less(r071F, body.constant(int(32)));
+ ir_if *f0727 = new(mem_ctx) ir_if(operand(r0728).val);
+ exec_list *const f0727_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0727->then_instructions;
+
+ body.emit(assign(r0720, lshift(r06FA, r0723), 0x01));
+
+ ir_expression *const r0729 = lshift(r06F9, r0723);
+ ir_expression *const r072A = rshift(r06FA, r071F);
+ body.emit(assign(r0721, bit_or(r0729, r072A), 0x01));
+
+ body.emit(assign(r0722, rshift(r06F9, r071F), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0727->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r072C = equal(r071F, body.constant(int(32)));
+ ir_if *f072B = new(mem_ctx) ir_if(operand(r072C).val);
+ exec_list *const f072B_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f072B->then_instructions;
+
+ body.emit(assign(r0720, r06FA, 0x01));
+
+ body.emit(assign(r0721, r06F9, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f072B->else_instructions;
+
+ body.emit(assign(r071E, bit_or(body.constant(0u), r06FA), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r072E = less(r071F, body.constant(int(64)));
+ ir_if *f072D = new(mem_ctx) ir_if(operand(r072E).val);
+ exec_list *const f072D_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f072D->then_instructions;
+
+ body.emit(assign(r0720, lshift(r06F9, r0723), 0x01));
+
+ ir_expression *const r072F = bit_and(r071F, body.constant(int(31)));
+ body.emit(assign(r0721, rshift(r06F9, r072F), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f072D->else_instructions;
+
+ ir_variable *const r0730 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0732 = equal(r071F, body.constant(int(64)));
+ ir_if *f0731 = new(mem_ctx) ir_if(operand(r0732).val);
+ exec_list *const f0731_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0731->then_instructions;
+
+ body.emit(assign(r0730, r06F9, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0731->else_instructions;
+
+ ir_expression *const r0733 = nequal(r06F9, body.constant(0u));
+ ir_expression *const r0734 = expr(ir_unop_b2i, r0733);
+ body.emit(assign(r0730, expr(ir_unop_i2u, r0734), 0x01));
+
+
+ body.instructions = f0731_parent_instructions;
+ body.emit(f0731);
+
+ /* END IF */
+
+ body.emit(assign(r0720, r0730, 0x01));
+
+ body.emit(assign(r0721, body.constant(0u), 0x01));
+
+
+ body.instructions = f072D_parent_instructions;
+ body.emit(f072D);
+
+ /* END IF */
+
+
+ body.instructions = f072B_parent_instructions;
+ body.emit(f072B);
+
+ /* END IF */
+
+ body.emit(assign(r0722, body.constant(0u), 0x01));
+
+
+ body.instructions = f0727_parent_instructions;
+ body.emit(f0727);
+
+ /* END IF */
+
+ ir_expression *const r0735 = nequal(r071E, body.constant(0u));
+ ir_expression *const r0736 = expr(ir_unop_b2i, r0735);
+ ir_expression *const r0737 = expr(ir_unop_i2u, r0736);
+ body.emit(assign(r0720, bit_or(r0720, r0737), 0x01));
+
+
+ body.instructions = f0725_parent_instructions;
+ body.emit(f0725);
+
+ /* END IF */
+
+ body.emit(assign(r06F9, r0722, 0x01));
+
+ body.emit(assign(r06FA, r0721, 0x01));
+
+ body.emit(assign(r06FB, r0720, 0x01));
+
+
+ body.instructions = f0714_parent_instructions;
+ body.emit(f0714);
+
+ /* END IF */
+
+ ir_expression *const r0738 = expr(ir_unop_i2u, r06FC);
+ body.emit(assign(r06F8, sub(r06F8, r0738), 0x01));
+
+ ir_variable *const r0739 = body.make_temp(glsl_type::uint_type, "zExp");
+ body.emit(assign(r0739, r06F8, 0x01));
+
+ ir_variable *const r073A = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r073A, r06F9, 0x01));
+
+ ir_variable *const r073B = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r073B, r06FA, 0x01));
+
+ ir_variable *const r073C = body.make_temp(glsl_type::uint_type, "zFrac2");
+ body.emit(assign(r073C, r06FB, 0x01));
+
+ ir_variable *const r073D = body.make_temp(glsl_type::bool_type, "execute_flag");
+ body.emit(assign(r073D, body.constant(true), 0x01));
+
+ ir_variable *const r073E = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r073F = new(mem_ctx) ir_variable(glsl_type::uint_type, "increment", ir_var_auto);
+ body.emit(r073F);
+ ir_expression *const r0740 = less(r06FB, body.constant(0u));
+ ir_expression *const r0741 = expr(ir_unop_b2i, r0740);
+ body.emit(assign(r073F, expr(ir_unop_i2u, r0741), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0743 = lequal(body.constant(2045u), r06F8);
+ ir_if *f0742 = new(mem_ctx) ir_if(operand(r0743).val);
+ exec_list *const f0742_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0742->then_instructions;
+
+ ir_variable *const r0744 = body.make_temp(glsl_type::bool_type, "or_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0746 = less(body.constant(2045u), r06F8);
+ ir_if *f0745 = new(mem_ctx) ir_if(operand(r0746).val);
+ exec_list *const f0745_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0745->then_instructions;
+
+ body.emit(assign(r0744, body.constant(true), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0745->else_instructions;
+
+ ir_variable *const r0747 = body.make_temp(glsl_type::bool_type, "and_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0749 = equal(r06F8, body.constant(2045u));
+ ir_if *f0748 = new(mem_ctx) ir_if(operand(r0749).val);
+ exec_list *const f0748_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0748->then_instructions;
+
+ ir_expression *const r074A = equal(body.constant(2097151u), r06F9);
+ ir_expression *const r074B = equal(body.constant(4294967295u), r06FA);
+ body.emit(assign(r0747, logic_and(r074A, r074B), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0748->else_instructions;
+
+ body.emit(assign(r0747, body.constant(false), 0x01));
+
+
+ body.instructions = f0748_parent_instructions;
+ body.emit(f0748);
+
+ /* END IF */
+
+ ir_expression *const r074C = nequal(r073F, body.constant(0u));
+ body.emit(assign(r0744, logic_and(r0747, r074C), 0x01));
+
+
+ body.instructions = f0745_parent_instructions;
+ body.emit(f0745);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f074D = new(mem_ctx) ir_if(operand(r0744).val);
+ exec_list *const f074D_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f074D->then_instructions;
+
+ ir_variable *const r074E = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r074E);
+ ir_expression *const r074F = lshift(r03D9, body.constant(int(31)));
+ body.emit(assign(r074E, add(r074F, body.constant(2146435072u)), 0x01));
+
+ body.emit(assign(r074E, body.constant(0u), 0x02));
+
+ body.emit(assign(r073E, r074E, 0x03));
+
+ body.emit(assign(r073D, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f074D->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0751 = less(r06F8, body.constant(0u));
+ ir_if *f0750 = new(mem_ctx) ir_if(operand(r0751).val);
+ exec_list *const f0750_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0750->then_instructions;
+
+ ir_variable *const r0752 = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r0752, r06FB, 0x01));
+
+ ir_variable *const r0753 = body.make_temp(glsl_type::int_type, "count");
+ ir_expression *const r0754 = neg(r06F8);
+ body.emit(assign(r0753, expr(ir_unop_u2i, r0754), 0x01));
+
+ ir_variable *const r0755 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r0755);
+ ir_variable *const r0756 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0756);
+ ir_variable *const r0757 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r0757);
+ ir_variable *const r0758 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r0759 = neg(r0753);
+ body.emit(assign(r0758, bit_and(r0759, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r075B = equal(r0753, body.constant(int(0)));
+ ir_if *f075A = new(mem_ctx) ir_if(operand(r075B).val);
+ exec_list *const f075A_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f075A->then_instructions;
+
+ body.emit(assign(r0755, r06FB, 0x01));
+
+ body.emit(assign(r0756, r06FA, 0x01));
+
+ body.emit(assign(r0757, r06F9, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f075A->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r075D = less(r0753, body.constant(int(32)));
+ ir_if *f075C = new(mem_ctx) ir_if(operand(r075D).val);
+ exec_list *const f075C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f075C->then_instructions;
+
+ body.emit(assign(r0755, lshift(r06FA, r0758), 0x01));
+
+ ir_expression *const r075E = lshift(r06F9, r0758);
+ ir_expression *const r075F = rshift(r06FA, r0753);
+ body.emit(assign(r0756, bit_or(r075E, r075F), 0x01));
+
+ body.emit(assign(r0757, rshift(r06F9, r0753), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f075C->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0761 = equal(r0753, body.constant(int(32)));
+ ir_if *f0760 = new(mem_ctx) ir_if(operand(r0761).val);
+ exec_list *const f0760_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0760->then_instructions;
+
+ body.emit(assign(r0755, r06FA, 0x01));
+
+ body.emit(assign(r0756, r06F9, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0760->else_instructions;
+
+ body.emit(assign(r0752, bit_or(r06FB, r06FA), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0763 = less(r0753, body.constant(int(64)));
+ ir_if *f0762 = new(mem_ctx) ir_if(operand(r0763).val);
+ exec_list *const f0762_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0762->then_instructions;
+
+ body.emit(assign(r0755, lshift(r06F9, r0758), 0x01));
+
+ ir_expression *const r0764 = bit_and(r0753, body.constant(int(31)));
+ body.emit(assign(r0756, rshift(r06F9, r0764), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0762->else_instructions;
+
+ ir_variable *const r0765 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0767 = equal(r0753, body.constant(int(64)));
+ ir_if *f0766 = new(mem_ctx) ir_if(operand(r0767).val);
+ exec_list *const f0766_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0766->then_instructions;
+
+ body.emit(assign(r0765, r06F9, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0766->else_instructions;
+
+ ir_expression *const r0768 = nequal(r06F9, body.constant(0u));
+ ir_expression *const r0769 = expr(ir_unop_b2i, r0768);
+ body.emit(assign(r0765, expr(ir_unop_i2u, r0769), 0x01));
+
+
+ body.instructions = f0766_parent_instructions;
+ body.emit(f0766);
+
+ /* END IF */
+
+ body.emit(assign(r0755, r0765, 0x01));
+
+ body.emit(assign(r0756, body.constant(0u), 0x01));
+
+
+ body.instructions = f0762_parent_instructions;
+ body.emit(f0762);
+
+ /* END IF */
+
+
+ body.instructions = f0760_parent_instructions;
+ body.emit(f0760);
+
+ /* END IF */
+
+ body.emit(assign(r0757, body.constant(0u), 0x01));
+
+
+ body.instructions = f075C_parent_instructions;
+ body.emit(f075C);
+
+ /* END IF */
+
+ ir_expression *const r076A = nequal(r0752, body.constant(0u));
+ ir_expression *const r076B = expr(ir_unop_b2i, r076A);
+ ir_expression *const r076C = expr(ir_unop_i2u, r076B);
+ body.emit(assign(r0755, bit_or(r0755, r076C), 0x01));
+
+
+ body.instructions = f075A_parent_instructions;
+ body.emit(f075A);
+
+ /* END IF */
+
+ body.emit(assign(r073A, r0757, 0x01));
+
+ body.emit(assign(r073B, r0756, 0x01));
+
+ body.emit(assign(r073C, r0755, 0x01));
+
+ body.emit(assign(r0739, body.constant(0u), 0x01));
+
+ ir_expression *const r076D = less(r0755, body.constant(0u));
+ ir_expression *const r076E = expr(ir_unop_b2i, r076D);
+ body.emit(assign(r073F, expr(ir_unop_i2u, r076E), 0x01));
+
+
+ body.instructions = f0750_parent_instructions;
+ body.emit(f0750);
+
+ /* END IF */
+
+
+ body.instructions = f074D_parent_instructions;
+ body.emit(f074D);
+
+ /* END IF */
+
+
+ body.instructions = f0742_parent_instructions;
+ body.emit(f0742);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f076F = new(mem_ctx) ir_if(operand(r073D).val);
+ exec_list *const f076F_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f076F->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0771 = nequal(r073F, body.constant(0u));
+ ir_if *f0770 = new(mem_ctx) ir_if(operand(r0771).val);
+ exec_list *const f0770_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0770->then_instructions;
+
+ ir_variable *const r0772 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0772);
+ body.emit(assign(r0772, add(r073B, body.constant(1u)), 0x01));
+
+ ir_expression *const r0773 = less(r0772, r073B);
+ ir_expression *const r0774 = expr(ir_unop_b2i, r0773);
+ ir_expression *const r0775 = expr(ir_unop_i2u, r0774);
+ body.emit(assign(r073A, add(r073A, r0775), 0x01));
+
+ ir_expression *const r0776 = neg(r073C);
+ ir_expression *const r0777 = equal(r073C, r0776);
+ ir_expression *const r0778 = expr(ir_unop_b2i, r0777);
+ ir_expression *const r0779 = expr(ir_unop_i2u, r0778);
+ ir_expression *const r077A = bit_and(r0779, body.constant(1u));
+ ir_expression *const r077B = expr(ir_unop_bit_not, r077A);
+ body.emit(assign(r073B, bit_and(r0772, r077B), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0770->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r077D = bit_or(r073A, r073B);
+ ir_expression *const r077E = equal(r077D, body.constant(0u));
+ ir_if *f077C = new(mem_ctx) ir_if(operand(r077E).val);
+ exec_list *const f077C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f077C->then_instructions;
+
+ body.emit(assign(r0739, body.constant(0u), 0x01));
+
+
+ body.instructions = f077C_parent_instructions;
+ body.emit(f077C);
+
+ /* END IF */
+
+
+ body.instructions = f0770_parent_instructions;
+ body.emit(f0770);
+
+ /* END IF */
+
+ ir_variable *const r077F = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r077F);
+ ir_expression *const r0780 = lshift(r03D9, body.constant(int(31)));
+ ir_expression *const r0781 = lshift(r0739, body.constant(int(20)));
+ ir_expression *const r0782 = add(r0780, r0781);
+ body.emit(assign(r077F, add(r0782, r073A), 0x01));
+
+ body.emit(assign(r077F, r073B, 0x02));
+
+ body.emit(assign(r073E, r077F, 0x03));
+
+ body.emit(assign(r073D, body.constant(false), 0x01));
+
+
+ body.instructions = f076F_parent_instructions;
+ body.emit(f076F);
+
+ /* END IF */
+
+ body.emit(assign(r03DA, r073E, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f06F0->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0784 = less(swizzle_y(r03E0), swizzle_y(r03DF));
+ ir_if *f0783 = new(mem_ctx) ir_if(operand(r0784).val);
+ exec_list *const f0783_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0783->then_instructions;
+
+ ir_variable *const r0785 = body.make_temp(glsl_type::uint_type, "z0Ptr");
+ ir_variable *const r0786 = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r0786, sub(swizzle_y(r03DF), swizzle_y(r03E0)), 0x01));
+
+ ir_expression *const r0787 = sub(swizzle_x(r03DF), swizzle_x(r03E0));
+ ir_expression *const r0788 = less(swizzle_y(r03DF), swizzle_y(r03E0));
+ ir_expression *const r0789 = expr(ir_unop_b2i, r0788);
+ ir_expression *const r078A = expr(ir_unop_i2u, r0789);
+ body.emit(assign(r0785, sub(r0787, r078A), 0x01));
+
+ body.emit(assign(r03D9, bit_xor(r03D9, body.constant(1u)), 0x01));
+
+ body.emit(assign(r03DC, add(r03DD, body.constant(4294967295u)), 0x01));
+
+ ir_variable *const r078B = body.make_temp(glsl_type::uint_type, "zExp");
+ body.emit(assign(r078B, add(r03DC, body.constant(4294967286u)), 0x01));
+
+ ir_variable *const r078C = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r078C, r0785, 0x01));
+
+ ir_variable *const r078D = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r078D, r0786, 0x01));
+
+ ir_variable *const r078E = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac2", ir_var_auto);
+ body.emit(r078E);
+ ir_variable *const r078F = new(mem_ctx) ir_variable(glsl_type::int_type, "shiftCount", ir_var_auto);
+ body.emit(r078F);
+ /* IF CONDITION */
+ ir_expression *const r0791 = equal(r0785, body.constant(0u));
+ ir_if *f0790 = new(mem_ctx) ir_if(operand(r0791).val);
+ exec_list *const f0790_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0790->then_instructions;
+
+ body.emit(assign(r078C, r0786, 0x01));
+
+ body.emit(assign(r078D, body.constant(0u), 0x01));
+
+ body.emit(assign(r078B, add(r078B, body.constant(4294967264u)), 0x01));
+
+
+ body.instructions = f0790_parent_instructions;
+ body.emit(f0790);
+
+ /* END IF */
+
+ ir_variable *const r0792 = body.make_temp(glsl_type::uint_type, "a");
+ body.emit(assign(r0792, r078C, 0x01));
+
+ ir_variable *const r0793 = body.make_temp(glsl_type::uint_type, "return_value");
+ ir_variable *const r0794 = new(mem_ctx) ir_variable(glsl_type::uint_type, "shiftCount", ir_var_auto);
+ body.emit(r0794);
+ /* IF CONDITION */
+ ir_expression *const r0796 = equal(r078C, body.constant(0u));
+ ir_if *f0795 = new(mem_ctx) ir_if(operand(r0796).val);
+ exec_list *const f0795_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0795->then_instructions;
+
+ body.emit(assign(r0793, body.constant(32u), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0795->else_instructions;
+
+ body.emit(assign(r0794, body.constant(0u), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0798 = bit_and(r078C, body.constant(4294901760u));
+ ir_expression *const r0799 = equal(r0798, body.constant(0u));
+ ir_if *f0797 = new(mem_ctx) ir_if(operand(r0799).val);
+ exec_list *const f0797_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0797->then_instructions;
+
+ body.emit(assign(r0794, body.constant(16u), 0x01));
+
+ body.emit(assign(r0792, lshift(r078C, body.constant(int(16))), 0x01));
+
+
+ body.instructions = f0797_parent_instructions;
+ body.emit(f0797);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r079B = bit_and(r0792, body.constant(4278190080u));
+ ir_expression *const r079C = equal(r079B, body.constant(0u));
+ ir_if *f079A = new(mem_ctx) ir_if(operand(r079C).val);
+ exec_list *const f079A_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f079A->then_instructions;
+
+ body.emit(assign(r0794, add(r0794, body.constant(8u)), 0x01));
+
+ body.emit(assign(r0792, lshift(r0792, body.constant(int(8))), 0x01));
+
+
+ body.instructions = f079A_parent_instructions;
+ body.emit(f079A);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r079E = bit_and(r0792, body.constant(4026531840u));
+ ir_expression *const r079F = equal(r079E, body.constant(0u));
+ ir_if *f079D = new(mem_ctx) ir_if(operand(r079F).val);
+ exec_list *const f079D_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f079D->then_instructions;
+
+ body.emit(assign(r0794, add(r0794, body.constant(4u)), 0x01));
+
+ body.emit(assign(r0792, lshift(r0792, body.constant(int(4))), 0x01));
+
+
+ body.instructions = f079D_parent_instructions;
+ body.emit(f079D);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r07A1 = bit_and(r0792, body.constant(3221225472u));
+ ir_expression *const r07A2 = equal(r07A1, body.constant(0u));
+ ir_if *f07A0 = new(mem_ctx) ir_if(operand(r07A2).val);
+ exec_list *const f07A0_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f07A0->then_instructions;
+
+ body.emit(assign(r0794, add(r0794, body.constant(2u)), 0x01));
+
+ body.emit(assign(r0792, lshift(r0792, body.constant(int(2))), 0x01));
+
+
+ body.instructions = f07A0_parent_instructions;
+ body.emit(f07A0);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r07A4 = bit_and(r0792, body.constant(2147483648u));
+ ir_expression *const r07A5 = equal(r07A4, body.constant(0u));
+ ir_if *f07A3 = new(mem_ctx) ir_if(operand(r07A5).val);
+ exec_list *const f07A3_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f07A3->then_instructions;
+
+ body.emit(assign(r0794, add(r0794, body.constant(1u)), 0x01));
+
+
+ body.instructions = f07A3_parent_instructions;
+ body.emit(f07A3);
+
+ /* END IF */
+
+ body.emit(assign(r0793, r0794, 0x01));
+
+
+ body.instructions = f0795_parent_instructions;
+ body.emit(f0795);
+
+ /* END IF */
+
+ ir_expression *const r07A6 = expr(ir_unop_u2i, r0793);
+ body.emit(assign(r078F, add(r07A6, body.constant(int(-11))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r07A8 = lequal(body.constant(int(0)), r078F);
+ ir_if *f07A7 = new(mem_ctx) ir_if(operand(r07A8).val);
+ exec_list *const f07A7_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f07A7->then_instructions;
+
+ body.emit(assign(r078E, body.constant(0u), 0x01));
+
+ ir_variable *const r07A9 = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r07A9, lshift(r078D, r078F), 0x01));
+
+ ir_variable *const r07AA = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r07AC = equal(r078F, body.constant(int(0)));
+ ir_if *f07AB = new(mem_ctx) ir_if(operand(r07AC).val);
+ exec_list *const f07AB_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f07AB->then_instructions;
+
+ body.emit(assign(r07AA, r078C, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f07AB->else_instructions;
+
+ ir_expression *const r07AD = lshift(r078C, r078F);
+ ir_expression *const r07AE = neg(r078F);
+ ir_expression *const r07AF = bit_and(r07AE, body.constant(int(31)));
+ ir_expression *const r07B0 = rshift(r078D, r07AF);
+ body.emit(assign(r07AA, bit_or(r07AD, r07B0), 0x01));
+
+
+ body.instructions = f07AB_parent_instructions;
+ body.emit(f07AB);
+
+ /* END IF */
+
+ body.emit(assign(r078C, r07AA, 0x01));
+
+ body.emit(assign(r078D, r07A9, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f07A7->else_instructions;
+
+ ir_variable *const r07B1 = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r07B1, body.constant(0u), 0x01));
+
+ ir_variable *const r07B2 = body.make_temp(glsl_type::int_type, "count");
+ body.emit(assign(r07B2, neg(r078F), 0x01));
+
+ ir_variable *const r07B3 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r07B3);
+ ir_variable *const r07B4 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r07B4);
+ ir_variable *const r07B5 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r07B5);
+ ir_variable *const r07B6 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r07B7 = neg(r07B2);
+ body.emit(assign(r07B6, bit_and(r07B7, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r07B9 = equal(r07B2, body.constant(int(0)));
+ ir_if *f07B8 = new(mem_ctx) ir_if(operand(r07B9).val);
+ exec_list *const f07B8_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f07B8->then_instructions;
+
+ body.emit(assign(r07B3, r07B1, 0x01));
+
+ body.emit(assign(r07B4, r078D, 0x01));
+
+ body.emit(assign(r07B5, r078C, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f07B8->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r07BB = less(r07B2, body.constant(int(32)));
+ ir_if *f07BA = new(mem_ctx) ir_if(operand(r07BB).val);
+ exec_list *const f07BA_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f07BA->then_instructions;
+
+ body.emit(assign(r07B3, lshift(r078D, r07B6), 0x01));
+
+ ir_expression *const r07BC = lshift(r078C, r07B6);
+ ir_expression *const r07BD = rshift(r078D, r07B2);
+ body.emit(assign(r07B4, bit_or(r07BC, r07BD), 0x01));
+
+ body.emit(assign(r07B5, rshift(r078C, r07B2), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f07BA->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r07BF = equal(r07B2, body.constant(int(32)));
+ ir_if *f07BE = new(mem_ctx) ir_if(operand(r07BF).val);
+ exec_list *const f07BE_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f07BE->then_instructions;
+
+ body.emit(assign(r07B3, r078D, 0x01));
+
+ body.emit(assign(r07B4, r078C, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f07BE->else_instructions;
+
+ body.emit(assign(r07B1, bit_or(body.constant(0u), r078D), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r07C1 = less(r07B2, body.constant(int(64)));
+ ir_if *f07C0 = new(mem_ctx) ir_if(operand(r07C1).val);
+ exec_list *const f07C0_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f07C0->then_instructions;
+
+ body.emit(assign(r07B3, lshift(r078C, r07B6), 0x01));
+
+ ir_expression *const r07C2 = bit_and(r07B2, body.constant(int(31)));
+ body.emit(assign(r07B4, rshift(r078C, r07C2), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f07C0->else_instructions;
+
+ ir_variable *const r07C3 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r07C5 = equal(r07B2, body.constant(int(64)));
+ ir_if *f07C4 = new(mem_ctx) ir_if(operand(r07C5).val);
+ exec_list *const f07C4_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f07C4->then_instructions;
+
+ body.emit(assign(r07C3, r078C, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f07C4->else_instructions;
+
+ ir_expression *const r07C6 = nequal(r078C, body.constant(0u));
+ ir_expression *const r07C7 = expr(ir_unop_b2i, r07C6);
+ body.emit(assign(r07C3, expr(ir_unop_i2u, r07C7), 0x01));
+
+
+ body.instructions = f07C4_parent_instructions;
+ body.emit(f07C4);
+
+ /* END IF */
+
+ body.emit(assign(r07B3, r07C3, 0x01));
+
+ body.emit(assign(r07B4, body.constant(0u), 0x01));
+
+
+ body.instructions = f07C0_parent_instructions;
+ body.emit(f07C0);
+
+ /* END IF */
+
+
+ body.instructions = f07BE_parent_instructions;
+ body.emit(f07BE);
+
+ /* END IF */
+
+ body.emit(assign(r07B5, body.constant(0u), 0x01));
+
+
+ body.instructions = f07BA_parent_instructions;
+ body.emit(f07BA);
+
+ /* END IF */
+
+ ir_expression *const r07C8 = nequal(r07B1, body.constant(0u));
+ ir_expression *const r07C9 = expr(ir_unop_b2i, r07C8);
+ ir_expression *const r07CA = expr(ir_unop_i2u, r07C9);
+ body.emit(assign(r07B3, bit_or(r07B3, r07CA), 0x01));
+
+
+ body.instructions = f07B8_parent_instructions;
+ body.emit(f07B8);
+
+ /* END IF */
+
+ body.emit(assign(r078C, r07B5, 0x01));
+
+ body.emit(assign(r078D, r07B4, 0x01));
+
+ body.emit(assign(r078E, r07B3, 0x01));
+
+
+ body.instructions = f07A7_parent_instructions;
+ body.emit(f07A7);
+
+ /* END IF */
+
+ ir_expression *const r07CB = expr(ir_unop_i2u, r078F);
+ body.emit(assign(r078B, sub(r078B, r07CB), 0x01));
+
+ ir_variable *const r07CC = body.make_temp(glsl_type::uint_type, "zExp");
+ body.emit(assign(r07CC, r078B, 0x01));
+
+ ir_variable *const r07CD = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r07CD, r078C, 0x01));
+
+ ir_variable *const r07CE = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r07CE, r078D, 0x01));
+
+ ir_variable *const r07CF = body.make_temp(glsl_type::uint_type, "zFrac2");
+ body.emit(assign(r07CF, r078E, 0x01));
+
+ ir_variable *const r07D0 = body.make_temp(glsl_type::bool_type, "execute_flag");
+ body.emit(assign(r07D0, body.constant(true), 0x01));
+
+ ir_variable *const r07D1 = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r07D2 = new(mem_ctx) ir_variable(glsl_type::uint_type, "increment", ir_var_auto);
+ body.emit(r07D2);
+ ir_expression *const r07D3 = less(r078E, body.constant(0u));
+ ir_expression *const r07D4 = expr(ir_unop_b2i, r07D3);
+ body.emit(assign(r07D2, expr(ir_unop_i2u, r07D4), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r07D6 = lequal(body.constant(2045u), r078B);
+ ir_if *f07D5 = new(mem_ctx) ir_if(operand(r07D6).val);
+ exec_list *const f07D5_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f07D5->then_instructions;
+
+ ir_variable *const r07D7 = body.make_temp(glsl_type::bool_type, "or_tmp");
+ /* IF CONDITION */
+ ir_expression *const r07D9 = less(body.constant(2045u), r078B);
+ ir_if *f07D8 = new(mem_ctx) ir_if(operand(r07D9).val);
+ exec_list *const f07D8_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f07D8->then_instructions;
+
+ body.emit(assign(r07D7, body.constant(true), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f07D8->else_instructions;
+
+ ir_variable *const r07DA = body.make_temp(glsl_type::bool_type, "and_tmp");
+ /* IF CONDITION */
+ ir_expression *const r07DC = equal(r078B, body.constant(2045u));
+ ir_if *f07DB = new(mem_ctx) ir_if(operand(r07DC).val);
+ exec_list *const f07DB_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f07DB->then_instructions;
+
+ ir_expression *const r07DD = equal(body.constant(2097151u), r078C);
+ ir_expression *const r07DE = equal(body.constant(4294967295u), r078D);
+ body.emit(assign(r07DA, logic_and(r07DD, r07DE), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f07DB->else_instructions;
+
+ body.emit(assign(r07DA, body.constant(false), 0x01));
+
+
+ body.instructions = f07DB_parent_instructions;
+ body.emit(f07DB);
+
+ /* END IF */
+
+ ir_expression *const r07DF = nequal(r07D2, body.constant(0u));
+ body.emit(assign(r07D7, logic_and(r07DA, r07DF), 0x01));
+
+
+ body.instructions = f07D8_parent_instructions;
+ body.emit(f07D8);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f07E0 = new(mem_ctx) ir_if(operand(r07D7).val);
+ exec_list *const f07E0_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f07E0->then_instructions;
+
+ ir_variable *const r07E1 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r07E1);
+ ir_expression *const r07E2 = lshift(r03D9, body.constant(int(31)));
+ body.emit(assign(r07E1, add(r07E2, body.constant(2146435072u)), 0x01));
+
+ body.emit(assign(r07E1, body.constant(0u), 0x02));
+
+ body.emit(assign(r07D1, r07E1, 0x03));
+
+ body.emit(assign(r07D0, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f07E0->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r07E4 = less(r078B, body.constant(0u));
+ ir_if *f07E3 = new(mem_ctx) ir_if(operand(r07E4).val);
+ exec_list *const f07E3_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f07E3->then_instructions;
+
+ ir_variable *const r07E5 = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r07E5, r078E, 0x01));
+
+ ir_variable *const r07E6 = body.make_temp(glsl_type::int_type, "count");
+ ir_expression *const r07E7 = neg(r078B);
+ body.emit(assign(r07E6, expr(ir_unop_u2i, r07E7), 0x01));
+
+ ir_variable *const r07E8 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r07E8);
+ ir_variable *const r07E9 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r07E9);
+ ir_variable *const r07EA = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r07EA);
+ ir_variable *const r07EB = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r07EC = neg(r07E6);
+ body.emit(assign(r07EB, bit_and(r07EC, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r07EE = equal(r07E6, body.constant(int(0)));
+ ir_if *f07ED = new(mem_ctx) ir_if(operand(r07EE).val);
+ exec_list *const f07ED_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f07ED->then_instructions;
+
+ body.emit(assign(r07E8, r078E, 0x01));
+
+ body.emit(assign(r07E9, r078D, 0x01));
+
+ body.emit(assign(r07EA, r078C, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f07ED->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r07F0 = less(r07E6, body.constant(int(32)));
+ ir_if *f07EF = new(mem_ctx) ir_if(operand(r07F0).val);
+ exec_list *const f07EF_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f07EF->then_instructions;
+
+ body.emit(assign(r07E8, lshift(r078D, r07EB), 0x01));
+
+ ir_expression *const r07F1 = lshift(r078C, r07EB);
+ ir_expression *const r07F2 = rshift(r078D, r07E6);
+ body.emit(assign(r07E9, bit_or(r07F1, r07F2), 0x01));
+
+ body.emit(assign(r07EA, rshift(r078C, r07E6), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f07EF->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r07F4 = equal(r07E6, body.constant(int(32)));
+ ir_if *f07F3 = new(mem_ctx) ir_if(operand(r07F4).val);
+ exec_list *const f07F3_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f07F3->then_instructions;
+
+ body.emit(assign(r07E8, r078D, 0x01));
+
+ body.emit(assign(r07E9, r078C, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f07F3->else_instructions;
+
+ body.emit(assign(r07E5, bit_or(r078E, r078D), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r07F6 = less(r07E6, body.constant(int(64)));
+ ir_if *f07F5 = new(mem_ctx) ir_if(operand(r07F6).val);
+ exec_list *const f07F5_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f07F5->then_instructions;
+
+ body.emit(assign(r07E8, lshift(r078C, r07EB), 0x01));
+
+ ir_expression *const r07F7 = bit_and(r07E6, body.constant(int(31)));
+ body.emit(assign(r07E9, rshift(r078C, r07F7), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f07F5->else_instructions;
+
+ ir_variable *const r07F8 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r07FA = equal(r07E6, body.constant(int(64)));
+ ir_if *f07F9 = new(mem_ctx) ir_if(operand(r07FA).val);
+ exec_list *const f07F9_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f07F9->then_instructions;
+
+ body.emit(assign(r07F8, r078C, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f07F9->else_instructions;
+
+ ir_expression *const r07FB = nequal(r078C, body.constant(0u));
+ ir_expression *const r07FC = expr(ir_unop_b2i, r07FB);
+ body.emit(assign(r07F8, expr(ir_unop_i2u, r07FC), 0x01));
+
+
+ body.instructions = f07F9_parent_instructions;
+ body.emit(f07F9);
+
+ /* END IF */
+
+ body.emit(assign(r07E8, r07F8, 0x01));
+
+ body.emit(assign(r07E9, body.constant(0u), 0x01));
+
+
+ body.instructions = f07F5_parent_instructions;
+ body.emit(f07F5);
+
+ /* END IF */
+
+
+ body.instructions = f07F3_parent_instructions;
+ body.emit(f07F3);
+
+ /* END IF */
+
+ body.emit(assign(r07EA, body.constant(0u), 0x01));
+
+
+ body.instructions = f07EF_parent_instructions;
+ body.emit(f07EF);
+
+ /* END IF */
+
+ ir_expression *const r07FD = nequal(r07E5, body.constant(0u));
+ ir_expression *const r07FE = expr(ir_unop_b2i, r07FD);
+ ir_expression *const r07FF = expr(ir_unop_i2u, r07FE);
+ body.emit(assign(r07E8, bit_or(r07E8, r07FF), 0x01));
+
+
+ body.instructions = f07ED_parent_instructions;
+ body.emit(f07ED);
+
+ /* END IF */
+
+ body.emit(assign(r07CD, r07EA, 0x01));
+
+ body.emit(assign(r07CE, r07E9, 0x01));
+
+ body.emit(assign(r07CF, r07E8, 0x01));
+
+ body.emit(assign(r07CC, body.constant(0u), 0x01));
+
+ ir_expression *const r0800 = less(r07E8, body.constant(0u));
+ ir_expression *const r0801 = expr(ir_unop_b2i, r0800);
+ body.emit(assign(r07D2, expr(ir_unop_i2u, r0801), 0x01));
+
+
+ body.instructions = f07E3_parent_instructions;
+ body.emit(f07E3);
+
+ /* END IF */
+
+
+ body.instructions = f07E0_parent_instructions;
+ body.emit(f07E0);
+
+ /* END IF */
+
+
+ body.instructions = f07D5_parent_instructions;
+ body.emit(f07D5);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f0802 = new(mem_ctx) ir_if(operand(r07D0).val);
+ exec_list *const f0802_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0802->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0804 = nequal(r07D2, body.constant(0u));
+ ir_if *f0803 = new(mem_ctx) ir_if(operand(r0804).val);
+ exec_list *const f0803_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0803->then_instructions;
+
+ ir_variable *const r0805 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0805);
+ body.emit(assign(r0805, add(r07CE, body.constant(1u)), 0x01));
+
+ ir_expression *const r0806 = less(r0805, r07CE);
+ ir_expression *const r0807 = expr(ir_unop_b2i, r0806);
+ ir_expression *const r0808 = expr(ir_unop_i2u, r0807);
+ body.emit(assign(r07CD, add(r07CD, r0808), 0x01));
+
+ ir_expression *const r0809 = neg(r07CF);
+ ir_expression *const r080A = equal(r07CF, r0809);
+ ir_expression *const r080B = expr(ir_unop_b2i, r080A);
+ ir_expression *const r080C = expr(ir_unop_i2u, r080B);
+ ir_expression *const r080D = bit_and(r080C, body.constant(1u));
+ ir_expression *const r080E = expr(ir_unop_bit_not, r080D);
+ body.emit(assign(r07CE, bit_and(r0805, r080E), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0803->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0810 = bit_or(r07CD, r07CE);
+ ir_expression *const r0811 = equal(r0810, body.constant(0u));
+ ir_if *f080F = new(mem_ctx) ir_if(operand(r0811).val);
+ exec_list *const f080F_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f080F->then_instructions;
+
+ body.emit(assign(r07CC, body.constant(0u), 0x01));
+
+
+ body.instructions = f080F_parent_instructions;
+ body.emit(f080F);
+
+ /* END IF */
+
+
+ body.instructions = f0803_parent_instructions;
+ body.emit(f0803);
+
+ /* END IF */
+
+ ir_variable *const r0812 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r0812);
+ ir_expression *const r0813 = lshift(r03D9, body.constant(int(31)));
+ ir_expression *const r0814 = lshift(r07CC, body.constant(int(20)));
+ ir_expression *const r0815 = add(r0813, r0814);
+ body.emit(assign(r0812, add(r0815, r07CD), 0x01));
+
+ body.emit(assign(r0812, r07CE, 0x02));
+
+ body.emit(assign(r07D1, r0812, 0x03));
+
+ body.emit(assign(r07D0, body.constant(false), 0x01));
+
+
+ body.instructions = f0802_parent_instructions;
+ body.emit(f0802);
+
+ /* END IF */
+
+ body.emit(assign(r03DA, r07D1, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0783->else_instructions;
+
+ ir_variable *const r0816 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r0816);
+ body.emit(assign(r0816, body.constant(0u), 0x01));
+
+ body.emit(assign(r0816, body.constant(0u), 0x02));
+
+ body.emit(assign(r03DA, r0816, 0x03));
+
+
+ body.instructions = f0783_parent_instructions;
+ body.emit(f0783);
+
+ /* END IF */
+
+
+ body.instructions = f06F0_parent_instructions;
+ body.emit(f06F0);
+
+ /* END IF */
+
+
+ body.instructions = f065D_parent_instructions;
+ body.emit(f065D);
+
+ /* END IF */
+
+
+ body.instructions = f05CA_parent_instructions;
+ body.emit(f05CA);
+
+ /* END IF */
+
+
+ body.instructions = f05A3_parent_instructions;
+ body.emit(f05A3);
+
+ /* END IF */
+
+
+ body.instructions = f04C8_parent_instructions;
+ body.emit(f04C8);
+
+ /* END IF */
+
+
+ body.instructions = f03F1_parent_instructions;
+ body.emit(f03F1);
+
+ /* END IF */
+
+ body.emit(ret(r03DA));
+
+ sig->replace_parameters(&sig_parameters);
+ return sig;
+}
+ir_function_signature *
+fadd64(void *mem_ctx, builtin_available_predicate avail)
+{
+ ir_function_signature *const sig =
+ new(mem_ctx) ir_function_signature(glsl_type::uvec2_type, avail);
+ ir_factory body(&sig->body, mem_ctx);
+ sig->is_defined = true;
+
+ exec_list sig_parameters;
+
+ ir_variable *const r0817 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "a", ir_var_function_in);
+ sig_parameters.push_tail(r0817);
+ ir_variable *const r0818 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "b", ir_var_function_in);
+ sig_parameters.push_tail(r0818);
+ ir_variable *const r0819 = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r081A = body.make_temp(glsl_type::uint_type, "extractFloat64Sign_retval");
+ body.emit(assign(r081A, rshift(swizzle_x(r0817), body.constant(int(31))), 0x01));
+
+ ir_variable *const r081B = body.make_temp(glsl_type::uint_type, "extractFloat64Sign_retval");
+ body.emit(assign(r081B, rshift(swizzle_x(r0818), body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r081D = equal(r081A, r081B);
+ ir_if *f081C = new(mem_ctx) ir_if(operand(r081D).val);
+ exec_list *const f081C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f081C->then_instructions;
+
+ ir_variable *const r081E = body.make_temp(glsl_type::bool_type, "execute_flag");
+ body.emit(assign(r081E, body.constant(true), 0x01));
+
+ ir_variable *const r081F = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r0820 = new(mem_ctx) ir_variable(glsl_type::int_type, "expDiff", ir_var_auto);
+ body.emit(r0820);
+ ir_variable *const r0821 = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac2", ir_var_auto);
+ body.emit(r0821);
+ ir_variable *const r0822 = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac0", ir_var_auto);
+ body.emit(r0822);
+ ir_variable *const r0823 = new(mem_ctx) ir_variable(glsl_type::uint_type, "zExp", ir_var_auto);
+ body.emit(r0823);
+ ir_variable *const r0824 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "bFrac", ir_var_auto);
+ body.emit(r0824);
+ ir_variable *const r0825 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "aFrac", ir_var_auto);
+ body.emit(r0825);
+ body.emit(assign(r0822, body.constant(0u), 0x01));
+
+ body.emit(assign(r0821, body.constant(0u), 0x01));
+
+ ir_variable *const r0826 = body.make_temp(glsl_type::uvec2_type, "vec_ctor");
+ body.emit(assign(r0826, bit_and(swizzle_x(r0817), body.constant(1048575u)), 0x01));
+
+ body.emit(assign(r0826, swizzle_y(r0817), 0x02));
+
+ body.emit(assign(r0825, r0826, 0x03));
+
+ ir_variable *const r0827 = body.make_temp(glsl_type::uint_type, "extractFloat64Exp_retval");
+ ir_expression *const r0828 = rshift(swizzle_x(r0817), body.constant(int(20)));
+ body.emit(assign(r0827, bit_and(r0828, body.constant(2047u)), 0x01));
+
+ ir_variable *const r0829 = body.make_temp(glsl_type::uvec2_type, "vec_ctor");
+ body.emit(assign(r0829, bit_and(swizzle_x(r0818), body.constant(1048575u)), 0x01));
+
+ body.emit(assign(r0829, swizzle_y(r0818), 0x02));
+
+ body.emit(assign(r0824, r0829, 0x03));
+
+ ir_variable *const r082A = body.make_temp(glsl_type::uint_type, "extractFloat64Exp_retval");
+ ir_expression *const r082B = rshift(swizzle_x(r0818), body.constant(int(20)));
+ body.emit(assign(r082A, bit_and(r082B, body.constant(2047u)), 0x01));
+
+ ir_expression *const r082C = expr(ir_unop_u2i, r0827);
+ ir_expression *const r082D = expr(ir_unop_u2i, r082A);
+ body.emit(assign(r0820, sub(r082C, r082D), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r082F = less(body.constant(int(0)), r0820);
+ ir_if *f082E = new(mem_ctx) ir_if(operand(r082F).val);
+ exec_list *const f082E_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f082E->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0831 = equal(r0827, body.constant(2047u));
+ ir_if *f0830 = new(mem_ctx) ir_if(operand(r0831).val);
+ exec_list *const f0830_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0830->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0833 = bit_or(swizzle_x(r0826), swizzle_y(r0817));
+ ir_expression *const r0834 = nequal(r0833, body.constant(0u));
+ ir_if *f0832 = new(mem_ctx) ir_if(operand(r0834).val);
+ exec_list *const f0832_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0832->then_instructions;
+
+ ir_variable *const r0835 = body.make_temp(glsl_type::uvec2_type, "a");
+ body.emit(assign(r0835, swizzle_x(r0817), 0x01));
+
+ ir_variable *const r0836 = body.make_temp(glsl_type::uvec2_type, "b");
+ body.emit(assign(r0836, swizzle_x(r0818), 0x01));
+
+ ir_variable *const r0837 = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r0838 = body.make_temp(glsl_type::bool_type, "float64_is_signaling_nan_retval");
+ ir_expression *const r0839 = rshift(swizzle_y(r0817), body.constant(int(19)));
+ ir_expression *const r083A = bit_and(r0839, body.constant(4095u));
+ ir_expression *const r083B = equal(r083A, body.constant(4094u));
+ ir_expression *const r083C = nequal(swizzle_x(r0817), body.constant(0u));
+ ir_expression *const r083D = bit_and(swizzle_y(r0817), body.constant(524287u));
+ ir_expression *const r083E = nequal(r083D, body.constant(0u));
+ ir_expression *const r083F = logic_or(r083C, r083E);
+ body.emit(assign(r0838, logic_and(r083B, r083F), 0x01));
+
+ ir_variable *const r0840 = body.make_temp(glsl_type::bool_type, "float64_is_nan_retval");
+ ir_expression *const r0841 = lshift(swizzle_y(r0818), body.constant(int(1)));
+ ir_expression *const r0842 = lequal(body.constant(4292870144u), r0841);
+ ir_expression *const r0843 = nequal(swizzle_x(r0818), body.constant(0u));
+ ir_expression *const r0844 = bit_and(swizzle_y(r0818), body.constant(1048575u));
+ ir_expression *const r0845 = nequal(r0844, body.constant(0u));
+ ir_expression *const r0846 = logic_or(r0843, r0845);
+ body.emit(assign(r0840, logic_and(r0842, r0846), 0x01));
+
+ body.emit(assign(r0835, bit_or(swizzle_y(r0817), body.constant(524288u)), 0x02));
+
+ body.emit(assign(r0836, bit_or(swizzle_y(r0818), body.constant(524288u)), 0x02));
+
+ /* IF CONDITION */
+ ir_expression *const r0848 = lshift(swizzle_y(r0817), body.constant(int(1)));
+ ir_expression *const r0849 = lequal(body.constant(4292870144u), r0848);
+ ir_expression *const r084A = nequal(swizzle_x(r0817), body.constant(0u));
+ ir_expression *const r084B = bit_and(swizzle_y(r0817), body.constant(1048575u));
+ ir_expression *const r084C = nequal(r084B, body.constant(0u));
+ ir_expression *const r084D = logic_or(r084A, r084C);
+ ir_expression *const r084E = logic_and(r0849, r084D);
+ ir_if *f0847 = new(mem_ctx) ir_if(operand(r084E).val);
+ exec_list *const f0847_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0847->then_instructions;
+
+ ir_variable *const r084F = body.make_temp(glsl_type::uvec2_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0851 = logic_and(r0838, r0840);
+ ir_if *f0850 = new(mem_ctx) ir_if(operand(r0851).val);
+ exec_list *const f0850_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0850->then_instructions;
+
+ body.emit(assign(r084F, r0836, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0850->else_instructions;
+
+ body.emit(assign(r084F, r0835, 0x03));
+
+
+ body.instructions = f0850_parent_instructions;
+ body.emit(f0850);
+
+ /* END IF */
+
+ body.emit(assign(r0837, r084F, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0847->else_instructions;
+
+ body.emit(assign(r0837, r0836, 0x03));
+
+
+ body.instructions = f0847_parent_instructions;
+ body.emit(f0847);
+
+ /* END IF */
+
+ body.emit(assign(r081F, r0837, 0x03));
+
+ body.emit(assign(r081E, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0832->else_instructions;
+
+ body.emit(assign(r081F, r0817, 0x03));
+
+ body.emit(assign(r081E, body.constant(false), 0x01));
+
+
+ body.instructions = f0832_parent_instructions;
+ body.emit(f0832);
+
+ /* END IF */
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0830->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0853 = equal(r082A, body.constant(0u));
+ ir_if *f0852 = new(mem_ctx) ir_if(operand(r0853).val);
+ exec_list *const f0852_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0852->then_instructions;
+
+ body.emit(assign(r0820, add(r0820, body.constant(int(-1))), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0852->else_instructions;
+
+ body.emit(assign(r0824, bit_or(swizzle_x(r0829), body.constant(1048576u)), 0x01));
+
+
+ body.instructions = f0852_parent_instructions;
+ body.emit(f0852);
+
+ /* END IF */
+
+ ir_variable *const r0854 = body.make_temp(glsl_type::uint_type, "a0");
+ body.emit(assign(r0854, swizzle_x(r0824), 0x01));
+
+ ir_variable *const r0855 = body.make_temp(glsl_type::uint_type, "a1");
+ body.emit(assign(r0855, swizzle_y(r0824), 0x01));
+
+ ir_variable *const r0856 = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r0856, body.constant(0u), 0x01));
+
+ ir_variable *const r0857 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r0857);
+ ir_variable *const r0858 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0858);
+ ir_variable *const r0859 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r0859);
+ ir_variable *const r085A = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r085B = neg(r0820);
+ body.emit(assign(r085A, bit_and(r085B, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r085D = equal(r0820, body.constant(int(0)));
+ ir_if *f085C = new(mem_ctx) ir_if(operand(r085D).val);
+ exec_list *const f085C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f085C->then_instructions;
+
+ body.emit(assign(r0857, r0856, 0x01));
+
+ body.emit(assign(r0858, r0855, 0x01));
+
+ body.emit(assign(r0859, r0854, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f085C->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r085F = less(r0820, body.constant(int(32)));
+ ir_if *f085E = new(mem_ctx) ir_if(operand(r085F).val);
+ exec_list *const f085E_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f085E->then_instructions;
+
+ body.emit(assign(r0857, lshift(swizzle_y(r0829), r085A), 0x01));
+
+ ir_expression *const r0860 = lshift(swizzle_x(r0824), r085A);
+ ir_expression *const r0861 = rshift(swizzle_y(r0829), r0820);
+ body.emit(assign(r0858, bit_or(r0860, r0861), 0x01));
+
+ body.emit(assign(r0859, rshift(swizzle_x(r0824), r0820), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f085E->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0863 = equal(r0820, body.constant(int(32)));
+ ir_if *f0862 = new(mem_ctx) ir_if(operand(r0863).val);
+ exec_list *const f0862_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0862->then_instructions;
+
+ body.emit(assign(r0857, r0855, 0x01));
+
+ body.emit(assign(r0858, r0854, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0862->else_instructions;
+
+ body.emit(assign(r0856, bit_or(body.constant(0u), swizzle_y(r0829)), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0865 = less(r0820, body.constant(int(64)));
+ ir_if *f0864 = new(mem_ctx) ir_if(operand(r0865).val);
+ exec_list *const f0864_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0864->then_instructions;
+
+ body.emit(assign(r0857, lshift(swizzle_x(r0824), r085A), 0x01));
+
+ ir_expression *const r0866 = bit_and(r0820, body.constant(int(31)));
+ body.emit(assign(r0858, rshift(swizzle_x(r0824), r0866), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0864->else_instructions;
+
+ ir_variable *const r0867 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0869 = equal(r0820, body.constant(int(64)));
+ ir_if *f0868 = new(mem_ctx) ir_if(operand(r0869).val);
+ exec_list *const f0868_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0868->then_instructions;
+
+ body.emit(assign(r0867, r0854, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0868->else_instructions;
+
+ ir_expression *const r086A = nequal(swizzle_x(r0824), body.constant(0u));
+ ir_expression *const r086B = expr(ir_unop_b2i, r086A);
+ body.emit(assign(r0867, expr(ir_unop_i2u, r086B), 0x01));
+
+
+ body.instructions = f0868_parent_instructions;
+ body.emit(f0868);
+
+ /* END IF */
+
+ body.emit(assign(r0857, r0867, 0x01));
+
+ body.emit(assign(r0858, body.constant(0u), 0x01));
+
+
+ body.instructions = f0864_parent_instructions;
+ body.emit(f0864);
+
+ /* END IF */
+
+
+ body.instructions = f0862_parent_instructions;
+ body.emit(f0862);
+
+ /* END IF */
+
+ body.emit(assign(r0859, body.constant(0u), 0x01));
+
+
+ body.instructions = f085E_parent_instructions;
+ body.emit(f085E);
+
+ /* END IF */
+
+ ir_expression *const r086C = nequal(r0856, body.constant(0u));
+ ir_expression *const r086D = expr(ir_unop_b2i, r086C);
+ ir_expression *const r086E = expr(ir_unop_i2u, r086D);
+ body.emit(assign(r0857, bit_or(r0857, r086E), 0x01));
+
+
+ body.instructions = f085C_parent_instructions;
+ body.emit(f085C);
+
+ /* END IF */
+
+ body.emit(assign(r0824, r0859, 0x01));
+
+ body.emit(assign(r0824, r0858, 0x02));
+
+ body.emit(assign(r0821, r0857, 0x01));
+
+ body.emit(assign(r0823, r0827, 0x01));
+
+
+ body.instructions = f0830_parent_instructions;
+ body.emit(f0830);
+
+ /* END IF */
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f082E->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0870 = less(r0820, body.constant(int(0)));
+ ir_if *f086F = new(mem_ctx) ir_if(operand(r0870).val);
+ exec_list *const f086F_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f086F->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0872 = equal(r082A, body.constant(2047u));
+ ir_if *f0871 = new(mem_ctx) ir_if(operand(r0872).val);
+ exec_list *const f0871_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0871->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0874 = bit_or(swizzle_x(r0824), swizzle_y(r0824));
+ ir_expression *const r0875 = nequal(r0874, body.constant(0u));
+ ir_if *f0873 = new(mem_ctx) ir_if(operand(r0875).val);
+ exec_list *const f0873_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0873->then_instructions;
+
+ ir_variable *const r0876 = body.make_temp(glsl_type::uvec2_type, "a");
+ body.emit(assign(r0876, swizzle_x(r0817), 0x01));
+
+ ir_variable *const r0877 = body.make_temp(glsl_type::uvec2_type, "b");
+ body.emit(assign(r0877, swizzle_x(r0818), 0x01));
+
+ ir_variable *const r0878 = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r0879 = body.make_temp(glsl_type::bool_type, "float64_is_signaling_nan_retval");
+ ir_expression *const r087A = rshift(swizzle_y(r0817), body.constant(int(19)));
+ ir_expression *const r087B = bit_and(r087A, body.constant(4095u));
+ ir_expression *const r087C = equal(r087B, body.constant(4094u));
+ ir_expression *const r087D = nequal(swizzle_x(r0817), body.constant(0u));
+ ir_expression *const r087E = bit_and(swizzle_y(r0817), body.constant(524287u));
+ ir_expression *const r087F = nequal(r087E, body.constant(0u));
+ ir_expression *const r0880 = logic_or(r087D, r087F);
+ body.emit(assign(r0879, logic_and(r087C, r0880), 0x01));
+
+ ir_variable *const r0881 = body.make_temp(glsl_type::bool_type, "float64_is_nan_retval");
+ ir_expression *const r0882 = lshift(swizzle_y(r0818), body.constant(int(1)));
+ ir_expression *const r0883 = lequal(body.constant(4292870144u), r0882);
+ ir_expression *const r0884 = nequal(swizzle_x(r0818), body.constant(0u));
+ ir_expression *const r0885 = bit_and(swizzle_y(r0818), body.constant(1048575u));
+ ir_expression *const r0886 = nequal(r0885, body.constant(0u));
+ ir_expression *const r0887 = logic_or(r0884, r0886);
+ body.emit(assign(r0881, logic_and(r0883, r0887), 0x01));
+
+ body.emit(assign(r0876, bit_or(swizzle_y(r0817), body.constant(524288u)), 0x02));
+
+ body.emit(assign(r0877, bit_or(swizzle_y(r0818), body.constant(524288u)), 0x02));
+
+ /* IF CONDITION */
+ ir_expression *const r0889 = lshift(swizzle_y(r0817), body.constant(int(1)));
+ ir_expression *const r088A = lequal(body.constant(4292870144u), r0889);
+ ir_expression *const r088B = nequal(swizzle_x(r0817), body.constant(0u));
+ ir_expression *const r088C = bit_and(swizzle_y(r0817), body.constant(1048575u));
+ ir_expression *const r088D = nequal(r088C, body.constant(0u));
+ ir_expression *const r088E = logic_or(r088B, r088D);
+ ir_expression *const r088F = logic_and(r088A, r088E);
+ ir_if *f0888 = new(mem_ctx) ir_if(operand(r088F).val);
+ exec_list *const f0888_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0888->then_instructions;
+
+ ir_variable *const r0890 = body.make_temp(glsl_type::uvec2_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0892 = logic_and(r0879, r0881);
+ ir_if *f0891 = new(mem_ctx) ir_if(operand(r0892).val);
+ exec_list *const f0891_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0891->then_instructions;
+
+ body.emit(assign(r0890, r0877, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0891->else_instructions;
+
+ body.emit(assign(r0890, r0876, 0x03));
+
+
+ body.instructions = f0891_parent_instructions;
+ body.emit(f0891);
+
+ /* END IF */
+
+ body.emit(assign(r0878, r0890, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0888->else_instructions;
+
+ body.emit(assign(r0878, r0877, 0x03));
+
+
+ body.instructions = f0888_parent_instructions;
+ body.emit(f0888);
+
+ /* END IF */
+
+ body.emit(assign(r081F, r0878, 0x03));
+
+ body.emit(assign(r081E, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0873->else_instructions;
+
+ ir_variable *const r0893 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r0893);
+ ir_expression *const r0894 = lshift(r081A, body.constant(int(31)));
+ body.emit(assign(r0893, add(r0894, body.constant(2146435072u)), 0x01));
+
+ body.emit(assign(r0893, body.constant(0u), 0x02));
+
+ body.emit(assign(r081F, r0893, 0x03));
+
+ body.emit(assign(r081E, body.constant(false), 0x01));
+
+
+ body.instructions = f0873_parent_instructions;
+ body.emit(f0873);
+
+ /* END IF */
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0871->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0896 = equal(r0827, body.constant(0u));
+ ir_if *f0895 = new(mem_ctx) ir_if(operand(r0896).val);
+ exec_list *const f0895_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0895->then_instructions;
+
+ body.emit(assign(r0820, add(r0820, body.constant(int(1))), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0895->else_instructions;
+
+ body.emit(assign(r0825, bit_or(swizzle_x(r0826), body.constant(1048576u)), 0x01));
+
+
+ body.instructions = f0895_parent_instructions;
+ body.emit(f0895);
+
+ /* END IF */
+
+ ir_variable *const r0897 = body.make_temp(glsl_type::uint_type, "a0");
+ body.emit(assign(r0897, swizzle_x(r0825), 0x01));
+
+ ir_variable *const r0898 = body.make_temp(glsl_type::uint_type, "a1");
+ body.emit(assign(r0898, swizzle_y(r0825), 0x01));
+
+ ir_variable *const r0899 = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r0899, body.constant(0u), 0x01));
+
+ ir_variable *const r089A = body.make_temp(glsl_type::int_type, "count");
+ body.emit(assign(r089A, neg(r0820), 0x01));
+
+ ir_variable *const r089B = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r089B);
+ ir_variable *const r089C = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r089C);
+ ir_variable *const r089D = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r089D);
+ ir_variable *const r089E = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r089F = neg(r089A);
+ body.emit(assign(r089E, bit_and(r089F, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r08A1 = equal(r089A, body.constant(int(0)));
+ ir_if *f08A0 = new(mem_ctx) ir_if(operand(r08A1).val);
+ exec_list *const f08A0_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f08A0->then_instructions;
+
+ body.emit(assign(r089B, r0899, 0x01));
+
+ body.emit(assign(r089C, r0898, 0x01));
+
+ body.emit(assign(r089D, r0897, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f08A0->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r08A3 = less(r089A, body.constant(int(32)));
+ ir_if *f08A2 = new(mem_ctx) ir_if(operand(r08A3).val);
+ exec_list *const f08A2_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f08A2->then_instructions;
+
+ body.emit(assign(r089B, lshift(swizzle_y(r0826), r089E), 0x01));
+
+ ir_expression *const r08A4 = lshift(swizzle_x(r0825), r089E);
+ ir_expression *const r08A5 = rshift(swizzle_y(r0826), r089A);
+ body.emit(assign(r089C, bit_or(r08A4, r08A5), 0x01));
+
+ body.emit(assign(r089D, rshift(swizzle_x(r0825), r089A), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f08A2->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r08A7 = equal(r089A, body.constant(int(32)));
+ ir_if *f08A6 = new(mem_ctx) ir_if(operand(r08A7).val);
+ exec_list *const f08A6_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f08A6->then_instructions;
+
+ body.emit(assign(r089B, r0898, 0x01));
+
+ body.emit(assign(r089C, r0897, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f08A6->else_instructions;
+
+ body.emit(assign(r0899, bit_or(body.constant(0u), swizzle_y(r0826)), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r08A9 = less(r089A, body.constant(int(64)));
+ ir_if *f08A8 = new(mem_ctx) ir_if(operand(r08A9).val);
+ exec_list *const f08A8_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f08A8->then_instructions;
+
+ body.emit(assign(r089B, lshift(swizzle_x(r0825), r089E), 0x01));
+
+ ir_expression *const r08AA = bit_and(r089A, body.constant(int(31)));
+ body.emit(assign(r089C, rshift(swizzle_x(r0825), r08AA), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f08A8->else_instructions;
+
+ ir_variable *const r08AB = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r08AD = equal(r089A, body.constant(int(64)));
+ ir_if *f08AC = new(mem_ctx) ir_if(operand(r08AD).val);
+ exec_list *const f08AC_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f08AC->then_instructions;
+
+ body.emit(assign(r08AB, r0897, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f08AC->else_instructions;
+
+ ir_expression *const r08AE = nequal(swizzle_x(r0825), body.constant(0u));
+ ir_expression *const r08AF = expr(ir_unop_b2i, r08AE);
+ body.emit(assign(r08AB, expr(ir_unop_i2u, r08AF), 0x01));
+
+
+ body.instructions = f08AC_parent_instructions;
+ body.emit(f08AC);
+
+ /* END IF */
+
+ body.emit(assign(r089B, r08AB, 0x01));
+
+ body.emit(assign(r089C, body.constant(0u), 0x01));
+
+
+ body.instructions = f08A8_parent_instructions;
+ body.emit(f08A8);
+
+ /* END IF */
+
+
+ body.instructions = f08A6_parent_instructions;
+ body.emit(f08A6);
+
+ /* END IF */
+
+ body.emit(assign(r089D, body.constant(0u), 0x01));
+
+
+ body.instructions = f08A2_parent_instructions;
+ body.emit(f08A2);
+
+ /* END IF */
+
+ ir_expression *const r08B0 = nequal(r0899, body.constant(0u));
+ ir_expression *const r08B1 = expr(ir_unop_b2i, r08B0);
+ ir_expression *const r08B2 = expr(ir_unop_i2u, r08B1);
+ body.emit(assign(r089B, bit_or(r089B, r08B2), 0x01));
+
+
+ body.instructions = f08A0_parent_instructions;
+ body.emit(f08A0);
+
+ /* END IF */
+
+ body.emit(assign(r0825, r089D, 0x01));
+
+ body.emit(assign(r0825, r089C, 0x02));
+
+ body.emit(assign(r0821, r089B, 0x01));
+
+ body.emit(assign(r0823, r082A, 0x01));
+
+
+ body.instructions = f0871_parent_instructions;
+ body.emit(f0871);
+
+ /* END IF */
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f086F->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r08B4 = equal(r0827, body.constant(2047u));
+ ir_if *f08B3 = new(mem_ctx) ir_if(operand(r08B4).val);
+ exec_list *const f08B3_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f08B3->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r08B6 = bit_or(swizzle_x(r0825), swizzle_y(r0825));
+ ir_expression *const r08B7 = bit_or(swizzle_x(r0824), swizzle_y(r0824));
+ ir_expression *const r08B8 = bit_or(r08B6, r08B7);
+ ir_expression *const r08B9 = nequal(r08B8, body.constant(0u));
+ ir_if *f08B5 = new(mem_ctx) ir_if(operand(r08B9).val);
+ exec_list *const f08B5_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f08B5->then_instructions;
+
+ ir_variable *const r08BA = body.make_temp(glsl_type::uvec2_type, "a");
+ body.emit(assign(r08BA, swizzle_x(r0817), 0x01));
+
+ ir_variable *const r08BB = body.make_temp(glsl_type::uvec2_type, "b");
+ body.emit(assign(r08BB, swizzle_x(r0818), 0x01));
+
+ ir_variable *const r08BC = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r08BD = body.make_temp(glsl_type::bool_type, "float64_is_signaling_nan_retval");
+ ir_expression *const r08BE = rshift(swizzle_y(r0817), body.constant(int(19)));
+ ir_expression *const r08BF = bit_and(r08BE, body.constant(4095u));
+ ir_expression *const r08C0 = equal(r08BF, body.constant(4094u));
+ ir_expression *const r08C1 = nequal(swizzle_x(r0817), body.constant(0u));
+ ir_expression *const r08C2 = bit_and(swizzle_y(r0817), body.constant(524287u));
+ ir_expression *const r08C3 = nequal(r08C2, body.constant(0u));
+ ir_expression *const r08C4 = logic_or(r08C1, r08C3);
+ body.emit(assign(r08BD, logic_and(r08C0, r08C4), 0x01));
+
+ ir_variable *const r08C5 = body.make_temp(glsl_type::bool_type, "float64_is_nan_retval");
+ ir_expression *const r08C6 = lshift(swizzle_y(r0818), body.constant(int(1)));
+ ir_expression *const r08C7 = lequal(body.constant(4292870144u), r08C6);
+ ir_expression *const r08C8 = nequal(swizzle_x(r0818), body.constant(0u));
+ ir_expression *const r08C9 = bit_and(swizzle_y(r0818), body.constant(1048575u));
+ ir_expression *const r08CA = nequal(r08C9, body.constant(0u));
+ ir_expression *const r08CB = logic_or(r08C8, r08CA);
+ body.emit(assign(r08C5, logic_and(r08C7, r08CB), 0x01));
+
+ body.emit(assign(r08BA, bit_or(swizzle_y(r0817), body.constant(524288u)), 0x02));
+
+ body.emit(assign(r08BB, bit_or(swizzle_y(r0818), body.constant(524288u)), 0x02));
+
+ /* IF CONDITION */
+ ir_expression *const r08CD = lshift(swizzle_y(r0817), body.constant(int(1)));
+ ir_expression *const r08CE = lequal(body.constant(4292870144u), r08CD);
+ ir_expression *const r08CF = nequal(swizzle_x(r0817), body.constant(0u));
+ ir_expression *const r08D0 = bit_and(swizzle_y(r0817), body.constant(1048575u));
+ ir_expression *const r08D1 = nequal(r08D0, body.constant(0u));
+ ir_expression *const r08D2 = logic_or(r08CF, r08D1);
+ ir_expression *const r08D3 = logic_and(r08CE, r08D2);
+ ir_if *f08CC = new(mem_ctx) ir_if(operand(r08D3).val);
+ exec_list *const f08CC_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f08CC->then_instructions;
+
+ ir_variable *const r08D4 = body.make_temp(glsl_type::uvec2_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r08D6 = logic_and(r08BD, r08C5);
+ ir_if *f08D5 = new(mem_ctx) ir_if(operand(r08D6).val);
+ exec_list *const f08D5_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f08D5->then_instructions;
+
+ body.emit(assign(r08D4, r08BB, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f08D5->else_instructions;
+
+ body.emit(assign(r08D4, r08BA, 0x03));
+
+
+ body.instructions = f08D5_parent_instructions;
+ body.emit(f08D5);
+
+ /* END IF */
+
+ body.emit(assign(r08BC, r08D4, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f08CC->else_instructions;
+
+ body.emit(assign(r08BC, r08BB, 0x03));
+
+
+ body.instructions = f08CC_parent_instructions;
+ body.emit(f08CC);
+
+ /* END IF */
+
+ body.emit(assign(r081F, r08BC, 0x03));
+
+ body.emit(assign(r081E, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f08B5->else_instructions;
+
+ body.emit(assign(r081F, r0817, 0x03));
+
+ body.emit(assign(r081E, body.constant(false), 0x01));
+
+
+ body.instructions = f08B5_parent_instructions;
+ body.emit(f08B5);
+
+ /* END IF */
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f08B3->else_instructions;
+
+ ir_variable *const r08D7 = body.make_temp(glsl_type::uint_type, "z0Ptr");
+ ir_variable *const r08D8 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r08D8);
+ body.emit(assign(r08D8, add(swizzle_y(r0825), swizzle_y(r0824)), 0x01));
+
+ ir_expression *const r08D9 = add(swizzle_x(r0825), swizzle_x(r0824));
+ ir_expression *const r08DA = less(r08D8, swizzle_y(r0825));
+ ir_expression *const r08DB = expr(ir_unop_b2i, r08DA);
+ ir_expression *const r08DC = expr(ir_unop_i2u, r08DB);
+ body.emit(assign(r08D7, add(r08D9, r08DC), 0x01));
+
+ body.emit(assign(r0822, r08D7, 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r08DE = equal(r0827, body.constant(0u));
+ ir_if *f08DD = new(mem_ctx) ir_if(operand(r08DE).val);
+ exec_list *const f08DD_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f08DD->then_instructions;
+
+ ir_variable *const r08DF = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r08DF);
+ ir_expression *const r08E0 = lshift(r081A, body.constant(int(31)));
+ body.emit(assign(r08DF, add(r08E0, r08D7), 0x01));
+
+ body.emit(assign(r08DF, r08D8, 0x02));
+
+ body.emit(assign(r081F, r08DF, 0x03));
+
+ body.emit(assign(r081E, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f08DD->else_instructions;
+
+ body.emit(assign(r0822, bit_or(r08D7, body.constant(2097152u)), 0x01));
+
+ body.emit(assign(r0823, r0827, 0x01));
+
+ ir_variable *const r08E1 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r08E1);
+ ir_variable *const r08E2 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r08E2);
+ ir_variable *const r08E3 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r08E3);
+ body.emit(assign(r08E1, lshift(r08D8, body.constant(int(31))), 0x01));
+
+ ir_expression *const r08E4 = lshift(r0822, body.constant(int(31)));
+ ir_expression *const r08E5 = rshift(r08D8, body.constant(int(1)));
+ body.emit(assign(r08E2, bit_or(r08E4, r08E5), 0x01));
+
+ body.emit(assign(r08E3, rshift(r0822, body.constant(int(1))), 0x01));
+
+ body.emit(assign(r08E1, bit_or(r08E1, body.constant(0u)), 0x01));
+
+ body.emit(assign(r0822, r08E3, 0x01));
+
+ body.emit(assign(r0821, r08E1, 0x01));
+
+ ir_variable *const r08E6 = body.make_temp(glsl_type::uint_type, "zExp");
+ body.emit(assign(r08E6, r0827, 0x01));
+
+ ir_variable *const r08E7 = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r08E7, r08E3, 0x01));
+
+ ir_variable *const r08E8 = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r08E8, r08E2, 0x01));
+
+ ir_variable *const r08E9 = body.make_temp(glsl_type::uint_type, "zFrac2");
+ body.emit(assign(r08E9, r08E1, 0x01));
+
+ ir_variable *const r08EA = body.make_temp(glsl_type::bool_type, "execute_flag");
+ body.emit(assign(r08EA, body.constant(true), 0x01));
+
+ ir_variable *const r08EB = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r08EC = new(mem_ctx) ir_variable(glsl_type::uint_type, "increment", ir_var_auto);
+ body.emit(r08EC);
+ ir_expression *const r08ED = less(r08E1, body.constant(0u));
+ ir_expression *const r08EE = expr(ir_unop_b2i, r08ED);
+ body.emit(assign(r08EC, expr(ir_unop_i2u, r08EE), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r08F0 = lequal(body.constant(2045u), r0827);
+ ir_if *f08EF = new(mem_ctx) ir_if(operand(r08F0).val);
+ exec_list *const f08EF_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f08EF->then_instructions;
+
+ ir_variable *const r08F1 = body.make_temp(glsl_type::bool_type, "or_tmp");
+ /* IF CONDITION */
+ ir_expression *const r08F3 = less(body.constant(2045u), r0827);
+ ir_if *f08F2 = new(mem_ctx) ir_if(operand(r08F3).val);
+ exec_list *const f08F2_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f08F2->then_instructions;
+
+ body.emit(assign(r08F1, body.constant(true), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f08F2->else_instructions;
+
+ ir_variable *const r08F4 = body.make_temp(glsl_type::bool_type, "and_tmp");
+ /* IF CONDITION */
+ ir_expression *const r08F6 = equal(r0827, body.constant(2045u));
+ ir_if *f08F5 = new(mem_ctx) ir_if(operand(r08F6).val);
+ exec_list *const f08F5_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f08F5->then_instructions;
+
+ ir_expression *const r08F7 = equal(body.constant(2097151u), r08E3);
+ ir_expression *const r08F8 = equal(body.constant(4294967295u), r08E2);
+ body.emit(assign(r08F4, logic_and(r08F7, r08F8), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f08F5->else_instructions;
+
+ body.emit(assign(r08F4, body.constant(false), 0x01));
+
+
+ body.instructions = f08F5_parent_instructions;
+ body.emit(f08F5);
+
+ /* END IF */
+
+ ir_expression *const r08F9 = nequal(r08EC, body.constant(0u));
+ body.emit(assign(r08F1, logic_and(r08F4, r08F9), 0x01));
+
+
+ body.instructions = f08F2_parent_instructions;
+ body.emit(f08F2);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f08FA = new(mem_ctx) ir_if(operand(r08F1).val);
+ exec_list *const f08FA_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f08FA->then_instructions;
+
+ ir_variable *const r08FB = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r08FB);
+ ir_expression *const r08FC = lshift(r081A, body.constant(int(31)));
+ body.emit(assign(r08FB, add(r08FC, body.constant(2146435072u)), 0x01));
+
+ body.emit(assign(r08FB, body.constant(0u), 0x02));
+
+ body.emit(assign(r08EB, r08FB, 0x03));
+
+ body.emit(assign(r08EA, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f08FA->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r08FE = less(r0827, body.constant(0u));
+ ir_if *f08FD = new(mem_ctx) ir_if(operand(r08FE).val);
+ exec_list *const f08FD_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f08FD->then_instructions;
+
+ ir_variable *const r08FF = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r08FF, r08E1, 0x01));
+
+ ir_variable *const r0900 = body.make_temp(glsl_type::int_type, "count");
+ ir_expression *const r0901 = neg(r0827);
+ body.emit(assign(r0900, expr(ir_unop_u2i, r0901), 0x01));
+
+ ir_variable *const r0902 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r0902);
+ ir_variable *const r0903 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0903);
+ ir_variable *const r0904 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r0904);
+ ir_variable *const r0905 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r0906 = neg(r0900);
+ body.emit(assign(r0905, bit_and(r0906, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0908 = equal(r0900, body.constant(int(0)));
+ ir_if *f0907 = new(mem_ctx) ir_if(operand(r0908).val);
+ exec_list *const f0907_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0907->then_instructions;
+
+ body.emit(assign(r0902, r08E1, 0x01));
+
+ body.emit(assign(r0903, r08E2, 0x01));
+
+ body.emit(assign(r0904, r08E3, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0907->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r090A = less(r0900, body.constant(int(32)));
+ ir_if *f0909 = new(mem_ctx) ir_if(operand(r090A).val);
+ exec_list *const f0909_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0909->then_instructions;
+
+ body.emit(assign(r0902, lshift(r08E2, r0905), 0x01));
+
+ ir_expression *const r090B = lshift(r08E3, r0905);
+ ir_expression *const r090C = rshift(r08E2, r0900);
+ body.emit(assign(r0903, bit_or(r090B, r090C), 0x01));
+
+ body.emit(assign(r0904, rshift(r08E3, r0900), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0909->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r090E = equal(r0900, body.constant(int(32)));
+ ir_if *f090D = new(mem_ctx) ir_if(operand(r090E).val);
+ exec_list *const f090D_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f090D->then_instructions;
+
+ body.emit(assign(r0902, r08E2, 0x01));
+
+ body.emit(assign(r0903, r08E3, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f090D->else_instructions;
+
+ body.emit(assign(r08FF, bit_or(r08E1, r08E2), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0910 = less(r0900, body.constant(int(64)));
+ ir_if *f090F = new(mem_ctx) ir_if(operand(r0910).val);
+ exec_list *const f090F_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f090F->then_instructions;
+
+ body.emit(assign(r0902, lshift(r08E3, r0905), 0x01));
+
+ ir_expression *const r0911 = bit_and(r0900, body.constant(int(31)));
+ body.emit(assign(r0903, rshift(r08E3, r0911), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f090F->else_instructions;
+
+ ir_variable *const r0912 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0914 = equal(r0900, body.constant(int(64)));
+ ir_if *f0913 = new(mem_ctx) ir_if(operand(r0914).val);
+ exec_list *const f0913_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0913->then_instructions;
+
+ body.emit(assign(r0912, r08E3, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0913->else_instructions;
+
+ ir_expression *const r0915 = nequal(r08E3, body.constant(0u));
+ ir_expression *const r0916 = expr(ir_unop_b2i, r0915);
+ body.emit(assign(r0912, expr(ir_unop_i2u, r0916), 0x01));
+
+
+ body.instructions = f0913_parent_instructions;
+ body.emit(f0913);
+
+ /* END IF */
+
+ body.emit(assign(r0902, r0912, 0x01));
+
+ body.emit(assign(r0903, body.constant(0u), 0x01));
+
+
+ body.instructions = f090F_parent_instructions;
+ body.emit(f090F);
+
+ /* END IF */
+
+
+ body.instructions = f090D_parent_instructions;
+ body.emit(f090D);
+
+ /* END IF */
+
+ body.emit(assign(r0904, body.constant(0u), 0x01));
+
+
+ body.instructions = f0909_parent_instructions;
+ body.emit(f0909);
+
+ /* END IF */
+
+ ir_expression *const r0917 = nequal(r08FF, body.constant(0u));
+ ir_expression *const r0918 = expr(ir_unop_b2i, r0917);
+ ir_expression *const r0919 = expr(ir_unop_i2u, r0918);
+ body.emit(assign(r0902, bit_or(r0902, r0919), 0x01));
+
+
+ body.instructions = f0907_parent_instructions;
+ body.emit(f0907);
+
+ /* END IF */
+
+ body.emit(assign(r08E7, r0904, 0x01));
+
+ body.emit(assign(r08E8, r0903, 0x01));
+
+ body.emit(assign(r08E9, r0902, 0x01));
+
+ body.emit(assign(r08E6, body.constant(0u), 0x01));
+
+ ir_expression *const r091A = less(r0902, body.constant(0u));
+ ir_expression *const r091B = expr(ir_unop_b2i, r091A);
+ body.emit(assign(r08EC, expr(ir_unop_i2u, r091B), 0x01));
+
+
+ body.instructions = f08FD_parent_instructions;
+ body.emit(f08FD);
+
+ /* END IF */
+
+
+ body.instructions = f08FA_parent_instructions;
+ body.emit(f08FA);
+
+ /* END IF */
+
+
+ body.instructions = f08EF_parent_instructions;
+ body.emit(f08EF);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f091C = new(mem_ctx) ir_if(operand(r08EA).val);
+ exec_list *const f091C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f091C->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r091E = nequal(r08EC, body.constant(0u));
+ ir_if *f091D = new(mem_ctx) ir_if(operand(r091E).val);
+ exec_list *const f091D_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f091D->then_instructions;
+
+ ir_variable *const r091F = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r091F);
+ body.emit(assign(r091F, add(r08E8, body.constant(1u)), 0x01));
+
+ ir_expression *const r0920 = less(r091F, r08E8);
+ ir_expression *const r0921 = expr(ir_unop_b2i, r0920);
+ ir_expression *const r0922 = expr(ir_unop_i2u, r0921);
+ body.emit(assign(r08E7, add(r08E7, r0922), 0x01));
+
+ ir_expression *const r0923 = neg(r08E9);
+ ir_expression *const r0924 = equal(r08E9, r0923);
+ ir_expression *const r0925 = expr(ir_unop_b2i, r0924);
+ ir_expression *const r0926 = expr(ir_unop_i2u, r0925);
+ ir_expression *const r0927 = bit_and(r0926, body.constant(1u));
+ ir_expression *const r0928 = expr(ir_unop_bit_not, r0927);
+ body.emit(assign(r08E8, bit_and(r091F, r0928), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f091D->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r092A = bit_or(r08E7, r08E8);
+ ir_expression *const r092B = equal(r092A, body.constant(0u));
+ ir_if *f0929 = new(mem_ctx) ir_if(operand(r092B).val);
+ exec_list *const f0929_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0929->then_instructions;
+
+ body.emit(assign(r08E6, body.constant(0u), 0x01));
+
+
+ body.instructions = f0929_parent_instructions;
+ body.emit(f0929);
+
+ /* END IF */
+
+
+ body.instructions = f091D_parent_instructions;
+ body.emit(f091D);
+
+ /* END IF */
+
+ ir_variable *const r092C = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r092C);
+ ir_expression *const r092D = lshift(r081A, body.constant(int(31)));
+ ir_expression *const r092E = lshift(r08E6, body.constant(int(20)));
+ ir_expression *const r092F = add(r092D, r092E);
+ body.emit(assign(r092C, add(r092F, r08E7), 0x01));
+
+ body.emit(assign(r092C, r08E8, 0x02));
+
+ body.emit(assign(r08EB, r092C, 0x03));
+
+ body.emit(assign(r08EA, body.constant(false), 0x01));
+
+
+ body.instructions = f091C_parent_instructions;
+ body.emit(f091C);
+
+ /* END IF */
+
+ body.emit(assign(r081F, r08EB, 0x03));
+
+ body.emit(assign(r081E, body.constant(false), 0x01));
+
+
+ body.instructions = f08DD_parent_instructions;
+ body.emit(f08DD);
+
+ /* END IF */
+
+
+ body.instructions = f08B3_parent_instructions;
+ body.emit(f08B3);
+
+ /* END IF */
+
+
+ body.instructions = f086F_parent_instructions;
+ body.emit(f086F);
+
+ /* END IF */
+
+
+ body.instructions = f082E_parent_instructions;
+ body.emit(f082E);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f0930 = new(mem_ctx) ir_if(operand(r081E).val);
+ exec_list *const f0930_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0930->then_instructions;
+
+ body.emit(assign(r0825, bit_or(swizzle_x(r0825), body.constant(1048576u)), 0x01));
+
+ ir_variable *const r0931 = body.make_temp(glsl_type::uint_type, "z0Ptr");
+ ir_variable *const r0932 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0932);
+ body.emit(assign(r0932, add(swizzle_y(r0825), swizzle_y(r0824)), 0x01));
+
+ ir_expression *const r0933 = add(swizzle_x(r0825), swizzle_x(r0824));
+ ir_expression *const r0934 = less(r0932, swizzle_y(r0825));
+ ir_expression *const r0935 = expr(ir_unop_b2i, r0934);
+ ir_expression *const r0936 = expr(ir_unop_i2u, r0935);
+ body.emit(assign(r0931, add(r0933, r0936), 0x01));
+
+ body.emit(assign(r0822, r0931, 0x01));
+
+ body.emit(assign(r0823, add(r0823, body.constant(4294967295u)), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0938 = less(r0931, body.constant(2097152u));
+ ir_if *f0937 = new(mem_ctx) ir_if(operand(r0938).val);
+ exec_list *const f0937_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0937->then_instructions;
+
+ ir_variable *const r0939 = body.make_temp(glsl_type::uint_type, "zExp");
+ body.emit(assign(r0939, r0823, 0x01));
+
+ ir_variable *const r093A = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r093A, r0931, 0x01));
+
+ ir_variable *const r093B = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r093B, r0821, 0x01));
+
+ ir_variable *const r093C = body.make_temp(glsl_type::uint_type, "zFrac2");
+ body.emit(assign(r093C, r0821, 0x01));
+
+ ir_variable *const r093D = body.make_temp(glsl_type::bool_type, "execute_flag");
+ body.emit(assign(r093D, body.constant(true), 0x01));
+
+ ir_variable *const r093E = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r093F = new(mem_ctx) ir_variable(glsl_type::uint_type, "increment", ir_var_auto);
+ body.emit(r093F);
+ ir_expression *const r0940 = less(r0821, body.constant(0u));
+ ir_expression *const r0941 = expr(ir_unop_b2i, r0940);
+ body.emit(assign(r093F, expr(ir_unop_i2u, r0941), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0943 = lequal(body.constant(2045u), r0823);
+ ir_if *f0942 = new(mem_ctx) ir_if(operand(r0943).val);
+ exec_list *const f0942_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0942->then_instructions;
+
+ ir_variable *const r0944 = body.make_temp(glsl_type::bool_type, "or_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0946 = less(body.constant(2045u), r0823);
+ ir_if *f0945 = new(mem_ctx) ir_if(operand(r0946).val);
+ exec_list *const f0945_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0945->then_instructions;
+
+ body.emit(assign(r0944, body.constant(true), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0945->else_instructions;
+
+ ir_variable *const r0947 = body.make_temp(glsl_type::bool_type, "and_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0949 = equal(r0823, body.constant(2045u));
+ ir_if *f0948 = new(mem_ctx) ir_if(operand(r0949).val);
+ exec_list *const f0948_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0948->then_instructions;
+
+ ir_expression *const r094A = equal(body.constant(2097151u), r0931);
+ ir_expression *const r094B = equal(body.constant(4294967295u), r0821);
+ body.emit(assign(r0947, logic_and(r094A, r094B), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0948->else_instructions;
+
+ body.emit(assign(r0947, body.constant(false), 0x01));
+
+
+ body.instructions = f0948_parent_instructions;
+ body.emit(f0948);
+
+ /* END IF */
+
+ ir_expression *const r094C = nequal(r093F, body.constant(0u));
+ body.emit(assign(r0944, logic_and(r0947, r094C), 0x01));
+
+
+ body.instructions = f0945_parent_instructions;
+ body.emit(f0945);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f094D = new(mem_ctx) ir_if(operand(r0944).val);
+ exec_list *const f094D_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f094D->then_instructions;
+
+ ir_variable *const r094E = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r094E);
+ ir_expression *const r094F = lshift(r081A, body.constant(int(31)));
+ body.emit(assign(r094E, add(r094F, body.constant(2146435072u)), 0x01));
+
+ body.emit(assign(r094E, body.constant(0u), 0x02));
+
+ body.emit(assign(r093E, r094E, 0x03));
+
+ body.emit(assign(r093D, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f094D->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0951 = less(r0823, body.constant(0u));
+ ir_if *f0950 = new(mem_ctx) ir_if(operand(r0951).val);
+ exec_list *const f0950_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0950->then_instructions;
+
+ ir_variable *const r0952 = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r0952, r0821, 0x01));
+
+ ir_variable *const r0953 = body.make_temp(glsl_type::int_type, "count");
+ ir_expression *const r0954 = neg(r0823);
+ body.emit(assign(r0953, expr(ir_unop_u2i, r0954), 0x01));
+
+ ir_variable *const r0955 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r0955);
+ ir_variable *const r0956 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0956);
+ ir_variable *const r0957 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r0957);
+ ir_variable *const r0958 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r0959 = neg(r0953);
+ body.emit(assign(r0958, bit_and(r0959, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r095B = equal(r0953, body.constant(int(0)));
+ ir_if *f095A = new(mem_ctx) ir_if(operand(r095B).val);
+ exec_list *const f095A_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f095A->then_instructions;
+
+ body.emit(assign(r0955, r0821, 0x01));
+
+ body.emit(assign(r0956, r0821, 0x01));
+
+ body.emit(assign(r0957, r0931, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f095A->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r095D = less(r0953, body.constant(int(32)));
+ ir_if *f095C = new(mem_ctx) ir_if(operand(r095D).val);
+ exec_list *const f095C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f095C->then_instructions;
+
+ body.emit(assign(r0955, lshift(r0821, r0958), 0x01));
+
+ ir_expression *const r095E = lshift(r0931, r0958);
+ ir_expression *const r095F = rshift(r0821, r0953);
+ body.emit(assign(r0956, bit_or(r095E, r095F), 0x01));
+
+ body.emit(assign(r0957, rshift(r0931, r0953), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f095C->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0961 = equal(r0953, body.constant(int(32)));
+ ir_if *f0960 = new(mem_ctx) ir_if(operand(r0961).val);
+ exec_list *const f0960_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0960->then_instructions;
+
+ body.emit(assign(r0955, r0821, 0x01));
+
+ body.emit(assign(r0956, r0931, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0960->else_instructions;
+
+ body.emit(assign(r0952, bit_or(r0821, r0821), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0963 = less(r0953, body.constant(int(64)));
+ ir_if *f0962 = new(mem_ctx) ir_if(operand(r0963).val);
+ exec_list *const f0962_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0962->then_instructions;
+
+ body.emit(assign(r0955, lshift(r0931, r0958), 0x01));
+
+ ir_expression *const r0964 = bit_and(r0953, body.constant(int(31)));
+ body.emit(assign(r0956, rshift(r0931, r0964), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0962->else_instructions;
+
+ ir_variable *const r0965 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0967 = equal(r0953, body.constant(int(64)));
+ ir_if *f0966 = new(mem_ctx) ir_if(operand(r0967).val);
+ exec_list *const f0966_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0966->then_instructions;
+
+ body.emit(assign(r0965, r0931, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0966->else_instructions;
+
+ ir_expression *const r0968 = nequal(r0931, body.constant(0u));
+ ir_expression *const r0969 = expr(ir_unop_b2i, r0968);
+ body.emit(assign(r0965, expr(ir_unop_i2u, r0969), 0x01));
+
+
+ body.instructions = f0966_parent_instructions;
+ body.emit(f0966);
+
+ /* END IF */
+
+ body.emit(assign(r0955, r0965, 0x01));
+
+ body.emit(assign(r0956, body.constant(0u), 0x01));
+
+
+ body.instructions = f0962_parent_instructions;
+ body.emit(f0962);
+
+ /* END IF */
+
+
+ body.instructions = f0960_parent_instructions;
+ body.emit(f0960);
+
+ /* END IF */
+
+ body.emit(assign(r0957, body.constant(0u), 0x01));
+
+
+ body.instructions = f095C_parent_instructions;
+ body.emit(f095C);
+
+ /* END IF */
+
+ ir_expression *const r096A = nequal(r0952, body.constant(0u));
+ ir_expression *const r096B = expr(ir_unop_b2i, r096A);
+ ir_expression *const r096C = expr(ir_unop_i2u, r096B);
+ body.emit(assign(r0955, bit_or(r0955, r096C), 0x01));
+
+
+ body.instructions = f095A_parent_instructions;
+ body.emit(f095A);
+
+ /* END IF */
+
+ body.emit(assign(r093A, r0957, 0x01));
+
+ body.emit(assign(r093B, r0956, 0x01));
+
+ body.emit(assign(r093C, r0955, 0x01));
+
+ body.emit(assign(r0939, body.constant(0u), 0x01));
+
+ ir_expression *const r096D = less(r0955, body.constant(0u));
+ ir_expression *const r096E = expr(ir_unop_b2i, r096D);
+ body.emit(assign(r093F, expr(ir_unop_i2u, r096E), 0x01));
+
+
+ body.instructions = f0950_parent_instructions;
+ body.emit(f0950);
+
+ /* END IF */
+
+
+ body.instructions = f094D_parent_instructions;
+ body.emit(f094D);
+
+ /* END IF */
+
+
+ body.instructions = f0942_parent_instructions;
+ body.emit(f0942);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f096F = new(mem_ctx) ir_if(operand(r093D).val);
+ exec_list *const f096F_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f096F->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0971 = nequal(r093F, body.constant(0u));
+ ir_if *f0970 = new(mem_ctx) ir_if(operand(r0971).val);
+ exec_list *const f0970_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0970->then_instructions;
+
+ ir_variable *const r0972 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0972);
+ body.emit(assign(r0972, add(r093B, body.constant(1u)), 0x01));
+
+ ir_expression *const r0973 = less(r0972, r093B);
+ ir_expression *const r0974 = expr(ir_unop_b2i, r0973);
+ ir_expression *const r0975 = expr(ir_unop_i2u, r0974);
+ body.emit(assign(r093A, add(r093A, r0975), 0x01));
+
+ ir_expression *const r0976 = neg(r093C);
+ ir_expression *const r0977 = equal(r093C, r0976);
+ ir_expression *const r0978 = expr(ir_unop_b2i, r0977);
+ ir_expression *const r0979 = expr(ir_unop_i2u, r0978);
+ ir_expression *const r097A = bit_and(r0979, body.constant(1u));
+ ir_expression *const r097B = expr(ir_unop_bit_not, r097A);
+ body.emit(assign(r093B, bit_and(r0972, r097B), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0970->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r097D = bit_or(r093A, r093B);
+ ir_expression *const r097E = equal(r097D, body.constant(0u));
+ ir_if *f097C = new(mem_ctx) ir_if(operand(r097E).val);
+ exec_list *const f097C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f097C->then_instructions;
+
+ body.emit(assign(r0939, body.constant(0u), 0x01));
+
+
+ body.instructions = f097C_parent_instructions;
+ body.emit(f097C);
+
+ /* END IF */
+
+
+ body.instructions = f0970_parent_instructions;
+ body.emit(f0970);
+
+ /* END IF */
+
+ ir_variable *const r097F = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r097F);
+ ir_expression *const r0980 = lshift(r081A, body.constant(int(31)));
+ ir_expression *const r0981 = lshift(r0939, body.constant(int(20)));
+ ir_expression *const r0982 = add(r0980, r0981);
+ body.emit(assign(r097F, add(r0982, r093A), 0x01));
+
+ body.emit(assign(r097F, r093B, 0x02));
+
+ body.emit(assign(r093E, r097F, 0x03));
+
+ body.emit(assign(r093D, body.constant(false), 0x01));
+
+
+ body.instructions = f096F_parent_instructions;
+ body.emit(f096F);
+
+ /* END IF */
+
+ body.emit(assign(r081F, r093E, 0x03));
+
+ body.emit(assign(r081E, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0937->else_instructions;
+
+ body.emit(assign(r0823, add(r0823, body.constant(1u)), 0x01));
+
+ ir_variable *const r0983 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r0983);
+ ir_variable *const r0984 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0984);
+ ir_variable *const r0985 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r0985);
+ body.emit(assign(r0983, lshift(r0932, body.constant(int(31))), 0x01));
+
+ ir_expression *const r0986 = lshift(r0931, body.constant(int(31)));
+ ir_expression *const r0987 = rshift(r0932, body.constant(int(1)));
+ body.emit(assign(r0984, bit_or(r0986, r0987), 0x01));
+
+ body.emit(assign(r0985, rshift(r0931, body.constant(int(1))), 0x01));
+
+ ir_expression *const r0988 = nequal(r0821, body.constant(0u));
+ ir_expression *const r0989 = expr(ir_unop_b2i, r0988);
+ ir_expression *const r098A = expr(ir_unop_i2u, r0989);
+ body.emit(assign(r0983, bit_or(r0983, r098A), 0x01));
+
+ body.emit(assign(r0822, r0985, 0x01));
+
+ body.emit(assign(r0821, r0983, 0x01));
+
+ ir_variable *const r098B = body.make_temp(glsl_type::uint_type, "zExp");
+ body.emit(assign(r098B, r0823, 0x01));
+
+ ir_variable *const r098C = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r098C, r0985, 0x01));
+
+ ir_variable *const r098D = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r098D, r0984, 0x01));
+
+ ir_variable *const r098E = body.make_temp(glsl_type::uint_type, "zFrac2");
+ body.emit(assign(r098E, r0983, 0x01));
+
+ ir_variable *const r098F = body.make_temp(glsl_type::bool_type, "execute_flag");
+ body.emit(assign(r098F, body.constant(true), 0x01));
+
+ ir_variable *const r0990 = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r0991 = new(mem_ctx) ir_variable(glsl_type::uint_type, "increment", ir_var_auto);
+ body.emit(r0991);
+ ir_expression *const r0992 = less(r0983, body.constant(0u));
+ ir_expression *const r0993 = expr(ir_unop_b2i, r0992);
+ body.emit(assign(r0991, expr(ir_unop_i2u, r0993), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0995 = lequal(body.constant(2045u), r0823);
+ ir_if *f0994 = new(mem_ctx) ir_if(operand(r0995).val);
+ exec_list *const f0994_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0994->then_instructions;
+
+ ir_variable *const r0996 = body.make_temp(glsl_type::bool_type, "or_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0998 = less(body.constant(2045u), r0823);
+ ir_if *f0997 = new(mem_ctx) ir_if(operand(r0998).val);
+ exec_list *const f0997_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0997->then_instructions;
+
+ body.emit(assign(r0996, body.constant(true), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0997->else_instructions;
+
+ ir_variable *const r0999 = body.make_temp(glsl_type::bool_type, "and_tmp");
+ /* IF CONDITION */
+ ir_expression *const r099B = equal(r0823, body.constant(2045u));
+ ir_if *f099A = new(mem_ctx) ir_if(operand(r099B).val);
+ exec_list *const f099A_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f099A->then_instructions;
+
+ ir_expression *const r099C = equal(body.constant(2097151u), r0985);
+ ir_expression *const r099D = equal(body.constant(4294967295u), r0984);
+ body.emit(assign(r0999, logic_and(r099C, r099D), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f099A->else_instructions;
+
+ body.emit(assign(r0999, body.constant(false), 0x01));
+
+
+ body.instructions = f099A_parent_instructions;
+ body.emit(f099A);
+
+ /* END IF */
+
+ ir_expression *const r099E = nequal(r0991, body.constant(0u));
+ body.emit(assign(r0996, logic_and(r0999, r099E), 0x01));
+
+
+ body.instructions = f0997_parent_instructions;
+ body.emit(f0997);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f099F = new(mem_ctx) ir_if(operand(r0996).val);
+ exec_list *const f099F_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f099F->then_instructions;
+
+ ir_variable *const r09A0 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r09A0);
+ ir_expression *const r09A1 = lshift(r081A, body.constant(int(31)));
+ body.emit(assign(r09A0, add(r09A1, body.constant(2146435072u)), 0x01));
+
+ body.emit(assign(r09A0, body.constant(0u), 0x02));
+
+ body.emit(assign(r0990, r09A0, 0x03));
+
+ body.emit(assign(r098F, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f099F->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r09A3 = less(r0823, body.constant(0u));
+ ir_if *f09A2 = new(mem_ctx) ir_if(operand(r09A3).val);
+ exec_list *const f09A2_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f09A2->then_instructions;
+
+ ir_variable *const r09A4 = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r09A4, r0983, 0x01));
+
+ ir_variable *const r09A5 = body.make_temp(glsl_type::int_type, "count");
+ ir_expression *const r09A6 = neg(r0823);
+ body.emit(assign(r09A5, expr(ir_unop_u2i, r09A6), 0x01));
+
+ ir_variable *const r09A7 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r09A7);
+ ir_variable *const r09A8 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r09A8);
+ ir_variable *const r09A9 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r09A9);
+ ir_variable *const r09AA = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r09AB = neg(r09A5);
+ body.emit(assign(r09AA, bit_and(r09AB, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r09AD = equal(r09A5, body.constant(int(0)));
+ ir_if *f09AC = new(mem_ctx) ir_if(operand(r09AD).val);
+ exec_list *const f09AC_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f09AC->then_instructions;
+
+ body.emit(assign(r09A7, r0983, 0x01));
+
+ body.emit(assign(r09A8, r0984, 0x01));
+
+ body.emit(assign(r09A9, r0985, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f09AC->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r09AF = less(r09A5, body.constant(int(32)));
+ ir_if *f09AE = new(mem_ctx) ir_if(operand(r09AF).val);
+ exec_list *const f09AE_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f09AE->then_instructions;
+
+ body.emit(assign(r09A7, lshift(r0984, r09AA), 0x01));
+
+ ir_expression *const r09B0 = lshift(r0985, r09AA);
+ ir_expression *const r09B1 = rshift(r0984, r09A5);
+ body.emit(assign(r09A8, bit_or(r09B0, r09B1), 0x01));
+
+ body.emit(assign(r09A9, rshift(r0985, r09A5), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f09AE->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r09B3 = equal(r09A5, body.constant(int(32)));
+ ir_if *f09B2 = new(mem_ctx) ir_if(operand(r09B3).val);
+ exec_list *const f09B2_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f09B2->then_instructions;
+
+ body.emit(assign(r09A7, r0984, 0x01));
+
+ body.emit(assign(r09A8, r0985, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f09B2->else_instructions;
+
+ body.emit(assign(r09A4, bit_or(r0983, r0984), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r09B5 = less(r09A5, body.constant(int(64)));
+ ir_if *f09B4 = new(mem_ctx) ir_if(operand(r09B5).val);
+ exec_list *const f09B4_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f09B4->then_instructions;
+
+ body.emit(assign(r09A7, lshift(r0985, r09AA), 0x01));
+
+ ir_expression *const r09B6 = bit_and(r09A5, body.constant(int(31)));
+ body.emit(assign(r09A8, rshift(r0985, r09B6), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f09B4->else_instructions;
+
+ ir_variable *const r09B7 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r09B9 = equal(r09A5, body.constant(int(64)));
+ ir_if *f09B8 = new(mem_ctx) ir_if(operand(r09B9).val);
+ exec_list *const f09B8_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f09B8->then_instructions;
+
+ body.emit(assign(r09B7, r0985, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f09B8->else_instructions;
+
+ ir_expression *const r09BA = nequal(r0985, body.constant(0u));
+ ir_expression *const r09BB = expr(ir_unop_b2i, r09BA);
+ body.emit(assign(r09B7, expr(ir_unop_i2u, r09BB), 0x01));
+
+
+ body.instructions = f09B8_parent_instructions;
+ body.emit(f09B8);
+
+ /* END IF */
+
+ body.emit(assign(r09A7, r09B7, 0x01));
+
+ body.emit(assign(r09A8, body.constant(0u), 0x01));
+
+
+ body.instructions = f09B4_parent_instructions;
+ body.emit(f09B4);
+
+ /* END IF */
+
+
+ body.instructions = f09B2_parent_instructions;
+ body.emit(f09B2);
+
+ /* END IF */
+
+ body.emit(assign(r09A9, body.constant(0u), 0x01));
+
+
+ body.instructions = f09AE_parent_instructions;
+ body.emit(f09AE);
+
+ /* END IF */
+
+ ir_expression *const r09BC = nequal(r09A4, body.constant(0u));
+ ir_expression *const r09BD = expr(ir_unop_b2i, r09BC);
+ ir_expression *const r09BE = expr(ir_unop_i2u, r09BD);
+ body.emit(assign(r09A7, bit_or(r09A7, r09BE), 0x01));
+
+
+ body.instructions = f09AC_parent_instructions;
+ body.emit(f09AC);
+
+ /* END IF */
+
+ body.emit(assign(r098C, r09A9, 0x01));
+
+ body.emit(assign(r098D, r09A8, 0x01));
+
+ body.emit(assign(r098E, r09A7, 0x01));
+
+ body.emit(assign(r098B, body.constant(0u), 0x01));
+
+ ir_expression *const r09BF = less(r09A7, body.constant(0u));
+ ir_expression *const r09C0 = expr(ir_unop_b2i, r09BF);
+ body.emit(assign(r0991, expr(ir_unop_i2u, r09C0), 0x01));
+
+
+ body.instructions = f09A2_parent_instructions;
+ body.emit(f09A2);
+
+ /* END IF */
+
+
+ body.instructions = f099F_parent_instructions;
+ body.emit(f099F);
+
+ /* END IF */
+
+
+ body.instructions = f0994_parent_instructions;
+ body.emit(f0994);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f09C1 = new(mem_ctx) ir_if(operand(r098F).val);
+ exec_list *const f09C1_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f09C1->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r09C3 = nequal(r0991, body.constant(0u));
+ ir_if *f09C2 = new(mem_ctx) ir_if(operand(r09C3).val);
+ exec_list *const f09C2_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f09C2->then_instructions;
+
+ ir_variable *const r09C4 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r09C4);
+ body.emit(assign(r09C4, add(r098D, body.constant(1u)), 0x01));
+
+ ir_expression *const r09C5 = less(r09C4, r098D);
+ ir_expression *const r09C6 = expr(ir_unop_b2i, r09C5);
+ ir_expression *const r09C7 = expr(ir_unop_i2u, r09C6);
+ body.emit(assign(r098C, add(r098C, r09C7), 0x01));
+
+ ir_expression *const r09C8 = neg(r098E);
+ ir_expression *const r09C9 = equal(r098E, r09C8);
+ ir_expression *const r09CA = expr(ir_unop_b2i, r09C9);
+ ir_expression *const r09CB = expr(ir_unop_i2u, r09CA);
+ ir_expression *const r09CC = bit_and(r09CB, body.constant(1u));
+ ir_expression *const r09CD = expr(ir_unop_bit_not, r09CC);
+ body.emit(assign(r098D, bit_and(r09C4, r09CD), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f09C2->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r09CF = bit_or(r098C, r098D);
+ ir_expression *const r09D0 = equal(r09CF, body.constant(0u));
+ ir_if *f09CE = new(mem_ctx) ir_if(operand(r09D0).val);
+ exec_list *const f09CE_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f09CE->then_instructions;
+
+ body.emit(assign(r098B, body.constant(0u), 0x01));
+
+
+ body.instructions = f09CE_parent_instructions;
+ body.emit(f09CE);
+
+ /* END IF */
+
+
+ body.instructions = f09C2_parent_instructions;
+ body.emit(f09C2);
+
+ /* END IF */
+
+ ir_variable *const r09D1 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r09D1);
+ ir_expression *const r09D2 = lshift(r081A, body.constant(int(31)));
+ ir_expression *const r09D3 = lshift(r098B, body.constant(int(20)));
+ ir_expression *const r09D4 = add(r09D2, r09D3);
+ body.emit(assign(r09D1, add(r09D4, r098C), 0x01));
+
+ body.emit(assign(r09D1, r098D, 0x02));
+
+ body.emit(assign(r0990, r09D1, 0x03));
+
+ body.emit(assign(r098F, body.constant(false), 0x01));
+
+
+ body.instructions = f09C1_parent_instructions;
+ body.emit(f09C1);
+
+ /* END IF */
+
+ body.emit(assign(r081F, r0990, 0x03));
+
+ body.emit(assign(r081E, body.constant(false), 0x01));
+
+
+ body.instructions = f0937_parent_instructions;
+ body.emit(f0937);
+
+ /* END IF */
+
+
+ body.instructions = f0930_parent_instructions;
+ body.emit(f0930);
+
+ /* END IF */
+
+ body.emit(assign(r0819, r081F, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f081C->else_instructions;
+
+ ir_variable *const r09D5 = body.make_temp(glsl_type::uint_type, "zSign");
+ body.emit(assign(r09D5, r081A, 0x01));
+
+ ir_variable *const r09D6 = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r09D7 = new(mem_ctx) ir_variable(glsl_type::int_type, "expDiff", ir_var_auto);
+ body.emit(r09D7);
+ ir_variable *const r09D8 = new(mem_ctx) ir_variable(glsl_type::uint_type, "zExp", ir_var_auto);
+ body.emit(r09D8);
+ ir_variable *const r09D9 = new(mem_ctx) ir_variable(glsl_type::uint_type, "bExp", ir_var_auto);
+ body.emit(r09D9);
+ ir_variable *const r09DA = new(mem_ctx) ir_variable(glsl_type::uint_type, "aExp", ir_var_auto);
+ body.emit(r09DA);
+ ir_variable *const r09DB = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "bFrac", ir_var_auto);
+ body.emit(r09DB);
+ ir_variable *const r09DC = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "aFrac", ir_var_auto);
+ body.emit(r09DC);
+ ir_variable *const r09DD = body.make_temp(glsl_type::uvec2_type, "vec_ctor");
+ body.emit(assign(r09DD, bit_and(swizzle_x(r0817), body.constant(1048575u)), 0x01));
+
+ body.emit(assign(r09DD, swizzle_y(r0817), 0x02));
+
+ ir_variable *const r09DE = body.make_temp(glsl_type::uint_type, "extractFloat64Exp_retval");
+ ir_expression *const r09DF = rshift(swizzle_x(r0817), body.constant(int(20)));
+ body.emit(assign(r09DE, bit_and(r09DF, body.constant(2047u)), 0x01));
+
+ body.emit(assign(r09DA, r09DE, 0x01));
+
+ ir_variable *const r09E0 = body.make_temp(glsl_type::uvec2_type, "vec_ctor");
+ body.emit(assign(r09E0, bit_and(swizzle_x(r0818), body.constant(1048575u)), 0x01));
+
+ body.emit(assign(r09E0, swizzle_y(r0818), 0x02));
+
+ ir_variable *const r09E1 = body.make_temp(glsl_type::uint_type, "extractFloat64Exp_retval");
+ ir_expression *const r09E2 = rshift(swizzle_x(r0818), body.constant(int(20)));
+ body.emit(assign(r09E1, bit_and(r09E2, body.constant(2047u)), 0x01));
+
+ body.emit(assign(r09D9, r09E1, 0x01));
+
+ ir_expression *const r09E3 = expr(ir_unop_u2i, r09DE);
+ ir_expression *const r09E4 = expr(ir_unop_u2i, r09E1);
+ body.emit(assign(r09D7, sub(r09E3, r09E4), 0x01));
+
+ ir_variable *const r09E5 = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r09E5, lshift(swizzle_y(r0817), body.constant(int(10))), 0x01));
+
+ ir_variable *const r09E6 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ ir_expression *const r09E7 = lshift(swizzle_x(r09DD), body.constant(int(10)));
+ ir_expression *const r09E8 = rshift(swizzle_y(r0817), body.constant(int(22)));
+ body.emit(assign(r09E6, bit_or(r09E7, r09E8), 0x01));
+
+ body.emit(assign(r09DC, r09E6, 0x01));
+
+ body.emit(assign(r09DC, r09E5, 0x02));
+
+ ir_variable *const r09E9 = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r09E9, lshift(swizzle_y(r0818), body.constant(int(10))), 0x01));
+
+ ir_variable *const r09EA = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ ir_expression *const r09EB = lshift(swizzle_x(r09E0), body.constant(int(10)));
+ ir_expression *const r09EC = rshift(swizzle_y(r0818), body.constant(int(22)));
+ body.emit(assign(r09EA, bit_or(r09EB, r09EC), 0x01));
+
+ body.emit(assign(r09DB, r09EA, 0x01));
+
+ body.emit(assign(r09DB, r09E9, 0x02));
+
+ /* IF CONDITION */
+ ir_expression *const r09EE = less(body.constant(int(0)), r09D7);
+ ir_if *f09ED = new(mem_ctx) ir_if(operand(r09EE).val);
+ exec_list *const f09ED_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f09ED->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r09F0 = equal(r09DE, body.constant(2047u));
+ ir_if *f09EF = new(mem_ctx) ir_if(operand(r09F0).val);
+ exec_list *const f09EF_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f09EF->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r09F2 = bit_or(r09E6, r09E5);
+ ir_expression *const r09F3 = nequal(r09F2, body.constant(0u));
+ ir_if *f09F1 = new(mem_ctx) ir_if(operand(r09F3).val);
+ exec_list *const f09F1_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f09F1->then_instructions;
+
+ ir_variable *const r09F4 = body.make_temp(glsl_type::uvec2_type, "a");
+ body.emit(assign(r09F4, swizzle_x(r0817), 0x01));
+
+ ir_variable *const r09F5 = body.make_temp(glsl_type::uvec2_type, "b");
+ body.emit(assign(r09F5, swizzle_x(r0818), 0x01));
+
+ ir_variable *const r09F6 = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r09F7 = body.make_temp(glsl_type::bool_type, "float64_is_signaling_nan_retval");
+ ir_expression *const r09F8 = rshift(swizzle_y(r0817), body.constant(int(19)));
+ ir_expression *const r09F9 = bit_and(r09F8, body.constant(4095u));
+ ir_expression *const r09FA = equal(r09F9, body.constant(4094u));
+ ir_expression *const r09FB = nequal(swizzle_x(r0817), body.constant(0u));
+ ir_expression *const r09FC = bit_and(swizzle_y(r0817), body.constant(524287u));
+ ir_expression *const r09FD = nequal(r09FC, body.constant(0u));
+ ir_expression *const r09FE = logic_or(r09FB, r09FD);
+ body.emit(assign(r09F7, logic_and(r09FA, r09FE), 0x01));
+
+ ir_variable *const r09FF = body.make_temp(glsl_type::bool_type, "float64_is_nan_retval");
+ ir_expression *const r0A00 = lshift(swizzle_y(r0818), body.constant(int(1)));
+ ir_expression *const r0A01 = lequal(body.constant(4292870144u), r0A00);
+ ir_expression *const r0A02 = nequal(swizzle_x(r0818), body.constant(0u));
+ ir_expression *const r0A03 = bit_and(swizzle_y(r0818), body.constant(1048575u));
+ ir_expression *const r0A04 = nequal(r0A03, body.constant(0u));
+ ir_expression *const r0A05 = logic_or(r0A02, r0A04);
+ body.emit(assign(r09FF, logic_and(r0A01, r0A05), 0x01));
+
+ body.emit(assign(r09F4, bit_or(swizzle_y(r0817), body.constant(524288u)), 0x02));
+
+ body.emit(assign(r09F5, bit_or(swizzle_y(r0818), body.constant(524288u)), 0x02));
+
+ /* IF CONDITION */
+ ir_expression *const r0A07 = lshift(swizzle_y(r0817), body.constant(int(1)));
+ ir_expression *const r0A08 = lequal(body.constant(4292870144u), r0A07);
+ ir_expression *const r0A09 = nequal(swizzle_x(r0817), body.constant(0u));
+ ir_expression *const r0A0A = bit_and(swizzle_y(r0817), body.constant(1048575u));
+ ir_expression *const r0A0B = nequal(r0A0A, body.constant(0u));
+ ir_expression *const r0A0C = logic_or(r0A09, r0A0B);
+ ir_expression *const r0A0D = logic_and(r0A08, r0A0C);
+ ir_if *f0A06 = new(mem_ctx) ir_if(operand(r0A0D).val);
+ exec_list *const f0A06_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0A06->then_instructions;
+
+ ir_variable *const r0A0E = body.make_temp(glsl_type::uvec2_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0A10 = logic_and(r09F7, r09FF);
+ ir_if *f0A0F = new(mem_ctx) ir_if(operand(r0A10).val);
+ exec_list *const f0A0F_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0A0F->then_instructions;
+
+ body.emit(assign(r0A0E, r09F5, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0A0F->else_instructions;
+
+ body.emit(assign(r0A0E, r09F4, 0x03));
+
+
+ body.instructions = f0A0F_parent_instructions;
+ body.emit(f0A0F);
+
+ /* END IF */
+
+ body.emit(assign(r09F6, r0A0E, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0A06->else_instructions;
+
+ body.emit(assign(r09F6, r09F5, 0x03));
+
+
+ body.instructions = f0A06_parent_instructions;
+ body.emit(f0A06);
+
+ /* END IF */
+
+ body.emit(assign(r09D6, r09F6, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f09F1->else_instructions;
+
+ body.emit(assign(r09D6, r0817, 0x03));
+
+
+ body.instructions = f09F1_parent_instructions;
+ body.emit(f09F1);
+
+ /* END IF */
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f09EF->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0A12 = equal(r09E1, body.constant(0u));
+ ir_if *f0A11 = new(mem_ctx) ir_if(operand(r0A12).val);
+ exec_list *const f0A11_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0A11->then_instructions;
+
+ body.emit(assign(r09D7, add(r09D7, body.constant(int(-1))), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0A11->else_instructions;
+
+ body.emit(assign(r09DB, bit_or(r09EA, body.constant(1073741824u)), 0x01));
+
+
+ body.instructions = f0A11_parent_instructions;
+ body.emit(f0A11);
+
+ /* END IF */
+
+ ir_variable *const r0A13 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0A13);
+ ir_variable *const r0A14 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r0A14);
+ ir_variable *const r0A15 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r0A16 = neg(r09D7);
+ body.emit(assign(r0A15, bit_and(r0A16, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0A18 = equal(r09D7, body.constant(int(0)));
+ ir_if *f0A17 = new(mem_ctx) ir_if(operand(r0A18).val);
+ exec_list *const f0A17_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0A17->then_instructions;
+
+ body.emit(assign(r0A13, swizzle_y(r09DB), 0x01));
+
+ body.emit(assign(r0A14, swizzle_x(r09DB), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0A17->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0A1A = less(r09D7, body.constant(int(32)));
+ ir_if *f0A19 = new(mem_ctx) ir_if(operand(r0A1A).val);
+ exec_list *const f0A19_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0A19->then_instructions;
+
+ ir_expression *const r0A1B = lshift(swizzle_x(r09DB), r0A15);
+ ir_expression *const r0A1C = rshift(r09E9, r09D7);
+ ir_expression *const r0A1D = bit_or(r0A1B, r0A1C);
+ ir_expression *const r0A1E = lshift(r09E9, r0A15);
+ ir_expression *const r0A1F = nequal(r0A1E, body.constant(0u));
+ ir_expression *const r0A20 = expr(ir_unop_b2i, r0A1F);
+ ir_expression *const r0A21 = expr(ir_unop_i2u, r0A20);
+ body.emit(assign(r0A13, bit_or(r0A1D, r0A21), 0x01));
+
+ body.emit(assign(r0A14, rshift(swizzle_x(r09DB), r09D7), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0A19->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0A23 = equal(r09D7, body.constant(int(32)));
+ ir_if *f0A22 = new(mem_ctx) ir_if(operand(r0A23).val);
+ exec_list *const f0A22_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0A22->then_instructions;
+
+ ir_expression *const r0A24 = nequal(r09E9, body.constant(0u));
+ ir_expression *const r0A25 = expr(ir_unop_b2i, r0A24);
+ ir_expression *const r0A26 = expr(ir_unop_i2u, r0A25);
+ body.emit(assign(r0A13, bit_or(swizzle_x(r09DB), r0A26), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0A22->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0A28 = less(r09D7, body.constant(int(64)));
+ ir_if *f0A27 = new(mem_ctx) ir_if(operand(r0A28).val);
+ exec_list *const f0A27_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0A27->then_instructions;
+
+ ir_expression *const r0A29 = bit_and(r09D7, body.constant(int(31)));
+ ir_expression *const r0A2A = rshift(swizzle_x(r09DB), r0A29);
+ ir_expression *const r0A2B = lshift(swizzle_x(r09DB), r0A15);
+ ir_expression *const r0A2C = bit_or(r0A2B, r09E9);
+ ir_expression *const r0A2D = nequal(r0A2C, body.constant(0u));
+ ir_expression *const r0A2E = expr(ir_unop_b2i, r0A2D);
+ ir_expression *const r0A2F = expr(ir_unop_i2u, r0A2E);
+ body.emit(assign(r0A13, bit_or(r0A2A, r0A2F), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0A27->else_instructions;
+
+ ir_expression *const r0A30 = bit_or(swizzle_x(r09DB), r09E9);
+ ir_expression *const r0A31 = nequal(r0A30, body.constant(0u));
+ ir_expression *const r0A32 = expr(ir_unop_b2i, r0A31);
+ body.emit(assign(r0A13, expr(ir_unop_i2u, r0A32), 0x01));
+
+
+ body.instructions = f0A27_parent_instructions;
+ body.emit(f0A27);
+
+ /* END IF */
+
+
+ body.instructions = f0A22_parent_instructions;
+ body.emit(f0A22);
+
+ /* END IF */
+
+ body.emit(assign(r0A14, body.constant(0u), 0x01));
+
+
+ body.instructions = f0A19_parent_instructions;
+ body.emit(f0A19);
+
+ /* END IF */
+
+
+ body.instructions = f0A17_parent_instructions;
+ body.emit(f0A17);
+
+ /* END IF */
+
+ body.emit(assign(r09DB, r0A14, 0x01));
+
+ body.emit(assign(r09DB, r0A13, 0x02));
+
+ body.emit(assign(r09DC, bit_or(r09E6, body.constant(1073741824u)), 0x01));
+
+ ir_variable *const r0A33 = body.make_temp(glsl_type::uint_type, "z0Ptr");
+ ir_variable *const r0A34 = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r0A34, sub(r09E5, r0A13), 0x01));
+
+ ir_expression *const r0A35 = sub(swizzle_x(r09DC), r0A14);
+ ir_expression *const r0A36 = less(r09E5, r0A13);
+ ir_expression *const r0A37 = expr(ir_unop_b2i, r0A36);
+ ir_expression *const r0A38 = expr(ir_unop_i2u, r0A37);
+ body.emit(assign(r0A33, sub(r0A35, r0A38), 0x01));
+
+ body.emit(assign(r09D8, add(r09DE, body.constant(4294967295u)), 0x01));
+
+ ir_variable *const r0A39 = body.make_temp(glsl_type::uint_type, "zExp");
+ body.emit(assign(r0A39, add(r09D8, body.constant(4294967286u)), 0x01));
+
+ ir_variable *const r0A3A = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r0A3A, r0A33, 0x01));
+
+ ir_variable *const r0A3B = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r0A3B, r0A34, 0x01));
+
+ ir_variable *const r0A3C = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac2", ir_var_auto);
+ body.emit(r0A3C);
+ ir_variable *const r0A3D = new(mem_ctx) ir_variable(glsl_type::int_type, "shiftCount", ir_var_auto);
+ body.emit(r0A3D);
+ /* IF CONDITION */
+ ir_expression *const r0A3F = equal(r0A33, body.constant(0u));
+ ir_if *f0A3E = new(mem_ctx) ir_if(operand(r0A3F).val);
+ exec_list *const f0A3E_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0A3E->then_instructions;
+
+ body.emit(assign(r0A3A, r0A34, 0x01));
+
+ body.emit(assign(r0A3B, body.constant(0u), 0x01));
+
+ body.emit(assign(r0A39, add(r0A39, body.constant(4294967264u)), 0x01));
+
+
+ body.instructions = f0A3E_parent_instructions;
+ body.emit(f0A3E);
+
+ /* END IF */
+
+ ir_variable *const r0A40 = body.make_temp(glsl_type::uint_type, "a");
+ body.emit(assign(r0A40, r0A3A, 0x01));
+
+ ir_variable *const r0A41 = body.make_temp(glsl_type::uint_type, "return_value");
+ ir_variable *const r0A42 = new(mem_ctx) ir_variable(glsl_type::uint_type, "shiftCount", ir_var_auto);
+ body.emit(r0A42);
+ /* IF CONDITION */
+ ir_expression *const r0A44 = equal(r0A3A, body.constant(0u));
+ ir_if *f0A43 = new(mem_ctx) ir_if(operand(r0A44).val);
+ exec_list *const f0A43_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0A43->then_instructions;
+
+ body.emit(assign(r0A41, body.constant(32u), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0A43->else_instructions;
+
+ body.emit(assign(r0A42, body.constant(0u), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0A46 = bit_and(r0A3A, body.constant(4294901760u));
+ ir_expression *const r0A47 = equal(r0A46, body.constant(0u));
+ ir_if *f0A45 = new(mem_ctx) ir_if(operand(r0A47).val);
+ exec_list *const f0A45_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0A45->then_instructions;
+
+ body.emit(assign(r0A42, body.constant(16u), 0x01));
+
+ body.emit(assign(r0A40, lshift(r0A3A, body.constant(int(16))), 0x01));
+
+
+ body.instructions = f0A45_parent_instructions;
+ body.emit(f0A45);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0A49 = bit_and(r0A40, body.constant(4278190080u));
+ ir_expression *const r0A4A = equal(r0A49, body.constant(0u));
+ ir_if *f0A48 = new(mem_ctx) ir_if(operand(r0A4A).val);
+ exec_list *const f0A48_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0A48->then_instructions;
+
+ body.emit(assign(r0A42, add(r0A42, body.constant(8u)), 0x01));
+
+ body.emit(assign(r0A40, lshift(r0A40, body.constant(int(8))), 0x01));
+
+
+ body.instructions = f0A48_parent_instructions;
+ body.emit(f0A48);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0A4C = bit_and(r0A40, body.constant(4026531840u));
+ ir_expression *const r0A4D = equal(r0A4C, body.constant(0u));
+ ir_if *f0A4B = new(mem_ctx) ir_if(operand(r0A4D).val);
+ exec_list *const f0A4B_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0A4B->then_instructions;
+
+ body.emit(assign(r0A42, add(r0A42, body.constant(4u)), 0x01));
+
+ body.emit(assign(r0A40, lshift(r0A40, body.constant(int(4))), 0x01));
+
+
+ body.instructions = f0A4B_parent_instructions;
+ body.emit(f0A4B);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0A4F = bit_and(r0A40, body.constant(3221225472u));
+ ir_expression *const r0A50 = equal(r0A4F, body.constant(0u));
+ ir_if *f0A4E = new(mem_ctx) ir_if(operand(r0A50).val);
+ exec_list *const f0A4E_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0A4E->then_instructions;
+
+ body.emit(assign(r0A42, add(r0A42, body.constant(2u)), 0x01));
+
+ body.emit(assign(r0A40, lshift(r0A40, body.constant(int(2))), 0x01));
+
+
+ body.instructions = f0A4E_parent_instructions;
+ body.emit(f0A4E);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0A52 = bit_and(r0A40, body.constant(2147483648u));
+ ir_expression *const r0A53 = equal(r0A52, body.constant(0u));
+ ir_if *f0A51 = new(mem_ctx) ir_if(operand(r0A53).val);
+ exec_list *const f0A51_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0A51->then_instructions;
+
+ body.emit(assign(r0A42, add(r0A42, body.constant(1u)), 0x01));
+
+
+ body.instructions = f0A51_parent_instructions;
+ body.emit(f0A51);
+
+ /* END IF */
+
+ body.emit(assign(r0A41, r0A42, 0x01));
+
+
+ body.instructions = f0A43_parent_instructions;
+ body.emit(f0A43);
+
+ /* END IF */
+
+ ir_expression *const r0A54 = expr(ir_unop_u2i, r0A41);
+ body.emit(assign(r0A3D, add(r0A54, body.constant(int(-11))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0A56 = lequal(body.constant(int(0)), r0A3D);
+ ir_if *f0A55 = new(mem_ctx) ir_if(operand(r0A56).val);
+ exec_list *const f0A55_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0A55->then_instructions;
+
+ body.emit(assign(r0A3C, body.constant(0u), 0x01));
+
+ ir_variable *const r0A57 = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r0A57, lshift(r0A3B, r0A3D), 0x01));
+
+ ir_variable *const r0A58 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0A5A = equal(r0A3D, body.constant(int(0)));
+ ir_if *f0A59 = new(mem_ctx) ir_if(operand(r0A5A).val);
+ exec_list *const f0A59_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0A59->then_instructions;
+
+ body.emit(assign(r0A58, r0A3A, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0A59->else_instructions;
+
+ ir_expression *const r0A5B = lshift(r0A3A, r0A3D);
+ ir_expression *const r0A5C = neg(r0A3D);
+ ir_expression *const r0A5D = bit_and(r0A5C, body.constant(int(31)));
+ ir_expression *const r0A5E = rshift(r0A3B, r0A5D);
+ body.emit(assign(r0A58, bit_or(r0A5B, r0A5E), 0x01));
+
+
+ body.instructions = f0A59_parent_instructions;
+ body.emit(f0A59);
+
+ /* END IF */
+
+ body.emit(assign(r0A3A, r0A58, 0x01));
+
+ body.emit(assign(r0A3B, r0A57, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0A55->else_instructions;
+
+ ir_variable *const r0A5F = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r0A5F, body.constant(0u), 0x01));
+
+ ir_variable *const r0A60 = body.make_temp(glsl_type::int_type, "count");
+ body.emit(assign(r0A60, neg(r0A3D), 0x01));
+
+ ir_variable *const r0A61 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r0A61);
+ ir_variable *const r0A62 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0A62);
+ ir_variable *const r0A63 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r0A63);
+ ir_variable *const r0A64 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r0A65 = neg(r0A60);
+ body.emit(assign(r0A64, bit_and(r0A65, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0A67 = equal(r0A60, body.constant(int(0)));
+ ir_if *f0A66 = new(mem_ctx) ir_if(operand(r0A67).val);
+ exec_list *const f0A66_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0A66->then_instructions;
+
+ body.emit(assign(r0A61, r0A5F, 0x01));
+
+ body.emit(assign(r0A62, r0A3B, 0x01));
+
+ body.emit(assign(r0A63, r0A3A, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0A66->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0A69 = less(r0A60, body.constant(int(32)));
+ ir_if *f0A68 = new(mem_ctx) ir_if(operand(r0A69).val);
+ exec_list *const f0A68_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0A68->then_instructions;
+
+ body.emit(assign(r0A61, lshift(r0A3B, r0A64), 0x01));
+
+ ir_expression *const r0A6A = lshift(r0A3A, r0A64);
+ ir_expression *const r0A6B = rshift(r0A3B, r0A60);
+ body.emit(assign(r0A62, bit_or(r0A6A, r0A6B), 0x01));
+
+ body.emit(assign(r0A63, rshift(r0A3A, r0A60), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0A68->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0A6D = equal(r0A60, body.constant(int(32)));
+ ir_if *f0A6C = new(mem_ctx) ir_if(operand(r0A6D).val);
+ exec_list *const f0A6C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0A6C->then_instructions;
+
+ body.emit(assign(r0A61, r0A3B, 0x01));
+
+ body.emit(assign(r0A62, r0A3A, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0A6C->else_instructions;
+
+ body.emit(assign(r0A5F, bit_or(body.constant(0u), r0A3B), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0A6F = less(r0A60, body.constant(int(64)));
+ ir_if *f0A6E = new(mem_ctx) ir_if(operand(r0A6F).val);
+ exec_list *const f0A6E_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0A6E->then_instructions;
+
+ body.emit(assign(r0A61, lshift(r0A3A, r0A64), 0x01));
+
+ ir_expression *const r0A70 = bit_and(r0A60, body.constant(int(31)));
+ body.emit(assign(r0A62, rshift(r0A3A, r0A70), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0A6E->else_instructions;
+
+ ir_variable *const r0A71 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0A73 = equal(r0A60, body.constant(int(64)));
+ ir_if *f0A72 = new(mem_ctx) ir_if(operand(r0A73).val);
+ exec_list *const f0A72_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0A72->then_instructions;
+
+ body.emit(assign(r0A71, r0A3A, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0A72->else_instructions;
+
+ ir_expression *const r0A74 = nequal(r0A3A, body.constant(0u));
+ ir_expression *const r0A75 = expr(ir_unop_b2i, r0A74);
+ body.emit(assign(r0A71, expr(ir_unop_i2u, r0A75), 0x01));
+
+
+ body.instructions = f0A72_parent_instructions;
+ body.emit(f0A72);
+
+ /* END IF */
+
+ body.emit(assign(r0A61, r0A71, 0x01));
+
+ body.emit(assign(r0A62, body.constant(0u), 0x01));
+
+
+ body.instructions = f0A6E_parent_instructions;
+ body.emit(f0A6E);
+
+ /* END IF */
+
+
+ body.instructions = f0A6C_parent_instructions;
+ body.emit(f0A6C);
+
+ /* END IF */
+
+ body.emit(assign(r0A63, body.constant(0u), 0x01));
+
+
+ body.instructions = f0A68_parent_instructions;
+ body.emit(f0A68);
+
+ /* END IF */
+
+ ir_expression *const r0A76 = nequal(r0A5F, body.constant(0u));
+ ir_expression *const r0A77 = expr(ir_unop_b2i, r0A76);
+ ir_expression *const r0A78 = expr(ir_unop_i2u, r0A77);
+ body.emit(assign(r0A61, bit_or(r0A61, r0A78), 0x01));
+
+
+ body.instructions = f0A66_parent_instructions;
+ body.emit(f0A66);
+
+ /* END IF */
+
+ body.emit(assign(r0A3A, r0A63, 0x01));
+
+ body.emit(assign(r0A3B, r0A62, 0x01));
+
+ body.emit(assign(r0A3C, r0A61, 0x01));
+
+
+ body.instructions = f0A55_parent_instructions;
+ body.emit(f0A55);
+
+ /* END IF */
+
+ ir_expression *const r0A79 = expr(ir_unop_i2u, r0A3D);
+ body.emit(assign(r0A39, sub(r0A39, r0A79), 0x01));
+
+ ir_variable *const r0A7A = body.make_temp(glsl_type::uint_type, "zExp");
+ body.emit(assign(r0A7A, r0A39, 0x01));
+
+ ir_variable *const r0A7B = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r0A7B, r0A3A, 0x01));
+
+ ir_variable *const r0A7C = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r0A7C, r0A3B, 0x01));
+
+ ir_variable *const r0A7D = body.make_temp(glsl_type::uint_type, "zFrac2");
+ body.emit(assign(r0A7D, r0A3C, 0x01));
+
+ ir_variable *const r0A7E = body.make_temp(glsl_type::bool_type, "execute_flag");
+ body.emit(assign(r0A7E, body.constant(true), 0x01));
+
+ ir_variable *const r0A7F = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r0A80 = new(mem_ctx) ir_variable(glsl_type::uint_type, "increment", ir_var_auto);
+ body.emit(r0A80);
+ ir_expression *const r0A81 = less(r0A3C, body.constant(0u));
+ ir_expression *const r0A82 = expr(ir_unop_b2i, r0A81);
+ body.emit(assign(r0A80, expr(ir_unop_i2u, r0A82), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0A84 = lequal(body.constant(2045u), r0A39);
+ ir_if *f0A83 = new(mem_ctx) ir_if(operand(r0A84).val);
+ exec_list *const f0A83_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0A83->then_instructions;
+
+ ir_variable *const r0A85 = body.make_temp(glsl_type::bool_type, "or_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0A87 = less(body.constant(2045u), r0A39);
+ ir_if *f0A86 = new(mem_ctx) ir_if(operand(r0A87).val);
+ exec_list *const f0A86_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0A86->then_instructions;
+
+ body.emit(assign(r0A85, body.constant(true), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0A86->else_instructions;
+
+ ir_variable *const r0A88 = body.make_temp(glsl_type::bool_type, "and_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0A8A = equal(r0A39, body.constant(2045u));
+ ir_if *f0A89 = new(mem_ctx) ir_if(operand(r0A8A).val);
+ exec_list *const f0A89_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0A89->then_instructions;
+
+ ir_expression *const r0A8B = equal(body.constant(2097151u), r0A3A);
+ ir_expression *const r0A8C = equal(body.constant(4294967295u), r0A3B);
+ body.emit(assign(r0A88, logic_and(r0A8B, r0A8C), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0A89->else_instructions;
+
+ body.emit(assign(r0A88, body.constant(false), 0x01));
+
+
+ body.instructions = f0A89_parent_instructions;
+ body.emit(f0A89);
+
+ /* END IF */
+
+ ir_expression *const r0A8D = nequal(r0A80, body.constant(0u));
+ body.emit(assign(r0A85, logic_and(r0A88, r0A8D), 0x01));
+
+
+ body.instructions = f0A86_parent_instructions;
+ body.emit(f0A86);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f0A8E = new(mem_ctx) ir_if(operand(r0A85).val);
+ exec_list *const f0A8E_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0A8E->then_instructions;
+
+ ir_variable *const r0A8F = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r0A8F);
+ ir_expression *const r0A90 = lshift(r081A, body.constant(int(31)));
+ body.emit(assign(r0A8F, add(r0A90, body.constant(2146435072u)), 0x01));
+
+ body.emit(assign(r0A8F, body.constant(0u), 0x02));
+
+ body.emit(assign(r0A7F, r0A8F, 0x03));
+
+ body.emit(assign(r0A7E, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0A8E->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0A92 = less(r0A39, body.constant(0u));
+ ir_if *f0A91 = new(mem_ctx) ir_if(operand(r0A92).val);
+ exec_list *const f0A91_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0A91->then_instructions;
+
+ ir_variable *const r0A93 = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r0A93, r0A3C, 0x01));
+
+ ir_variable *const r0A94 = body.make_temp(glsl_type::int_type, "count");
+ ir_expression *const r0A95 = neg(r0A39);
+ body.emit(assign(r0A94, expr(ir_unop_u2i, r0A95), 0x01));
+
+ ir_variable *const r0A96 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r0A96);
+ ir_variable *const r0A97 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0A97);
+ ir_variable *const r0A98 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r0A98);
+ ir_variable *const r0A99 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r0A9A = neg(r0A94);
+ body.emit(assign(r0A99, bit_and(r0A9A, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0A9C = equal(r0A94, body.constant(int(0)));
+ ir_if *f0A9B = new(mem_ctx) ir_if(operand(r0A9C).val);
+ exec_list *const f0A9B_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0A9B->then_instructions;
+
+ body.emit(assign(r0A96, r0A3C, 0x01));
+
+ body.emit(assign(r0A97, r0A3B, 0x01));
+
+ body.emit(assign(r0A98, r0A3A, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0A9B->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0A9E = less(r0A94, body.constant(int(32)));
+ ir_if *f0A9D = new(mem_ctx) ir_if(operand(r0A9E).val);
+ exec_list *const f0A9D_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0A9D->then_instructions;
+
+ body.emit(assign(r0A96, lshift(r0A3B, r0A99), 0x01));
+
+ ir_expression *const r0A9F = lshift(r0A3A, r0A99);
+ ir_expression *const r0AA0 = rshift(r0A3B, r0A94);
+ body.emit(assign(r0A97, bit_or(r0A9F, r0AA0), 0x01));
+
+ body.emit(assign(r0A98, rshift(r0A3A, r0A94), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0A9D->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0AA2 = equal(r0A94, body.constant(int(32)));
+ ir_if *f0AA1 = new(mem_ctx) ir_if(operand(r0AA2).val);
+ exec_list *const f0AA1_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0AA1->then_instructions;
+
+ body.emit(assign(r0A96, r0A3B, 0x01));
+
+ body.emit(assign(r0A97, r0A3A, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0AA1->else_instructions;
+
+ body.emit(assign(r0A93, bit_or(r0A3C, r0A3B), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0AA4 = less(r0A94, body.constant(int(64)));
+ ir_if *f0AA3 = new(mem_ctx) ir_if(operand(r0AA4).val);
+ exec_list *const f0AA3_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0AA3->then_instructions;
+
+ body.emit(assign(r0A96, lshift(r0A3A, r0A99), 0x01));
+
+ ir_expression *const r0AA5 = bit_and(r0A94, body.constant(int(31)));
+ body.emit(assign(r0A97, rshift(r0A3A, r0AA5), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0AA3->else_instructions;
+
+ ir_variable *const r0AA6 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0AA8 = equal(r0A94, body.constant(int(64)));
+ ir_if *f0AA7 = new(mem_ctx) ir_if(operand(r0AA8).val);
+ exec_list *const f0AA7_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0AA7->then_instructions;
+
+ body.emit(assign(r0AA6, r0A3A, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0AA7->else_instructions;
+
+ ir_expression *const r0AA9 = nequal(r0A3A, body.constant(0u));
+ ir_expression *const r0AAA = expr(ir_unop_b2i, r0AA9);
+ body.emit(assign(r0AA6, expr(ir_unop_i2u, r0AAA), 0x01));
+
+
+ body.instructions = f0AA7_parent_instructions;
+ body.emit(f0AA7);
+
+ /* END IF */
+
+ body.emit(assign(r0A96, r0AA6, 0x01));
+
+ body.emit(assign(r0A97, body.constant(0u), 0x01));
+
+
+ body.instructions = f0AA3_parent_instructions;
+ body.emit(f0AA3);
+
+ /* END IF */
+
+
+ body.instructions = f0AA1_parent_instructions;
+ body.emit(f0AA1);
+
+ /* END IF */
+
+ body.emit(assign(r0A98, body.constant(0u), 0x01));
+
+
+ body.instructions = f0A9D_parent_instructions;
+ body.emit(f0A9D);
+
+ /* END IF */
+
+ ir_expression *const r0AAB = nequal(r0A93, body.constant(0u));
+ ir_expression *const r0AAC = expr(ir_unop_b2i, r0AAB);
+ ir_expression *const r0AAD = expr(ir_unop_i2u, r0AAC);
+ body.emit(assign(r0A96, bit_or(r0A96, r0AAD), 0x01));
+
+
+ body.instructions = f0A9B_parent_instructions;
+ body.emit(f0A9B);
+
+ /* END IF */
+
+ body.emit(assign(r0A7B, r0A98, 0x01));
+
+ body.emit(assign(r0A7C, r0A97, 0x01));
+
+ body.emit(assign(r0A7D, r0A96, 0x01));
+
+ body.emit(assign(r0A7A, body.constant(0u), 0x01));
+
+ ir_expression *const r0AAE = less(r0A96, body.constant(0u));
+ ir_expression *const r0AAF = expr(ir_unop_b2i, r0AAE);
+ body.emit(assign(r0A80, expr(ir_unop_i2u, r0AAF), 0x01));
+
+
+ body.instructions = f0A91_parent_instructions;
+ body.emit(f0A91);
+
+ /* END IF */
+
+
+ body.instructions = f0A8E_parent_instructions;
+ body.emit(f0A8E);
+
+ /* END IF */
+
+
+ body.instructions = f0A83_parent_instructions;
+ body.emit(f0A83);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f0AB0 = new(mem_ctx) ir_if(operand(r0A7E).val);
+ exec_list *const f0AB0_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0AB0->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0AB2 = nequal(r0A80, body.constant(0u));
+ ir_if *f0AB1 = new(mem_ctx) ir_if(operand(r0AB2).val);
+ exec_list *const f0AB1_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0AB1->then_instructions;
+
+ ir_variable *const r0AB3 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0AB3);
+ body.emit(assign(r0AB3, add(r0A7C, body.constant(1u)), 0x01));
+
+ ir_expression *const r0AB4 = less(r0AB3, r0A7C);
+ ir_expression *const r0AB5 = expr(ir_unop_b2i, r0AB4);
+ ir_expression *const r0AB6 = expr(ir_unop_i2u, r0AB5);
+ body.emit(assign(r0A7B, add(r0A7B, r0AB6), 0x01));
+
+ ir_expression *const r0AB7 = neg(r0A7D);
+ ir_expression *const r0AB8 = equal(r0A7D, r0AB7);
+ ir_expression *const r0AB9 = expr(ir_unop_b2i, r0AB8);
+ ir_expression *const r0ABA = expr(ir_unop_i2u, r0AB9);
+ ir_expression *const r0ABB = bit_and(r0ABA, body.constant(1u));
+ ir_expression *const r0ABC = expr(ir_unop_bit_not, r0ABB);
+ body.emit(assign(r0A7C, bit_and(r0AB3, r0ABC), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0AB1->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0ABE = bit_or(r0A7B, r0A7C);
+ ir_expression *const r0ABF = equal(r0ABE, body.constant(0u));
+ ir_if *f0ABD = new(mem_ctx) ir_if(operand(r0ABF).val);
+ exec_list *const f0ABD_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0ABD->then_instructions;
+
+ body.emit(assign(r0A7A, body.constant(0u), 0x01));
+
+
+ body.instructions = f0ABD_parent_instructions;
+ body.emit(f0ABD);
+
+ /* END IF */
+
+
+ body.instructions = f0AB1_parent_instructions;
+ body.emit(f0AB1);
+
+ /* END IF */
+
+ ir_variable *const r0AC0 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r0AC0);
+ ir_expression *const r0AC1 = lshift(r081A, body.constant(int(31)));
+ ir_expression *const r0AC2 = lshift(r0A7A, body.constant(int(20)));
+ ir_expression *const r0AC3 = add(r0AC1, r0AC2);
+ body.emit(assign(r0AC0, add(r0AC3, r0A7B), 0x01));
+
+ body.emit(assign(r0AC0, r0A7C, 0x02));
+
+ body.emit(assign(r0A7F, r0AC0, 0x03));
+
+ body.emit(assign(r0A7E, body.constant(false), 0x01));
+
+
+ body.instructions = f0AB0_parent_instructions;
+ body.emit(f0AB0);
+
+ /* END IF */
+
+ body.emit(assign(r09D6, r0A7F, 0x03));
+
+
+ body.instructions = f09EF_parent_instructions;
+ body.emit(f09EF);
+
+ /* END IF */
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f09ED->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0AC5 = less(r09D7, body.constant(int(0)));
+ ir_if *f0AC4 = new(mem_ctx) ir_if(operand(r0AC5).val);
+ exec_list *const f0AC4_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0AC4->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0AC7 = equal(r09E1, body.constant(2047u));
+ ir_if *f0AC6 = new(mem_ctx) ir_if(operand(r0AC7).val);
+ exec_list *const f0AC6_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0AC6->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0AC9 = bit_or(swizzle_x(r09DB), swizzle_y(r09DB));
+ ir_expression *const r0ACA = nequal(r0AC9, body.constant(0u));
+ ir_if *f0AC8 = new(mem_ctx) ir_if(operand(r0ACA).val);
+ exec_list *const f0AC8_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0AC8->then_instructions;
+
+ ir_variable *const r0ACB = body.make_temp(glsl_type::uvec2_type, "a");
+ body.emit(assign(r0ACB, swizzle_x(r0817), 0x01));
+
+ ir_variable *const r0ACC = body.make_temp(glsl_type::uvec2_type, "b");
+ body.emit(assign(r0ACC, swizzle_x(r0818), 0x01));
+
+ ir_variable *const r0ACD = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r0ACE = body.make_temp(glsl_type::bool_type, "float64_is_signaling_nan_retval");
+ ir_expression *const r0ACF = rshift(swizzle_y(r0817), body.constant(int(19)));
+ ir_expression *const r0AD0 = bit_and(r0ACF, body.constant(4095u));
+ ir_expression *const r0AD1 = equal(r0AD0, body.constant(4094u));
+ ir_expression *const r0AD2 = nequal(swizzle_x(r0817), body.constant(0u));
+ ir_expression *const r0AD3 = bit_and(swizzle_y(r0817), body.constant(524287u));
+ ir_expression *const r0AD4 = nequal(r0AD3, body.constant(0u));
+ ir_expression *const r0AD5 = logic_or(r0AD2, r0AD4);
+ body.emit(assign(r0ACE, logic_and(r0AD1, r0AD5), 0x01));
+
+ ir_variable *const r0AD6 = body.make_temp(glsl_type::bool_type, "float64_is_nan_retval");
+ ir_expression *const r0AD7 = lshift(swizzle_y(r0818), body.constant(int(1)));
+ ir_expression *const r0AD8 = lequal(body.constant(4292870144u), r0AD7);
+ ir_expression *const r0AD9 = nequal(swizzle_x(r0818), body.constant(0u));
+ ir_expression *const r0ADA = bit_and(swizzle_y(r0818), body.constant(1048575u));
+ ir_expression *const r0ADB = nequal(r0ADA, body.constant(0u));
+ ir_expression *const r0ADC = logic_or(r0AD9, r0ADB);
+ body.emit(assign(r0AD6, logic_and(r0AD8, r0ADC), 0x01));
+
+ body.emit(assign(r0ACB, bit_or(swizzle_y(r0817), body.constant(524288u)), 0x02));
+
+ body.emit(assign(r0ACC, bit_or(swizzle_y(r0818), body.constant(524288u)), 0x02));
+
+ /* IF CONDITION */
+ ir_expression *const r0ADE = lshift(swizzle_y(r0817), body.constant(int(1)));
+ ir_expression *const r0ADF = lequal(body.constant(4292870144u), r0ADE);
+ ir_expression *const r0AE0 = nequal(swizzle_x(r0817), body.constant(0u));
+ ir_expression *const r0AE1 = bit_and(swizzle_y(r0817), body.constant(1048575u));
+ ir_expression *const r0AE2 = nequal(r0AE1, body.constant(0u));
+ ir_expression *const r0AE3 = logic_or(r0AE0, r0AE2);
+ ir_expression *const r0AE4 = logic_and(r0ADF, r0AE3);
+ ir_if *f0ADD = new(mem_ctx) ir_if(operand(r0AE4).val);
+ exec_list *const f0ADD_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0ADD->then_instructions;
+
+ ir_variable *const r0AE5 = body.make_temp(glsl_type::uvec2_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0AE7 = logic_and(r0ACE, r0AD6);
+ ir_if *f0AE6 = new(mem_ctx) ir_if(operand(r0AE7).val);
+ exec_list *const f0AE6_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0AE6->then_instructions;
+
+ body.emit(assign(r0AE5, r0ACC, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0AE6->else_instructions;
+
+ body.emit(assign(r0AE5, r0ACB, 0x03));
+
+
+ body.instructions = f0AE6_parent_instructions;
+ body.emit(f0AE6);
+
+ /* END IF */
+
+ body.emit(assign(r0ACD, r0AE5, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0ADD->else_instructions;
+
+ body.emit(assign(r0ACD, r0ACC, 0x03));
+
+
+ body.instructions = f0ADD_parent_instructions;
+ body.emit(f0ADD);
+
+ /* END IF */
+
+ body.emit(assign(r09D6, r0ACD, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0AC8->else_instructions;
+
+ ir_variable *const r0AE8 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r0AE8);
+ ir_expression *const r0AE9 = bit_xor(r081A, body.constant(1u));
+ ir_expression *const r0AEA = lshift(r0AE9, body.constant(int(31)));
+ body.emit(assign(r0AE8, add(r0AEA, body.constant(2146435072u)), 0x01));
+
+ body.emit(assign(r0AE8, body.constant(0u), 0x02));
+
+ body.emit(assign(r09D6, r0AE8, 0x03));
+
+
+ body.instructions = f0AC8_parent_instructions;
+ body.emit(f0AC8);
+
+ /* END IF */
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0AC6->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0AEC = equal(r09DE, body.constant(0u));
+ ir_if *f0AEB = new(mem_ctx) ir_if(operand(r0AEC).val);
+ exec_list *const f0AEB_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0AEB->then_instructions;
+
+ body.emit(assign(r09D7, add(r09D7, body.constant(int(1))), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0AEB->else_instructions;
+
+ body.emit(assign(r09DC, bit_or(swizzle_x(r09DC), body.constant(1073741824u)), 0x01));
+
+
+ body.instructions = f0AEB_parent_instructions;
+ body.emit(f0AEB);
+
+ /* END IF */
+
+ ir_variable *const r0AED = body.make_temp(glsl_type::int_type, "count");
+ body.emit(assign(r0AED, neg(r09D7), 0x01));
+
+ ir_variable *const r0AEE = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0AEE);
+ ir_variable *const r0AEF = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r0AEF);
+ ir_variable *const r0AF0 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r0AF1 = neg(r0AED);
+ body.emit(assign(r0AF0, bit_and(r0AF1, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0AF3 = equal(r0AED, body.constant(int(0)));
+ ir_if *f0AF2 = new(mem_ctx) ir_if(operand(r0AF3).val);
+ exec_list *const f0AF2_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0AF2->then_instructions;
+
+ body.emit(assign(r0AEE, swizzle_y(r09DC), 0x01));
+
+ body.emit(assign(r0AEF, swizzle_x(r09DC), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0AF2->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0AF5 = less(r0AED, body.constant(int(32)));
+ ir_if *f0AF4 = new(mem_ctx) ir_if(operand(r0AF5).val);
+ exec_list *const f0AF4_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0AF4->then_instructions;
+
+ ir_expression *const r0AF6 = lshift(swizzle_x(r09DC), r0AF0);
+ ir_expression *const r0AF7 = rshift(r09E5, r0AED);
+ ir_expression *const r0AF8 = bit_or(r0AF6, r0AF7);
+ ir_expression *const r0AF9 = lshift(r09E5, r0AF0);
+ ir_expression *const r0AFA = nequal(r0AF9, body.constant(0u));
+ ir_expression *const r0AFB = expr(ir_unop_b2i, r0AFA);
+ ir_expression *const r0AFC = expr(ir_unop_i2u, r0AFB);
+ body.emit(assign(r0AEE, bit_or(r0AF8, r0AFC), 0x01));
+
+ body.emit(assign(r0AEF, rshift(swizzle_x(r09DC), r0AED), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0AF4->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0AFE = equal(r0AED, body.constant(int(32)));
+ ir_if *f0AFD = new(mem_ctx) ir_if(operand(r0AFE).val);
+ exec_list *const f0AFD_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0AFD->then_instructions;
+
+ ir_expression *const r0AFF = nequal(r09E5, body.constant(0u));
+ ir_expression *const r0B00 = expr(ir_unop_b2i, r0AFF);
+ ir_expression *const r0B01 = expr(ir_unop_i2u, r0B00);
+ body.emit(assign(r0AEE, bit_or(swizzle_x(r09DC), r0B01), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0AFD->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0B03 = less(r0AED, body.constant(int(64)));
+ ir_if *f0B02 = new(mem_ctx) ir_if(operand(r0B03).val);
+ exec_list *const f0B02_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0B02->then_instructions;
+
+ ir_expression *const r0B04 = bit_and(r0AED, body.constant(int(31)));
+ ir_expression *const r0B05 = rshift(swizzle_x(r09DC), r0B04);
+ ir_expression *const r0B06 = lshift(swizzle_x(r09DC), r0AF0);
+ ir_expression *const r0B07 = bit_or(r0B06, r09E5);
+ ir_expression *const r0B08 = nequal(r0B07, body.constant(0u));
+ ir_expression *const r0B09 = expr(ir_unop_b2i, r0B08);
+ ir_expression *const r0B0A = expr(ir_unop_i2u, r0B09);
+ body.emit(assign(r0AEE, bit_or(r0B05, r0B0A), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0B02->else_instructions;
+
+ ir_expression *const r0B0B = bit_or(swizzle_x(r09DC), r09E5);
+ ir_expression *const r0B0C = nequal(r0B0B, body.constant(0u));
+ ir_expression *const r0B0D = expr(ir_unop_b2i, r0B0C);
+ body.emit(assign(r0AEE, expr(ir_unop_i2u, r0B0D), 0x01));
+
+
+ body.instructions = f0B02_parent_instructions;
+ body.emit(f0B02);
+
+ /* END IF */
+
+
+ body.instructions = f0AFD_parent_instructions;
+ body.emit(f0AFD);
+
+ /* END IF */
+
+ body.emit(assign(r0AEF, body.constant(0u), 0x01));
+
+
+ body.instructions = f0AF4_parent_instructions;
+ body.emit(f0AF4);
+
+ /* END IF */
+
+
+ body.instructions = f0AF2_parent_instructions;
+ body.emit(f0AF2);
+
+ /* END IF */
+
+ body.emit(assign(r09DC, r0AEF, 0x01));
+
+ body.emit(assign(r09DC, r0AEE, 0x02));
+
+ body.emit(assign(r09DB, bit_or(swizzle_x(r09DB), body.constant(1073741824u)), 0x01));
+
+ ir_variable *const r0B0E = body.make_temp(glsl_type::uint_type, "z0Ptr");
+ ir_variable *const r0B0F = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r0B0F, sub(swizzle_y(r09DB), r0AEE), 0x01));
+
+ ir_expression *const r0B10 = sub(swizzle_x(r09DB), r0AEF);
+ ir_expression *const r0B11 = less(swizzle_y(r09DB), r0AEE);
+ ir_expression *const r0B12 = expr(ir_unop_b2i, r0B11);
+ ir_expression *const r0B13 = expr(ir_unop_i2u, r0B12);
+ body.emit(assign(r0B0E, sub(r0B10, r0B13), 0x01));
+
+ body.emit(assign(r09D5, bit_xor(r081A, body.constant(1u)), 0x01));
+
+ body.emit(assign(r09D8, add(r09E1, body.constant(4294967295u)), 0x01));
+
+ ir_variable *const r0B14 = body.make_temp(glsl_type::uint_type, "zExp");
+ body.emit(assign(r0B14, add(r09D8, body.constant(4294967286u)), 0x01));
+
+ ir_variable *const r0B15 = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r0B15, r0B0E, 0x01));
+
+ ir_variable *const r0B16 = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r0B16, r0B0F, 0x01));
+
+ ir_variable *const r0B17 = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac2", ir_var_auto);
+ body.emit(r0B17);
+ ir_variable *const r0B18 = new(mem_ctx) ir_variable(glsl_type::int_type, "shiftCount", ir_var_auto);
+ body.emit(r0B18);
+ /* IF CONDITION */
+ ir_expression *const r0B1A = equal(r0B0E, body.constant(0u));
+ ir_if *f0B19 = new(mem_ctx) ir_if(operand(r0B1A).val);
+ exec_list *const f0B19_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0B19->then_instructions;
+
+ body.emit(assign(r0B15, r0B0F, 0x01));
+
+ body.emit(assign(r0B16, body.constant(0u), 0x01));
+
+ body.emit(assign(r0B14, add(r0B14, body.constant(4294967264u)), 0x01));
+
+
+ body.instructions = f0B19_parent_instructions;
+ body.emit(f0B19);
+
+ /* END IF */
+
+ ir_variable *const r0B1B = body.make_temp(glsl_type::uint_type, "a");
+ body.emit(assign(r0B1B, r0B15, 0x01));
+
+ ir_variable *const r0B1C = body.make_temp(glsl_type::uint_type, "return_value");
+ ir_variable *const r0B1D = new(mem_ctx) ir_variable(glsl_type::uint_type, "shiftCount", ir_var_auto);
+ body.emit(r0B1D);
+ /* IF CONDITION */
+ ir_expression *const r0B1F = equal(r0B15, body.constant(0u));
+ ir_if *f0B1E = new(mem_ctx) ir_if(operand(r0B1F).val);
+ exec_list *const f0B1E_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0B1E->then_instructions;
+
+ body.emit(assign(r0B1C, body.constant(32u), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0B1E->else_instructions;
+
+ body.emit(assign(r0B1D, body.constant(0u), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0B21 = bit_and(r0B15, body.constant(4294901760u));
+ ir_expression *const r0B22 = equal(r0B21, body.constant(0u));
+ ir_if *f0B20 = new(mem_ctx) ir_if(operand(r0B22).val);
+ exec_list *const f0B20_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0B20->then_instructions;
+
+ body.emit(assign(r0B1D, body.constant(16u), 0x01));
+
+ body.emit(assign(r0B1B, lshift(r0B15, body.constant(int(16))), 0x01));
+
+
+ body.instructions = f0B20_parent_instructions;
+ body.emit(f0B20);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0B24 = bit_and(r0B1B, body.constant(4278190080u));
+ ir_expression *const r0B25 = equal(r0B24, body.constant(0u));
+ ir_if *f0B23 = new(mem_ctx) ir_if(operand(r0B25).val);
+ exec_list *const f0B23_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0B23->then_instructions;
+
+ body.emit(assign(r0B1D, add(r0B1D, body.constant(8u)), 0x01));
+
+ body.emit(assign(r0B1B, lshift(r0B1B, body.constant(int(8))), 0x01));
+
+
+ body.instructions = f0B23_parent_instructions;
+ body.emit(f0B23);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0B27 = bit_and(r0B1B, body.constant(4026531840u));
+ ir_expression *const r0B28 = equal(r0B27, body.constant(0u));
+ ir_if *f0B26 = new(mem_ctx) ir_if(operand(r0B28).val);
+ exec_list *const f0B26_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0B26->then_instructions;
+
+ body.emit(assign(r0B1D, add(r0B1D, body.constant(4u)), 0x01));
+
+ body.emit(assign(r0B1B, lshift(r0B1B, body.constant(int(4))), 0x01));
+
+
+ body.instructions = f0B26_parent_instructions;
+ body.emit(f0B26);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0B2A = bit_and(r0B1B, body.constant(3221225472u));
+ ir_expression *const r0B2B = equal(r0B2A, body.constant(0u));
+ ir_if *f0B29 = new(mem_ctx) ir_if(operand(r0B2B).val);
+ exec_list *const f0B29_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0B29->then_instructions;
+
+ body.emit(assign(r0B1D, add(r0B1D, body.constant(2u)), 0x01));
+
+ body.emit(assign(r0B1B, lshift(r0B1B, body.constant(int(2))), 0x01));
+
+
+ body.instructions = f0B29_parent_instructions;
+ body.emit(f0B29);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0B2D = bit_and(r0B1B, body.constant(2147483648u));
+ ir_expression *const r0B2E = equal(r0B2D, body.constant(0u));
+ ir_if *f0B2C = new(mem_ctx) ir_if(operand(r0B2E).val);
+ exec_list *const f0B2C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0B2C->then_instructions;
+
+ body.emit(assign(r0B1D, add(r0B1D, body.constant(1u)), 0x01));
+
+
+ body.instructions = f0B2C_parent_instructions;
+ body.emit(f0B2C);
+
+ /* END IF */
+
+ body.emit(assign(r0B1C, r0B1D, 0x01));
+
+
+ body.instructions = f0B1E_parent_instructions;
+ body.emit(f0B1E);
+
+ /* END IF */
+
+ ir_expression *const r0B2F = expr(ir_unop_u2i, r0B1C);
+ body.emit(assign(r0B18, add(r0B2F, body.constant(int(-11))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0B31 = lequal(body.constant(int(0)), r0B18);
+ ir_if *f0B30 = new(mem_ctx) ir_if(operand(r0B31).val);
+ exec_list *const f0B30_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0B30->then_instructions;
+
+ body.emit(assign(r0B17, body.constant(0u), 0x01));
+
+ ir_variable *const r0B32 = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r0B32, lshift(r0B16, r0B18), 0x01));
+
+ ir_variable *const r0B33 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0B35 = equal(r0B18, body.constant(int(0)));
+ ir_if *f0B34 = new(mem_ctx) ir_if(operand(r0B35).val);
+ exec_list *const f0B34_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0B34->then_instructions;
+
+ body.emit(assign(r0B33, r0B15, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0B34->else_instructions;
+
+ ir_expression *const r0B36 = lshift(r0B15, r0B18);
+ ir_expression *const r0B37 = neg(r0B18);
+ ir_expression *const r0B38 = bit_and(r0B37, body.constant(int(31)));
+ ir_expression *const r0B39 = rshift(r0B16, r0B38);
+ body.emit(assign(r0B33, bit_or(r0B36, r0B39), 0x01));
+
+
+ body.instructions = f0B34_parent_instructions;
+ body.emit(f0B34);
+
+ /* END IF */
+
+ body.emit(assign(r0B15, r0B33, 0x01));
+
+ body.emit(assign(r0B16, r0B32, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0B30->else_instructions;
+
+ ir_variable *const r0B3A = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r0B3A, body.constant(0u), 0x01));
+
+ ir_variable *const r0B3B = body.make_temp(glsl_type::int_type, "count");
+ body.emit(assign(r0B3B, neg(r0B18), 0x01));
+
+ ir_variable *const r0B3C = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r0B3C);
+ ir_variable *const r0B3D = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0B3D);
+ ir_variable *const r0B3E = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r0B3E);
+ ir_variable *const r0B3F = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r0B40 = neg(r0B3B);
+ body.emit(assign(r0B3F, bit_and(r0B40, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0B42 = equal(r0B3B, body.constant(int(0)));
+ ir_if *f0B41 = new(mem_ctx) ir_if(operand(r0B42).val);
+ exec_list *const f0B41_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0B41->then_instructions;
+
+ body.emit(assign(r0B3C, r0B3A, 0x01));
+
+ body.emit(assign(r0B3D, r0B16, 0x01));
+
+ body.emit(assign(r0B3E, r0B15, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0B41->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0B44 = less(r0B3B, body.constant(int(32)));
+ ir_if *f0B43 = new(mem_ctx) ir_if(operand(r0B44).val);
+ exec_list *const f0B43_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0B43->then_instructions;
+
+ body.emit(assign(r0B3C, lshift(r0B16, r0B3F), 0x01));
+
+ ir_expression *const r0B45 = lshift(r0B15, r0B3F);
+ ir_expression *const r0B46 = rshift(r0B16, r0B3B);
+ body.emit(assign(r0B3D, bit_or(r0B45, r0B46), 0x01));
+
+ body.emit(assign(r0B3E, rshift(r0B15, r0B3B), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0B43->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0B48 = equal(r0B3B, body.constant(int(32)));
+ ir_if *f0B47 = new(mem_ctx) ir_if(operand(r0B48).val);
+ exec_list *const f0B47_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0B47->then_instructions;
+
+ body.emit(assign(r0B3C, r0B16, 0x01));
+
+ body.emit(assign(r0B3D, r0B15, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0B47->else_instructions;
+
+ body.emit(assign(r0B3A, bit_or(body.constant(0u), r0B16), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0B4A = less(r0B3B, body.constant(int(64)));
+ ir_if *f0B49 = new(mem_ctx) ir_if(operand(r0B4A).val);
+ exec_list *const f0B49_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0B49->then_instructions;
+
+ body.emit(assign(r0B3C, lshift(r0B15, r0B3F), 0x01));
+
+ ir_expression *const r0B4B = bit_and(r0B3B, body.constant(int(31)));
+ body.emit(assign(r0B3D, rshift(r0B15, r0B4B), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0B49->else_instructions;
+
+ ir_variable *const r0B4C = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0B4E = equal(r0B3B, body.constant(int(64)));
+ ir_if *f0B4D = new(mem_ctx) ir_if(operand(r0B4E).val);
+ exec_list *const f0B4D_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0B4D->then_instructions;
+
+ body.emit(assign(r0B4C, r0B15, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0B4D->else_instructions;
+
+ ir_expression *const r0B4F = nequal(r0B15, body.constant(0u));
+ ir_expression *const r0B50 = expr(ir_unop_b2i, r0B4F);
+ body.emit(assign(r0B4C, expr(ir_unop_i2u, r0B50), 0x01));
+
+
+ body.instructions = f0B4D_parent_instructions;
+ body.emit(f0B4D);
+
+ /* END IF */
+
+ body.emit(assign(r0B3C, r0B4C, 0x01));
+
+ body.emit(assign(r0B3D, body.constant(0u), 0x01));
+
+
+ body.instructions = f0B49_parent_instructions;
+ body.emit(f0B49);
+
+ /* END IF */
+
+
+ body.instructions = f0B47_parent_instructions;
+ body.emit(f0B47);
+
+ /* END IF */
+
+ body.emit(assign(r0B3E, body.constant(0u), 0x01));
+
+
+ body.instructions = f0B43_parent_instructions;
+ body.emit(f0B43);
+
+ /* END IF */
+
+ ir_expression *const r0B51 = nequal(r0B3A, body.constant(0u));
+ ir_expression *const r0B52 = expr(ir_unop_b2i, r0B51);
+ ir_expression *const r0B53 = expr(ir_unop_i2u, r0B52);
+ body.emit(assign(r0B3C, bit_or(r0B3C, r0B53), 0x01));
+
+
+ body.instructions = f0B41_parent_instructions;
+ body.emit(f0B41);
+
+ /* END IF */
+
+ body.emit(assign(r0B15, r0B3E, 0x01));
+
+ body.emit(assign(r0B16, r0B3D, 0x01));
+
+ body.emit(assign(r0B17, r0B3C, 0x01));
+
+
+ body.instructions = f0B30_parent_instructions;
+ body.emit(f0B30);
+
+ /* END IF */
+
+ ir_expression *const r0B54 = expr(ir_unop_i2u, r0B18);
+ body.emit(assign(r0B14, sub(r0B14, r0B54), 0x01));
+
+ ir_variable *const r0B55 = body.make_temp(glsl_type::uint_type, "zExp");
+ body.emit(assign(r0B55, r0B14, 0x01));
+
+ ir_variable *const r0B56 = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r0B56, r0B15, 0x01));
+
+ ir_variable *const r0B57 = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r0B57, r0B16, 0x01));
+
+ ir_variable *const r0B58 = body.make_temp(glsl_type::uint_type, "zFrac2");
+ body.emit(assign(r0B58, r0B17, 0x01));
+
+ ir_variable *const r0B59 = body.make_temp(glsl_type::bool_type, "execute_flag");
+ body.emit(assign(r0B59, body.constant(true), 0x01));
+
+ ir_variable *const r0B5A = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r0B5B = new(mem_ctx) ir_variable(glsl_type::uint_type, "increment", ir_var_auto);
+ body.emit(r0B5B);
+ ir_expression *const r0B5C = less(r0B17, body.constant(0u));
+ ir_expression *const r0B5D = expr(ir_unop_b2i, r0B5C);
+ body.emit(assign(r0B5B, expr(ir_unop_i2u, r0B5D), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0B5F = lequal(body.constant(2045u), r0B14);
+ ir_if *f0B5E = new(mem_ctx) ir_if(operand(r0B5F).val);
+ exec_list *const f0B5E_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0B5E->then_instructions;
+
+ ir_variable *const r0B60 = body.make_temp(glsl_type::bool_type, "or_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0B62 = less(body.constant(2045u), r0B14);
+ ir_if *f0B61 = new(mem_ctx) ir_if(operand(r0B62).val);
+ exec_list *const f0B61_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0B61->then_instructions;
+
+ body.emit(assign(r0B60, body.constant(true), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0B61->else_instructions;
+
+ ir_variable *const r0B63 = body.make_temp(glsl_type::bool_type, "and_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0B65 = equal(r0B14, body.constant(2045u));
+ ir_if *f0B64 = new(mem_ctx) ir_if(operand(r0B65).val);
+ exec_list *const f0B64_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0B64->then_instructions;
+
+ ir_expression *const r0B66 = equal(body.constant(2097151u), r0B15);
+ ir_expression *const r0B67 = equal(body.constant(4294967295u), r0B16);
+ body.emit(assign(r0B63, logic_and(r0B66, r0B67), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0B64->else_instructions;
+
+ body.emit(assign(r0B63, body.constant(false), 0x01));
+
+
+ body.instructions = f0B64_parent_instructions;
+ body.emit(f0B64);
+
+ /* END IF */
+
+ ir_expression *const r0B68 = nequal(r0B5B, body.constant(0u));
+ body.emit(assign(r0B60, logic_and(r0B63, r0B68), 0x01));
+
+
+ body.instructions = f0B61_parent_instructions;
+ body.emit(f0B61);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f0B69 = new(mem_ctx) ir_if(operand(r0B60).val);
+ exec_list *const f0B69_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0B69->then_instructions;
+
+ ir_variable *const r0B6A = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r0B6A);
+ ir_expression *const r0B6B = lshift(r09D5, body.constant(int(31)));
+ body.emit(assign(r0B6A, add(r0B6B, body.constant(2146435072u)), 0x01));
+
+ body.emit(assign(r0B6A, body.constant(0u), 0x02));
+
+ body.emit(assign(r0B5A, r0B6A, 0x03));
+
+ body.emit(assign(r0B59, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0B69->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0B6D = less(r0B14, body.constant(0u));
+ ir_if *f0B6C = new(mem_ctx) ir_if(operand(r0B6D).val);
+ exec_list *const f0B6C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0B6C->then_instructions;
+
+ ir_variable *const r0B6E = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r0B6E, r0B17, 0x01));
+
+ ir_variable *const r0B6F = body.make_temp(glsl_type::int_type, "count");
+ ir_expression *const r0B70 = neg(r0B14);
+ body.emit(assign(r0B6F, expr(ir_unop_u2i, r0B70), 0x01));
+
+ ir_variable *const r0B71 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r0B71);
+ ir_variable *const r0B72 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0B72);
+ ir_variable *const r0B73 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r0B73);
+ ir_variable *const r0B74 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r0B75 = neg(r0B6F);
+ body.emit(assign(r0B74, bit_and(r0B75, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0B77 = equal(r0B6F, body.constant(int(0)));
+ ir_if *f0B76 = new(mem_ctx) ir_if(operand(r0B77).val);
+ exec_list *const f0B76_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0B76->then_instructions;
+
+ body.emit(assign(r0B71, r0B17, 0x01));
+
+ body.emit(assign(r0B72, r0B16, 0x01));
+
+ body.emit(assign(r0B73, r0B15, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0B76->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0B79 = less(r0B6F, body.constant(int(32)));
+ ir_if *f0B78 = new(mem_ctx) ir_if(operand(r0B79).val);
+ exec_list *const f0B78_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0B78->then_instructions;
+
+ body.emit(assign(r0B71, lshift(r0B16, r0B74), 0x01));
+
+ ir_expression *const r0B7A = lshift(r0B15, r0B74);
+ ir_expression *const r0B7B = rshift(r0B16, r0B6F);
+ body.emit(assign(r0B72, bit_or(r0B7A, r0B7B), 0x01));
+
+ body.emit(assign(r0B73, rshift(r0B15, r0B6F), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0B78->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0B7D = equal(r0B6F, body.constant(int(32)));
+ ir_if *f0B7C = new(mem_ctx) ir_if(operand(r0B7D).val);
+ exec_list *const f0B7C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0B7C->then_instructions;
+
+ body.emit(assign(r0B71, r0B16, 0x01));
+
+ body.emit(assign(r0B72, r0B15, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0B7C->else_instructions;
+
+ body.emit(assign(r0B6E, bit_or(r0B17, r0B16), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0B7F = less(r0B6F, body.constant(int(64)));
+ ir_if *f0B7E = new(mem_ctx) ir_if(operand(r0B7F).val);
+ exec_list *const f0B7E_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0B7E->then_instructions;
+
+ body.emit(assign(r0B71, lshift(r0B15, r0B74), 0x01));
+
+ ir_expression *const r0B80 = bit_and(r0B6F, body.constant(int(31)));
+ body.emit(assign(r0B72, rshift(r0B15, r0B80), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0B7E->else_instructions;
+
+ ir_variable *const r0B81 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0B83 = equal(r0B6F, body.constant(int(64)));
+ ir_if *f0B82 = new(mem_ctx) ir_if(operand(r0B83).val);
+ exec_list *const f0B82_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0B82->then_instructions;
+
+ body.emit(assign(r0B81, r0B15, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0B82->else_instructions;
+
+ ir_expression *const r0B84 = nequal(r0B15, body.constant(0u));
+ ir_expression *const r0B85 = expr(ir_unop_b2i, r0B84);
+ body.emit(assign(r0B81, expr(ir_unop_i2u, r0B85), 0x01));
+
+
+ body.instructions = f0B82_parent_instructions;
+ body.emit(f0B82);
+
+ /* END IF */
+
+ body.emit(assign(r0B71, r0B81, 0x01));
+
+ body.emit(assign(r0B72, body.constant(0u), 0x01));
+
+
+ body.instructions = f0B7E_parent_instructions;
+ body.emit(f0B7E);
+
+ /* END IF */
+
+
+ body.instructions = f0B7C_parent_instructions;
+ body.emit(f0B7C);
+
+ /* END IF */
+
+ body.emit(assign(r0B73, body.constant(0u), 0x01));
+
+
+ body.instructions = f0B78_parent_instructions;
+ body.emit(f0B78);
+
+ /* END IF */
+
+ ir_expression *const r0B86 = nequal(r0B6E, body.constant(0u));
+ ir_expression *const r0B87 = expr(ir_unop_b2i, r0B86);
+ ir_expression *const r0B88 = expr(ir_unop_i2u, r0B87);
+ body.emit(assign(r0B71, bit_or(r0B71, r0B88), 0x01));
+
+
+ body.instructions = f0B76_parent_instructions;
+ body.emit(f0B76);
+
+ /* END IF */
+
+ body.emit(assign(r0B56, r0B73, 0x01));
+
+ body.emit(assign(r0B57, r0B72, 0x01));
+
+ body.emit(assign(r0B58, r0B71, 0x01));
+
+ body.emit(assign(r0B55, body.constant(0u), 0x01));
+
+ ir_expression *const r0B89 = less(r0B71, body.constant(0u));
+ ir_expression *const r0B8A = expr(ir_unop_b2i, r0B89);
+ body.emit(assign(r0B5B, expr(ir_unop_i2u, r0B8A), 0x01));
+
+
+ body.instructions = f0B6C_parent_instructions;
+ body.emit(f0B6C);
+
+ /* END IF */
+
+
+ body.instructions = f0B69_parent_instructions;
+ body.emit(f0B69);
+
+ /* END IF */
+
+
+ body.instructions = f0B5E_parent_instructions;
+ body.emit(f0B5E);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f0B8B = new(mem_ctx) ir_if(operand(r0B59).val);
+ exec_list *const f0B8B_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0B8B->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0B8D = nequal(r0B5B, body.constant(0u));
+ ir_if *f0B8C = new(mem_ctx) ir_if(operand(r0B8D).val);
+ exec_list *const f0B8C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0B8C->then_instructions;
+
+ ir_variable *const r0B8E = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0B8E);
+ body.emit(assign(r0B8E, add(r0B57, body.constant(1u)), 0x01));
+
+ ir_expression *const r0B8F = less(r0B8E, r0B57);
+ ir_expression *const r0B90 = expr(ir_unop_b2i, r0B8F);
+ ir_expression *const r0B91 = expr(ir_unop_i2u, r0B90);
+ body.emit(assign(r0B56, add(r0B56, r0B91), 0x01));
+
+ ir_expression *const r0B92 = neg(r0B58);
+ ir_expression *const r0B93 = equal(r0B58, r0B92);
+ ir_expression *const r0B94 = expr(ir_unop_b2i, r0B93);
+ ir_expression *const r0B95 = expr(ir_unop_i2u, r0B94);
+ ir_expression *const r0B96 = bit_and(r0B95, body.constant(1u));
+ ir_expression *const r0B97 = expr(ir_unop_bit_not, r0B96);
+ body.emit(assign(r0B57, bit_and(r0B8E, r0B97), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0B8C->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0B99 = bit_or(r0B56, r0B57);
+ ir_expression *const r0B9A = equal(r0B99, body.constant(0u));
+ ir_if *f0B98 = new(mem_ctx) ir_if(operand(r0B9A).val);
+ exec_list *const f0B98_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0B98->then_instructions;
+
+ body.emit(assign(r0B55, body.constant(0u), 0x01));
+
+
+ body.instructions = f0B98_parent_instructions;
+ body.emit(f0B98);
+
+ /* END IF */
+
+
+ body.instructions = f0B8C_parent_instructions;
+ body.emit(f0B8C);
+
+ /* END IF */
+
+ ir_variable *const r0B9B = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r0B9B);
+ ir_expression *const r0B9C = lshift(r09D5, body.constant(int(31)));
+ ir_expression *const r0B9D = lshift(r0B55, body.constant(int(20)));
+ ir_expression *const r0B9E = add(r0B9C, r0B9D);
+ body.emit(assign(r0B9B, add(r0B9E, r0B56), 0x01));
+
+ body.emit(assign(r0B9B, r0B57, 0x02));
+
+ body.emit(assign(r0B5A, r0B9B, 0x03));
+
+ body.emit(assign(r0B59, body.constant(false), 0x01));
+
+
+ body.instructions = f0B8B_parent_instructions;
+ body.emit(f0B8B);
+
+ /* END IF */
+
+ body.emit(assign(r09D6, r0B5A, 0x03));
+
+
+ body.instructions = f0AC6_parent_instructions;
+ body.emit(f0AC6);
+
+ /* END IF */
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0AC4->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0BA0 = equal(r09DE, body.constant(2047u));
+ ir_if *f0B9F = new(mem_ctx) ir_if(operand(r0BA0).val);
+ exec_list *const f0B9F_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0B9F->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0BA2 = bit_or(swizzle_x(r09DC), swizzle_y(r09DC));
+ ir_expression *const r0BA3 = bit_or(swizzle_x(r09DB), swizzle_y(r09DB));
+ ir_expression *const r0BA4 = bit_or(r0BA2, r0BA3);
+ ir_expression *const r0BA5 = nequal(r0BA4, body.constant(0u));
+ ir_if *f0BA1 = new(mem_ctx) ir_if(operand(r0BA5).val);
+ exec_list *const f0BA1_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0BA1->then_instructions;
+
+ ir_variable *const r0BA6 = body.make_temp(glsl_type::uvec2_type, "a");
+ body.emit(assign(r0BA6, swizzle_x(r0817), 0x01));
+
+ ir_variable *const r0BA7 = body.make_temp(glsl_type::uvec2_type, "b");
+ body.emit(assign(r0BA7, swizzle_x(r0818), 0x01));
+
+ ir_variable *const r0BA8 = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r0BA9 = body.make_temp(glsl_type::bool_type, "float64_is_signaling_nan_retval");
+ ir_expression *const r0BAA = rshift(swizzle_y(r0817), body.constant(int(19)));
+ ir_expression *const r0BAB = bit_and(r0BAA, body.constant(4095u));
+ ir_expression *const r0BAC = equal(r0BAB, body.constant(4094u));
+ ir_expression *const r0BAD = nequal(swizzle_x(r0817), body.constant(0u));
+ ir_expression *const r0BAE = bit_and(swizzle_y(r0817), body.constant(524287u));
+ ir_expression *const r0BAF = nequal(r0BAE, body.constant(0u));
+ ir_expression *const r0BB0 = logic_or(r0BAD, r0BAF);
+ body.emit(assign(r0BA9, logic_and(r0BAC, r0BB0), 0x01));
+
+ ir_variable *const r0BB1 = body.make_temp(glsl_type::bool_type, "float64_is_nan_retval");
+ ir_expression *const r0BB2 = lshift(swizzle_y(r0818), body.constant(int(1)));
+ ir_expression *const r0BB3 = lequal(body.constant(4292870144u), r0BB2);
+ ir_expression *const r0BB4 = nequal(swizzle_x(r0818), body.constant(0u));
+ ir_expression *const r0BB5 = bit_and(swizzle_y(r0818), body.constant(1048575u));
+ ir_expression *const r0BB6 = nequal(r0BB5, body.constant(0u));
+ ir_expression *const r0BB7 = logic_or(r0BB4, r0BB6);
+ body.emit(assign(r0BB1, logic_and(r0BB3, r0BB7), 0x01));
+
+ body.emit(assign(r0BA6, bit_or(swizzle_y(r0817), body.constant(524288u)), 0x02));
+
+ body.emit(assign(r0BA7, bit_or(swizzle_y(r0818), body.constant(524288u)), 0x02));
+
+ /* IF CONDITION */
+ ir_expression *const r0BB9 = lshift(swizzle_y(r0817), body.constant(int(1)));
+ ir_expression *const r0BBA = lequal(body.constant(4292870144u), r0BB9);
+ ir_expression *const r0BBB = nequal(swizzle_x(r0817), body.constant(0u));
+ ir_expression *const r0BBC = bit_and(swizzle_y(r0817), body.constant(1048575u));
+ ir_expression *const r0BBD = nequal(r0BBC, body.constant(0u));
+ ir_expression *const r0BBE = logic_or(r0BBB, r0BBD);
+ ir_expression *const r0BBF = logic_and(r0BBA, r0BBE);
+ ir_if *f0BB8 = new(mem_ctx) ir_if(operand(r0BBF).val);
+ exec_list *const f0BB8_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0BB8->then_instructions;
+
+ ir_variable *const r0BC0 = body.make_temp(glsl_type::uvec2_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0BC2 = logic_and(r0BA9, r0BB1);
+ ir_if *f0BC1 = new(mem_ctx) ir_if(operand(r0BC2).val);
+ exec_list *const f0BC1_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0BC1->then_instructions;
+
+ body.emit(assign(r0BC0, r0BA7, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0BC1->else_instructions;
+
+ body.emit(assign(r0BC0, r0BA6, 0x03));
+
+
+ body.instructions = f0BC1_parent_instructions;
+ body.emit(f0BC1);
+
+ /* END IF */
+
+ body.emit(assign(r0BA8, r0BC0, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0BB8->else_instructions;
+
+ body.emit(assign(r0BA8, r0BA7, 0x03));
+
+
+ body.instructions = f0BB8_parent_instructions;
+ body.emit(f0BB8);
+
+ /* END IF */
+
+ body.emit(assign(r09D6, r0BA8, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0BA1->else_instructions;
+
+ ir_constant_data r0BC3_data;
+ memset(&r0BC3_data, 0, sizeof(ir_constant_data));
+r0BC3_data.u[0] = 4294967295;
+r0BC3_data.u[1] = 4294967295;
+ ir_constant *const r0BC3 = new(mem_ctx) ir_constant(glsl_type::uvec2_type, &r0BC3_data);
+ body.emit(assign(r09D6, r0BC3, 0x03));
+
+
+ body.instructions = f0BA1_parent_instructions;
+ body.emit(f0BA1);
+
+ /* END IF */
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0B9F->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0BC5 = equal(r09DE, body.constant(0u));
+ ir_if *f0BC4 = new(mem_ctx) ir_if(operand(r0BC5).val);
+ exec_list *const f0BC4_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0BC4->then_instructions;
+
+ body.emit(assign(r09DA, body.constant(1u), 0x01));
+
+ body.emit(assign(r09D9, body.constant(1u), 0x01));
+
+
+ body.instructions = f0BC4_parent_instructions;
+ body.emit(f0BC4);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0BC7 = less(swizzle_x(r09DB), swizzle_x(r09DC));
+ ir_if *f0BC6 = new(mem_ctx) ir_if(operand(r0BC7).val);
+ exec_list *const f0BC6_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0BC6->then_instructions;
+
+ ir_variable *const r0BC8 = body.make_temp(glsl_type::uint_type, "z0Ptr");
+ ir_variable *const r0BC9 = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r0BC9, sub(swizzle_y(r09DC), swizzle_y(r09DB)), 0x01));
+
+ ir_expression *const r0BCA = sub(swizzle_x(r09DC), swizzle_x(r09DB));
+ ir_expression *const r0BCB = less(swizzle_y(r09DC), swizzle_y(r09DB));
+ ir_expression *const r0BCC = expr(ir_unop_b2i, r0BCB);
+ ir_expression *const r0BCD = expr(ir_unop_i2u, r0BCC);
+ body.emit(assign(r0BC8, sub(r0BCA, r0BCD), 0x01));
+
+ body.emit(assign(r09D8, add(r09DA, body.constant(4294967295u)), 0x01));
+
+ ir_variable *const r0BCE = body.make_temp(glsl_type::uint_type, "zExp");
+ body.emit(assign(r0BCE, add(r09D8, body.constant(4294967286u)), 0x01));
+
+ ir_variable *const r0BCF = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r0BCF, r0BC8, 0x01));
+
+ ir_variable *const r0BD0 = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r0BD0, r0BC9, 0x01));
+
+ ir_variable *const r0BD1 = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac2", ir_var_auto);
+ body.emit(r0BD1);
+ ir_variable *const r0BD2 = new(mem_ctx) ir_variable(glsl_type::int_type, "shiftCount", ir_var_auto);
+ body.emit(r0BD2);
+ /* IF CONDITION */
+ ir_expression *const r0BD4 = equal(r0BC8, body.constant(0u));
+ ir_if *f0BD3 = new(mem_ctx) ir_if(operand(r0BD4).val);
+ exec_list *const f0BD3_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0BD3->then_instructions;
+
+ body.emit(assign(r0BCF, r0BC9, 0x01));
+
+ body.emit(assign(r0BD0, body.constant(0u), 0x01));
+
+ body.emit(assign(r0BCE, add(r0BCE, body.constant(4294967264u)), 0x01));
+
+
+ body.instructions = f0BD3_parent_instructions;
+ body.emit(f0BD3);
+
+ /* END IF */
+
+ ir_variable *const r0BD5 = body.make_temp(glsl_type::uint_type, "a");
+ body.emit(assign(r0BD5, r0BCF, 0x01));
+
+ ir_variable *const r0BD6 = body.make_temp(glsl_type::uint_type, "return_value");
+ ir_variable *const r0BD7 = new(mem_ctx) ir_variable(glsl_type::uint_type, "shiftCount", ir_var_auto);
+ body.emit(r0BD7);
+ /* IF CONDITION */
+ ir_expression *const r0BD9 = equal(r0BCF, body.constant(0u));
+ ir_if *f0BD8 = new(mem_ctx) ir_if(operand(r0BD9).val);
+ exec_list *const f0BD8_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0BD8->then_instructions;
+
+ body.emit(assign(r0BD6, body.constant(32u), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0BD8->else_instructions;
+
+ body.emit(assign(r0BD7, body.constant(0u), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0BDB = bit_and(r0BCF, body.constant(4294901760u));
+ ir_expression *const r0BDC = equal(r0BDB, body.constant(0u));
+ ir_if *f0BDA = new(mem_ctx) ir_if(operand(r0BDC).val);
+ exec_list *const f0BDA_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0BDA->then_instructions;
+
+ body.emit(assign(r0BD7, body.constant(16u), 0x01));
+
+ body.emit(assign(r0BD5, lshift(r0BCF, body.constant(int(16))), 0x01));
+
+
+ body.instructions = f0BDA_parent_instructions;
+ body.emit(f0BDA);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0BDE = bit_and(r0BD5, body.constant(4278190080u));
+ ir_expression *const r0BDF = equal(r0BDE, body.constant(0u));
+ ir_if *f0BDD = new(mem_ctx) ir_if(operand(r0BDF).val);
+ exec_list *const f0BDD_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0BDD->then_instructions;
+
+ body.emit(assign(r0BD7, add(r0BD7, body.constant(8u)), 0x01));
+
+ body.emit(assign(r0BD5, lshift(r0BD5, body.constant(int(8))), 0x01));
+
+
+ body.instructions = f0BDD_parent_instructions;
+ body.emit(f0BDD);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0BE1 = bit_and(r0BD5, body.constant(4026531840u));
+ ir_expression *const r0BE2 = equal(r0BE1, body.constant(0u));
+ ir_if *f0BE0 = new(mem_ctx) ir_if(operand(r0BE2).val);
+ exec_list *const f0BE0_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0BE0->then_instructions;
+
+ body.emit(assign(r0BD7, add(r0BD7, body.constant(4u)), 0x01));
+
+ body.emit(assign(r0BD5, lshift(r0BD5, body.constant(int(4))), 0x01));
+
+
+ body.instructions = f0BE0_parent_instructions;
+ body.emit(f0BE0);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0BE4 = bit_and(r0BD5, body.constant(3221225472u));
+ ir_expression *const r0BE5 = equal(r0BE4, body.constant(0u));
+ ir_if *f0BE3 = new(mem_ctx) ir_if(operand(r0BE5).val);
+ exec_list *const f0BE3_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0BE3->then_instructions;
+
+ body.emit(assign(r0BD7, add(r0BD7, body.constant(2u)), 0x01));
+
+ body.emit(assign(r0BD5, lshift(r0BD5, body.constant(int(2))), 0x01));
+
+
+ body.instructions = f0BE3_parent_instructions;
+ body.emit(f0BE3);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0BE7 = bit_and(r0BD5, body.constant(2147483648u));
+ ir_expression *const r0BE8 = equal(r0BE7, body.constant(0u));
+ ir_if *f0BE6 = new(mem_ctx) ir_if(operand(r0BE8).val);
+ exec_list *const f0BE6_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0BE6->then_instructions;
+
+ body.emit(assign(r0BD7, add(r0BD7, body.constant(1u)), 0x01));
+
+
+ body.instructions = f0BE6_parent_instructions;
+ body.emit(f0BE6);
+
+ /* END IF */
+
+ body.emit(assign(r0BD6, r0BD7, 0x01));
+
+
+ body.instructions = f0BD8_parent_instructions;
+ body.emit(f0BD8);
+
+ /* END IF */
+
+ ir_expression *const r0BE9 = expr(ir_unop_u2i, r0BD6);
+ body.emit(assign(r0BD2, add(r0BE9, body.constant(int(-11))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0BEB = lequal(body.constant(int(0)), r0BD2);
+ ir_if *f0BEA = new(mem_ctx) ir_if(operand(r0BEB).val);
+ exec_list *const f0BEA_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0BEA->then_instructions;
+
+ body.emit(assign(r0BD1, body.constant(0u), 0x01));
+
+ ir_variable *const r0BEC = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r0BEC, lshift(r0BD0, r0BD2), 0x01));
+
+ ir_variable *const r0BED = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0BEF = equal(r0BD2, body.constant(int(0)));
+ ir_if *f0BEE = new(mem_ctx) ir_if(operand(r0BEF).val);
+ exec_list *const f0BEE_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0BEE->then_instructions;
+
+ body.emit(assign(r0BED, r0BCF, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0BEE->else_instructions;
+
+ ir_expression *const r0BF0 = lshift(r0BCF, r0BD2);
+ ir_expression *const r0BF1 = neg(r0BD2);
+ ir_expression *const r0BF2 = bit_and(r0BF1, body.constant(int(31)));
+ ir_expression *const r0BF3 = rshift(r0BD0, r0BF2);
+ body.emit(assign(r0BED, bit_or(r0BF0, r0BF3), 0x01));
+
+
+ body.instructions = f0BEE_parent_instructions;
+ body.emit(f0BEE);
+
+ /* END IF */
+
+ body.emit(assign(r0BCF, r0BED, 0x01));
+
+ body.emit(assign(r0BD0, r0BEC, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0BEA->else_instructions;
+
+ ir_variable *const r0BF4 = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r0BF4, body.constant(0u), 0x01));
+
+ ir_variable *const r0BF5 = body.make_temp(glsl_type::int_type, "count");
+ body.emit(assign(r0BF5, neg(r0BD2), 0x01));
+
+ ir_variable *const r0BF6 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r0BF6);
+ ir_variable *const r0BF7 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0BF7);
+ ir_variable *const r0BF8 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r0BF8);
+ ir_variable *const r0BF9 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r0BFA = neg(r0BF5);
+ body.emit(assign(r0BF9, bit_and(r0BFA, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0BFC = equal(r0BF5, body.constant(int(0)));
+ ir_if *f0BFB = new(mem_ctx) ir_if(operand(r0BFC).val);
+ exec_list *const f0BFB_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0BFB->then_instructions;
+
+ body.emit(assign(r0BF6, r0BF4, 0x01));
+
+ body.emit(assign(r0BF7, r0BD0, 0x01));
+
+ body.emit(assign(r0BF8, r0BCF, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0BFB->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0BFE = less(r0BF5, body.constant(int(32)));
+ ir_if *f0BFD = new(mem_ctx) ir_if(operand(r0BFE).val);
+ exec_list *const f0BFD_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0BFD->then_instructions;
+
+ body.emit(assign(r0BF6, lshift(r0BD0, r0BF9), 0x01));
+
+ ir_expression *const r0BFF = lshift(r0BCF, r0BF9);
+ ir_expression *const r0C00 = rshift(r0BD0, r0BF5);
+ body.emit(assign(r0BF7, bit_or(r0BFF, r0C00), 0x01));
+
+ body.emit(assign(r0BF8, rshift(r0BCF, r0BF5), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0BFD->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0C02 = equal(r0BF5, body.constant(int(32)));
+ ir_if *f0C01 = new(mem_ctx) ir_if(operand(r0C02).val);
+ exec_list *const f0C01_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0C01->then_instructions;
+
+ body.emit(assign(r0BF6, r0BD0, 0x01));
+
+ body.emit(assign(r0BF7, r0BCF, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0C01->else_instructions;
+
+ body.emit(assign(r0BF4, bit_or(body.constant(0u), r0BD0), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0C04 = less(r0BF5, body.constant(int(64)));
+ ir_if *f0C03 = new(mem_ctx) ir_if(operand(r0C04).val);
+ exec_list *const f0C03_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0C03->then_instructions;
+
+ body.emit(assign(r0BF6, lshift(r0BCF, r0BF9), 0x01));
+
+ ir_expression *const r0C05 = bit_and(r0BF5, body.constant(int(31)));
+ body.emit(assign(r0BF7, rshift(r0BCF, r0C05), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0C03->else_instructions;
+
+ ir_variable *const r0C06 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0C08 = equal(r0BF5, body.constant(int(64)));
+ ir_if *f0C07 = new(mem_ctx) ir_if(operand(r0C08).val);
+ exec_list *const f0C07_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0C07->then_instructions;
+
+ body.emit(assign(r0C06, r0BCF, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0C07->else_instructions;
+
+ ir_expression *const r0C09 = nequal(r0BCF, body.constant(0u));
+ ir_expression *const r0C0A = expr(ir_unop_b2i, r0C09);
+ body.emit(assign(r0C06, expr(ir_unop_i2u, r0C0A), 0x01));
+
+
+ body.instructions = f0C07_parent_instructions;
+ body.emit(f0C07);
+
+ /* END IF */
+
+ body.emit(assign(r0BF6, r0C06, 0x01));
+
+ body.emit(assign(r0BF7, body.constant(0u), 0x01));
+
+
+ body.instructions = f0C03_parent_instructions;
+ body.emit(f0C03);
+
+ /* END IF */
+
+
+ body.instructions = f0C01_parent_instructions;
+ body.emit(f0C01);
+
+ /* END IF */
+
+ body.emit(assign(r0BF8, body.constant(0u), 0x01));
+
+
+ body.instructions = f0BFD_parent_instructions;
+ body.emit(f0BFD);
+
+ /* END IF */
+
+ ir_expression *const r0C0B = nequal(r0BF4, body.constant(0u));
+ ir_expression *const r0C0C = expr(ir_unop_b2i, r0C0B);
+ ir_expression *const r0C0D = expr(ir_unop_i2u, r0C0C);
+ body.emit(assign(r0BF6, bit_or(r0BF6, r0C0D), 0x01));
+
+
+ body.instructions = f0BFB_parent_instructions;
+ body.emit(f0BFB);
+
+ /* END IF */
+
+ body.emit(assign(r0BCF, r0BF8, 0x01));
+
+ body.emit(assign(r0BD0, r0BF7, 0x01));
+
+ body.emit(assign(r0BD1, r0BF6, 0x01));
+
+
+ body.instructions = f0BEA_parent_instructions;
+ body.emit(f0BEA);
+
+ /* END IF */
+
+ ir_expression *const r0C0E = expr(ir_unop_i2u, r0BD2);
+ body.emit(assign(r0BCE, sub(r0BCE, r0C0E), 0x01));
+
+ ir_variable *const r0C0F = body.make_temp(glsl_type::uint_type, "zExp");
+ body.emit(assign(r0C0F, r0BCE, 0x01));
+
+ ir_variable *const r0C10 = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r0C10, r0BCF, 0x01));
+
+ ir_variable *const r0C11 = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r0C11, r0BD0, 0x01));
+
+ ir_variable *const r0C12 = body.make_temp(glsl_type::uint_type, "zFrac2");
+ body.emit(assign(r0C12, r0BD1, 0x01));
+
+ ir_variable *const r0C13 = body.make_temp(glsl_type::bool_type, "execute_flag");
+ body.emit(assign(r0C13, body.constant(true), 0x01));
+
+ ir_variable *const r0C14 = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r0C15 = new(mem_ctx) ir_variable(glsl_type::uint_type, "increment", ir_var_auto);
+ body.emit(r0C15);
+ ir_expression *const r0C16 = less(r0BD1, body.constant(0u));
+ ir_expression *const r0C17 = expr(ir_unop_b2i, r0C16);
+ body.emit(assign(r0C15, expr(ir_unop_i2u, r0C17), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0C19 = lequal(body.constant(2045u), r0BCE);
+ ir_if *f0C18 = new(mem_ctx) ir_if(operand(r0C19).val);
+ exec_list *const f0C18_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0C18->then_instructions;
+
+ ir_variable *const r0C1A = body.make_temp(glsl_type::bool_type, "or_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0C1C = less(body.constant(2045u), r0BCE);
+ ir_if *f0C1B = new(mem_ctx) ir_if(operand(r0C1C).val);
+ exec_list *const f0C1B_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0C1B->then_instructions;
+
+ body.emit(assign(r0C1A, body.constant(true), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0C1B->else_instructions;
+
+ ir_variable *const r0C1D = body.make_temp(glsl_type::bool_type, "and_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0C1F = equal(r0BCE, body.constant(2045u));
+ ir_if *f0C1E = new(mem_ctx) ir_if(operand(r0C1F).val);
+ exec_list *const f0C1E_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0C1E->then_instructions;
+
+ ir_expression *const r0C20 = equal(body.constant(2097151u), r0BCF);
+ ir_expression *const r0C21 = equal(body.constant(4294967295u), r0BD0);
+ body.emit(assign(r0C1D, logic_and(r0C20, r0C21), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0C1E->else_instructions;
+
+ body.emit(assign(r0C1D, body.constant(false), 0x01));
+
+
+ body.instructions = f0C1E_parent_instructions;
+ body.emit(f0C1E);
+
+ /* END IF */
+
+ ir_expression *const r0C22 = nequal(r0C15, body.constant(0u));
+ body.emit(assign(r0C1A, logic_and(r0C1D, r0C22), 0x01));
+
+
+ body.instructions = f0C1B_parent_instructions;
+ body.emit(f0C1B);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f0C23 = new(mem_ctx) ir_if(operand(r0C1A).val);
+ exec_list *const f0C23_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0C23->then_instructions;
+
+ ir_variable *const r0C24 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r0C24);
+ ir_expression *const r0C25 = lshift(r09D5, body.constant(int(31)));
+ body.emit(assign(r0C24, add(r0C25, body.constant(2146435072u)), 0x01));
+
+ body.emit(assign(r0C24, body.constant(0u), 0x02));
+
+ body.emit(assign(r0C14, r0C24, 0x03));
+
+ body.emit(assign(r0C13, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0C23->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0C27 = less(r0BCE, body.constant(0u));
+ ir_if *f0C26 = new(mem_ctx) ir_if(operand(r0C27).val);
+ exec_list *const f0C26_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0C26->then_instructions;
+
+ ir_variable *const r0C28 = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r0C28, r0BD1, 0x01));
+
+ ir_variable *const r0C29 = body.make_temp(glsl_type::int_type, "count");
+ ir_expression *const r0C2A = neg(r0BCE);
+ body.emit(assign(r0C29, expr(ir_unop_u2i, r0C2A), 0x01));
+
+ ir_variable *const r0C2B = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r0C2B);
+ ir_variable *const r0C2C = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0C2C);
+ ir_variable *const r0C2D = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r0C2D);
+ ir_variable *const r0C2E = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r0C2F = neg(r0C29);
+ body.emit(assign(r0C2E, bit_and(r0C2F, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0C31 = equal(r0C29, body.constant(int(0)));
+ ir_if *f0C30 = new(mem_ctx) ir_if(operand(r0C31).val);
+ exec_list *const f0C30_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0C30->then_instructions;
+
+ body.emit(assign(r0C2B, r0BD1, 0x01));
+
+ body.emit(assign(r0C2C, r0BD0, 0x01));
+
+ body.emit(assign(r0C2D, r0BCF, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0C30->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0C33 = less(r0C29, body.constant(int(32)));
+ ir_if *f0C32 = new(mem_ctx) ir_if(operand(r0C33).val);
+ exec_list *const f0C32_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0C32->then_instructions;
+
+ body.emit(assign(r0C2B, lshift(r0BD0, r0C2E), 0x01));
+
+ ir_expression *const r0C34 = lshift(r0BCF, r0C2E);
+ ir_expression *const r0C35 = rshift(r0BD0, r0C29);
+ body.emit(assign(r0C2C, bit_or(r0C34, r0C35), 0x01));
+
+ body.emit(assign(r0C2D, rshift(r0BCF, r0C29), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0C32->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0C37 = equal(r0C29, body.constant(int(32)));
+ ir_if *f0C36 = new(mem_ctx) ir_if(operand(r0C37).val);
+ exec_list *const f0C36_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0C36->then_instructions;
+
+ body.emit(assign(r0C2B, r0BD0, 0x01));
+
+ body.emit(assign(r0C2C, r0BCF, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0C36->else_instructions;
+
+ body.emit(assign(r0C28, bit_or(r0BD1, r0BD0), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0C39 = less(r0C29, body.constant(int(64)));
+ ir_if *f0C38 = new(mem_ctx) ir_if(operand(r0C39).val);
+ exec_list *const f0C38_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0C38->then_instructions;
+
+ body.emit(assign(r0C2B, lshift(r0BCF, r0C2E), 0x01));
+
+ ir_expression *const r0C3A = bit_and(r0C29, body.constant(int(31)));
+ body.emit(assign(r0C2C, rshift(r0BCF, r0C3A), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0C38->else_instructions;
+
+ ir_variable *const r0C3B = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0C3D = equal(r0C29, body.constant(int(64)));
+ ir_if *f0C3C = new(mem_ctx) ir_if(operand(r0C3D).val);
+ exec_list *const f0C3C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0C3C->then_instructions;
+
+ body.emit(assign(r0C3B, r0BCF, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0C3C->else_instructions;
+
+ ir_expression *const r0C3E = nequal(r0BCF, body.constant(0u));
+ ir_expression *const r0C3F = expr(ir_unop_b2i, r0C3E);
+ body.emit(assign(r0C3B, expr(ir_unop_i2u, r0C3F), 0x01));
+
+
+ body.instructions = f0C3C_parent_instructions;
+ body.emit(f0C3C);
+
+ /* END IF */
+
+ body.emit(assign(r0C2B, r0C3B, 0x01));
+
+ body.emit(assign(r0C2C, body.constant(0u), 0x01));
+
+
+ body.instructions = f0C38_parent_instructions;
+ body.emit(f0C38);
+
+ /* END IF */
+
+
+ body.instructions = f0C36_parent_instructions;
+ body.emit(f0C36);
+
+ /* END IF */
+
+ body.emit(assign(r0C2D, body.constant(0u), 0x01));
+
+
+ body.instructions = f0C32_parent_instructions;
+ body.emit(f0C32);
+
+ /* END IF */
+
+ ir_expression *const r0C40 = nequal(r0C28, body.constant(0u));
+ ir_expression *const r0C41 = expr(ir_unop_b2i, r0C40);
+ ir_expression *const r0C42 = expr(ir_unop_i2u, r0C41);
+ body.emit(assign(r0C2B, bit_or(r0C2B, r0C42), 0x01));
+
+
+ body.instructions = f0C30_parent_instructions;
+ body.emit(f0C30);
+
+ /* END IF */
+
+ body.emit(assign(r0C10, r0C2D, 0x01));
+
+ body.emit(assign(r0C11, r0C2C, 0x01));
+
+ body.emit(assign(r0C12, r0C2B, 0x01));
+
+ body.emit(assign(r0C0F, body.constant(0u), 0x01));
+
+ ir_expression *const r0C43 = less(r0C2B, body.constant(0u));
+ ir_expression *const r0C44 = expr(ir_unop_b2i, r0C43);
+ body.emit(assign(r0C15, expr(ir_unop_i2u, r0C44), 0x01));
+
+
+ body.instructions = f0C26_parent_instructions;
+ body.emit(f0C26);
+
+ /* END IF */
+
+
+ body.instructions = f0C23_parent_instructions;
+ body.emit(f0C23);
+
+ /* END IF */
+
+
+ body.instructions = f0C18_parent_instructions;
+ body.emit(f0C18);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f0C45 = new(mem_ctx) ir_if(operand(r0C13).val);
+ exec_list *const f0C45_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0C45->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0C47 = nequal(r0C15, body.constant(0u));
+ ir_if *f0C46 = new(mem_ctx) ir_if(operand(r0C47).val);
+ exec_list *const f0C46_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0C46->then_instructions;
+
+ ir_variable *const r0C48 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0C48);
+ body.emit(assign(r0C48, add(r0C11, body.constant(1u)), 0x01));
+
+ ir_expression *const r0C49 = less(r0C48, r0C11);
+ ir_expression *const r0C4A = expr(ir_unop_b2i, r0C49);
+ ir_expression *const r0C4B = expr(ir_unop_i2u, r0C4A);
+ body.emit(assign(r0C10, add(r0C10, r0C4B), 0x01));
+
+ ir_expression *const r0C4C = neg(r0C12);
+ ir_expression *const r0C4D = equal(r0C12, r0C4C);
+ ir_expression *const r0C4E = expr(ir_unop_b2i, r0C4D);
+ ir_expression *const r0C4F = expr(ir_unop_i2u, r0C4E);
+ ir_expression *const r0C50 = bit_and(r0C4F, body.constant(1u));
+ ir_expression *const r0C51 = expr(ir_unop_bit_not, r0C50);
+ body.emit(assign(r0C11, bit_and(r0C48, r0C51), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0C46->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0C53 = bit_or(r0C10, r0C11);
+ ir_expression *const r0C54 = equal(r0C53, body.constant(0u));
+ ir_if *f0C52 = new(mem_ctx) ir_if(operand(r0C54).val);
+ exec_list *const f0C52_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0C52->then_instructions;
+
+ body.emit(assign(r0C0F, body.constant(0u), 0x01));
+
+
+ body.instructions = f0C52_parent_instructions;
+ body.emit(f0C52);
+
+ /* END IF */
+
+
+ body.instructions = f0C46_parent_instructions;
+ body.emit(f0C46);
+
+ /* END IF */
+
+ ir_variable *const r0C55 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r0C55);
+ ir_expression *const r0C56 = lshift(r09D5, body.constant(int(31)));
+ ir_expression *const r0C57 = lshift(r0C0F, body.constant(int(20)));
+ ir_expression *const r0C58 = add(r0C56, r0C57);
+ body.emit(assign(r0C55, add(r0C58, r0C10), 0x01));
+
+ body.emit(assign(r0C55, r0C11, 0x02));
+
+ body.emit(assign(r0C14, r0C55, 0x03));
+
+ body.emit(assign(r0C13, body.constant(false), 0x01));
+
+
+ body.instructions = f0C45_parent_instructions;
+ body.emit(f0C45);
+
+ /* END IF */
+
+ body.emit(assign(r09D6, r0C14, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0BC6->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0C5A = less(swizzle_x(r09DC), swizzle_x(r09DB));
+ ir_if *f0C59 = new(mem_ctx) ir_if(operand(r0C5A).val);
+ exec_list *const f0C59_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0C59->then_instructions;
+
+ ir_variable *const r0C5B = body.make_temp(glsl_type::uint_type, "z0Ptr");
+ ir_variable *const r0C5C = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r0C5C, sub(swizzle_y(r09DB), swizzle_y(r09DC)), 0x01));
+
+ ir_expression *const r0C5D = sub(swizzle_x(r09DB), swizzle_x(r09DC));
+ ir_expression *const r0C5E = less(swizzle_y(r09DB), swizzle_y(r09DC));
+ ir_expression *const r0C5F = expr(ir_unop_b2i, r0C5E);
+ ir_expression *const r0C60 = expr(ir_unop_i2u, r0C5F);
+ body.emit(assign(r0C5B, sub(r0C5D, r0C60), 0x01));
+
+ body.emit(assign(r09D5, bit_xor(r09D5, body.constant(1u)), 0x01));
+
+ body.emit(assign(r09D8, add(r09D9, body.constant(4294967295u)), 0x01));
+
+ ir_variable *const r0C61 = body.make_temp(glsl_type::uint_type, "zExp");
+ body.emit(assign(r0C61, add(r09D8, body.constant(4294967286u)), 0x01));
+
+ ir_variable *const r0C62 = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r0C62, r0C5B, 0x01));
+
+ ir_variable *const r0C63 = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r0C63, r0C5C, 0x01));
+
+ ir_variable *const r0C64 = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac2", ir_var_auto);
+ body.emit(r0C64);
+ ir_variable *const r0C65 = new(mem_ctx) ir_variable(glsl_type::int_type, "shiftCount", ir_var_auto);
+ body.emit(r0C65);
+ /* IF CONDITION */
+ ir_expression *const r0C67 = equal(r0C5B, body.constant(0u));
+ ir_if *f0C66 = new(mem_ctx) ir_if(operand(r0C67).val);
+ exec_list *const f0C66_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0C66->then_instructions;
+
+ body.emit(assign(r0C62, r0C5C, 0x01));
+
+ body.emit(assign(r0C63, body.constant(0u), 0x01));
+
+ body.emit(assign(r0C61, add(r0C61, body.constant(4294967264u)), 0x01));
+
+
+ body.instructions = f0C66_parent_instructions;
+ body.emit(f0C66);
+
+ /* END IF */
+
+ ir_variable *const r0C68 = body.make_temp(glsl_type::uint_type, "a");
+ body.emit(assign(r0C68, r0C62, 0x01));
+
+ ir_variable *const r0C69 = body.make_temp(glsl_type::uint_type, "return_value");
+ ir_variable *const r0C6A = new(mem_ctx) ir_variable(glsl_type::uint_type, "shiftCount", ir_var_auto);
+ body.emit(r0C6A);
+ /* IF CONDITION */
+ ir_expression *const r0C6C = equal(r0C62, body.constant(0u));
+ ir_if *f0C6B = new(mem_ctx) ir_if(operand(r0C6C).val);
+ exec_list *const f0C6B_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0C6B->then_instructions;
+
+ body.emit(assign(r0C69, body.constant(32u), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0C6B->else_instructions;
+
+ body.emit(assign(r0C6A, body.constant(0u), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0C6E = bit_and(r0C62, body.constant(4294901760u));
+ ir_expression *const r0C6F = equal(r0C6E, body.constant(0u));
+ ir_if *f0C6D = new(mem_ctx) ir_if(operand(r0C6F).val);
+ exec_list *const f0C6D_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0C6D->then_instructions;
+
+ body.emit(assign(r0C6A, body.constant(16u), 0x01));
+
+ body.emit(assign(r0C68, lshift(r0C62, body.constant(int(16))), 0x01));
+
+
+ body.instructions = f0C6D_parent_instructions;
+ body.emit(f0C6D);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0C71 = bit_and(r0C68, body.constant(4278190080u));
+ ir_expression *const r0C72 = equal(r0C71, body.constant(0u));
+ ir_if *f0C70 = new(mem_ctx) ir_if(operand(r0C72).val);
+ exec_list *const f0C70_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0C70->then_instructions;
+
+ body.emit(assign(r0C6A, add(r0C6A, body.constant(8u)), 0x01));
+
+ body.emit(assign(r0C68, lshift(r0C68, body.constant(int(8))), 0x01));
+
+
+ body.instructions = f0C70_parent_instructions;
+ body.emit(f0C70);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0C74 = bit_and(r0C68, body.constant(4026531840u));
+ ir_expression *const r0C75 = equal(r0C74, body.constant(0u));
+ ir_if *f0C73 = new(mem_ctx) ir_if(operand(r0C75).val);
+ exec_list *const f0C73_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0C73->then_instructions;
+
+ body.emit(assign(r0C6A, add(r0C6A, body.constant(4u)), 0x01));
+
+ body.emit(assign(r0C68, lshift(r0C68, body.constant(int(4))), 0x01));
+
+
+ body.instructions = f0C73_parent_instructions;
+ body.emit(f0C73);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0C77 = bit_and(r0C68, body.constant(3221225472u));
+ ir_expression *const r0C78 = equal(r0C77, body.constant(0u));
+ ir_if *f0C76 = new(mem_ctx) ir_if(operand(r0C78).val);
+ exec_list *const f0C76_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0C76->then_instructions;
+
+ body.emit(assign(r0C6A, add(r0C6A, body.constant(2u)), 0x01));
+
+ body.emit(assign(r0C68, lshift(r0C68, body.constant(int(2))), 0x01));
+
+
+ body.instructions = f0C76_parent_instructions;
+ body.emit(f0C76);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0C7A = bit_and(r0C68, body.constant(2147483648u));
+ ir_expression *const r0C7B = equal(r0C7A, body.constant(0u));
+ ir_if *f0C79 = new(mem_ctx) ir_if(operand(r0C7B).val);
+ exec_list *const f0C79_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0C79->then_instructions;
+
+ body.emit(assign(r0C6A, add(r0C6A, body.constant(1u)), 0x01));
+
+
+ body.instructions = f0C79_parent_instructions;
+ body.emit(f0C79);
+
+ /* END IF */
+
+ body.emit(assign(r0C69, r0C6A, 0x01));
+
+
+ body.instructions = f0C6B_parent_instructions;
+ body.emit(f0C6B);
+
+ /* END IF */
+
+ ir_expression *const r0C7C = expr(ir_unop_u2i, r0C69);
+ body.emit(assign(r0C65, add(r0C7C, body.constant(int(-11))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0C7E = lequal(body.constant(int(0)), r0C65);
+ ir_if *f0C7D = new(mem_ctx) ir_if(operand(r0C7E).val);
+ exec_list *const f0C7D_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0C7D->then_instructions;
+
+ body.emit(assign(r0C64, body.constant(0u), 0x01));
+
+ ir_variable *const r0C7F = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r0C7F, lshift(r0C63, r0C65), 0x01));
+
+ ir_variable *const r0C80 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0C82 = equal(r0C65, body.constant(int(0)));
+ ir_if *f0C81 = new(mem_ctx) ir_if(operand(r0C82).val);
+ exec_list *const f0C81_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0C81->then_instructions;
+
+ body.emit(assign(r0C80, r0C62, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0C81->else_instructions;
+
+ ir_expression *const r0C83 = lshift(r0C62, r0C65);
+ ir_expression *const r0C84 = neg(r0C65);
+ ir_expression *const r0C85 = bit_and(r0C84, body.constant(int(31)));
+ ir_expression *const r0C86 = rshift(r0C63, r0C85);
+ body.emit(assign(r0C80, bit_or(r0C83, r0C86), 0x01));
+
+
+ body.instructions = f0C81_parent_instructions;
+ body.emit(f0C81);
+
+ /* END IF */
+
+ body.emit(assign(r0C62, r0C80, 0x01));
+
+ body.emit(assign(r0C63, r0C7F, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0C7D->else_instructions;
+
+ ir_variable *const r0C87 = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r0C87, body.constant(0u), 0x01));
+
+ ir_variable *const r0C88 = body.make_temp(glsl_type::int_type, "count");
+ body.emit(assign(r0C88, neg(r0C65), 0x01));
+
+ ir_variable *const r0C89 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r0C89);
+ ir_variable *const r0C8A = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0C8A);
+ ir_variable *const r0C8B = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r0C8B);
+ ir_variable *const r0C8C = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r0C8D = neg(r0C88);
+ body.emit(assign(r0C8C, bit_and(r0C8D, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0C8F = equal(r0C88, body.constant(int(0)));
+ ir_if *f0C8E = new(mem_ctx) ir_if(operand(r0C8F).val);
+ exec_list *const f0C8E_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0C8E->then_instructions;
+
+ body.emit(assign(r0C89, r0C87, 0x01));
+
+ body.emit(assign(r0C8A, r0C63, 0x01));
+
+ body.emit(assign(r0C8B, r0C62, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0C8E->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0C91 = less(r0C88, body.constant(int(32)));
+ ir_if *f0C90 = new(mem_ctx) ir_if(operand(r0C91).val);
+ exec_list *const f0C90_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0C90->then_instructions;
+
+ body.emit(assign(r0C89, lshift(r0C63, r0C8C), 0x01));
+
+ ir_expression *const r0C92 = lshift(r0C62, r0C8C);
+ ir_expression *const r0C93 = rshift(r0C63, r0C88);
+ body.emit(assign(r0C8A, bit_or(r0C92, r0C93), 0x01));
+
+ body.emit(assign(r0C8B, rshift(r0C62, r0C88), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0C90->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0C95 = equal(r0C88, body.constant(int(32)));
+ ir_if *f0C94 = new(mem_ctx) ir_if(operand(r0C95).val);
+ exec_list *const f0C94_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0C94->then_instructions;
+
+ body.emit(assign(r0C89, r0C63, 0x01));
+
+ body.emit(assign(r0C8A, r0C62, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0C94->else_instructions;
+
+ body.emit(assign(r0C87, bit_or(body.constant(0u), r0C63), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0C97 = less(r0C88, body.constant(int(64)));
+ ir_if *f0C96 = new(mem_ctx) ir_if(operand(r0C97).val);
+ exec_list *const f0C96_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0C96->then_instructions;
+
+ body.emit(assign(r0C89, lshift(r0C62, r0C8C), 0x01));
+
+ ir_expression *const r0C98 = bit_and(r0C88, body.constant(int(31)));
+ body.emit(assign(r0C8A, rshift(r0C62, r0C98), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0C96->else_instructions;
+
+ ir_variable *const r0C99 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0C9B = equal(r0C88, body.constant(int(64)));
+ ir_if *f0C9A = new(mem_ctx) ir_if(operand(r0C9B).val);
+ exec_list *const f0C9A_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0C9A->then_instructions;
+
+ body.emit(assign(r0C99, r0C62, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0C9A->else_instructions;
+
+ ir_expression *const r0C9C = nequal(r0C62, body.constant(0u));
+ ir_expression *const r0C9D = expr(ir_unop_b2i, r0C9C);
+ body.emit(assign(r0C99, expr(ir_unop_i2u, r0C9D), 0x01));
+
+
+ body.instructions = f0C9A_parent_instructions;
+ body.emit(f0C9A);
+
+ /* END IF */
+
+ body.emit(assign(r0C89, r0C99, 0x01));
+
+ body.emit(assign(r0C8A, body.constant(0u), 0x01));
+
+
+ body.instructions = f0C96_parent_instructions;
+ body.emit(f0C96);
+
+ /* END IF */
+
+
+ body.instructions = f0C94_parent_instructions;
+ body.emit(f0C94);
+
+ /* END IF */
+
+ body.emit(assign(r0C8B, body.constant(0u), 0x01));
+
+
+ body.instructions = f0C90_parent_instructions;
+ body.emit(f0C90);
+
+ /* END IF */
+
+ ir_expression *const r0C9E = nequal(r0C87, body.constant(0u));
+ ir_expression *const r0C9F = expr(ir_unop_b2i, r0C9E);
+ ir_expression *const r0CA0 = expr(ir_unop_i2u, r0C9F);
+ body.emit(assign(r0C89, bit_or(r0C89, r0CA0), 0x01));
+
+
+ body.instructions = f0C8E_parent_instructions;
+ body.emit(f0C8E);
+
+ /* END IF */
+
+ body.emit(assign(r0C62, r0C8B, 0x01));
+
+ body.emit(assign(r0C63, r0C8A, 0x01));
+
+ body.emit(assign(r0C64, r0C89, 0x01));
+
+
+ body.instructions = f0C7D_parent_instructions;
+ body.emit(f0C7D);
+
+ /* END IF */
+
+ ir_expression *const r0CA1 = expr(ir_unop_i2u, r0C65);
+ body.emit(assign(r0C61, sub(r0C61, r0CA1), 0x01));
+
+ ir_variable *const r0CA2 = body.make_temp(glsl_type::uint_type, "zExp");
+ body.emit(assign(r0CA2, r0C61, 0x01));
+
+ ir_variable *const r0CA3 = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r0CA3, r0C62, 0x01));
+
+ ir_variable *const r0CA4 = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r0CA4, r0C63, 0x01));
+
+ ir_variable *const r0CA5 = body.make_temp(glsl_type::uint_type, "zFrac2");
+ body.emit(assign(r0CA5, r0C64, 0x01));
+
+ ir_variable *const r0CA6 = body.make_temp(glsl_type::bool_type, "execute_flag");
+ body.emit(assign(r0CA6, body.constant(true), 0x01));
+
+ ir_variable *const r0CA7 = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r0CA8 = new(mem_ctx) ir_variable(glsl_type::uint_type, "increment", ir_var_auto);
+ body.emit(r0CA8);
+ ir_expression *const r0CA9 = less(r0C64, body.constant(0u));
+ ir_expression *const r0CAA = expr(ir_unop_b2i, r0CA9);
+ body.emit(assign(r0CA8, expr(ir_unop_i2u, r0CAA), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0CAC = lequal(body.constant(2045u), r0C61);
+ ir_if *f0CAB = new(mem_ctx) ir_if(operand(r0CAC).val);
+ exec_list *const f0CAB_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0CAB->then_instructions;
+
+ ir_variable *const r0CAD = body.make_temp(glsl_type::bool_type, "or_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0CAF = less(body.constant(2045u), r0C61);
+ ir_if *f0CAE = new(mem_ctx) ir_if(operand(r0CAF).val);
+ exec_list *const f0CAE_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0CAE->then_instructions;
+
+ body.emit(assign(r0CAD, body.constant(true), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0CAE->else_instructions;
+
+ ir_variable *const r0CB0 = body.make_temp(glsl_type::bool_type, "and_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0CB2 = equal(r0C61, body.constant(2045u));
+ ir_if *f0CB1 = new(mem_ctx) ir_if(operand(r0CB2).val);
+ exec_list *const f0CB1_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0CB1->then_instructions;
+
+ ir_expression *const r0CB3 = equal(body.constant(2097151u), r0C62);
+ ir_expression *const r0CB4 = equal(body.constant(4294967295u), r0C63);
+ body.emit(assign(r0CB0, logic_and(r0CB3, r0CB4), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0CB1->else_instructions;
+
+ body.emit(assign(r0CB0, body.constant(false), 0x01));
+
+
+ body.instructions = f0CB1_parent_instructions;
+ body.emit(f0CB1);
+
+ /* END IF */
+
+ ir_expression *const r0CB5 = nequal(r0CA8, body.constant(0u));
+ body.emit(assign(r0CAD, logic_and(r0CB0, r0CB5), 0x01));
+
+
+ body.instructions = f0CAE_parent_instructions;
+ body.emit(f0CAE);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f0CB6 = new(mem_ctx) ir_if(operand(r0CAD).val);
+ exec_list *const f0CB6_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0CB6->then_instructions;
+
+ ir_variable *const r0CB7 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r0CB7);
+ ir_expression *const r0CB8 = lshift(r09D5, body.constant(int(31)));
+ body.emit(assign(r0CB7, add(r0CB8, body.constant(2146435072u)), 0x01));
+
+ body.emit(assign(r0CB7, body.constant(0u), 0x02));
+
+ body.emit(assign(r0CA7, r0CB7, 0x03));
+
+ body.emit(assign(r0CA6, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0CB6->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0CBA = less(r0C61, body.constant(0u));
+ ir_if *f0CB9 = new(mem_ctx) ir_if(operand(r0CBA).val);
+ exec_list *const f0CB9_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0CB9->then_instructions;
+
+ ir_variable *const r0CBB = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r0CBB, r0C64, 0x01));
+
+ ir_variable *const r0CBC = body.make_temp(glsl_type::int_type, "count");
+ ir_expression *const r0CBD = neg(r0C61);
+ body.emit(assign(r0CBC, expr(ir_unop_u2i, r0CBD), 0x01));
+
+ ir_variable *const r0CBE = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r0CBE);
+ ir_variable *const r0CBF = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0CBF);
+ ir_variable *const r0CC0 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r0CC0);
+ ir_variable *const r0CC1 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r0CC2 = neg(r0CBC);
+ body.emit(assign(r0CC1, bit_and(r0CC2, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0CC4 = equal(r0CBC, body.constant(int(0)));
+ ir_if *f0CC3 = new(mem_ctx) ir_if(operand(r0CC4).val);
+ exec_list *const f0CC3_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0CC3->then_instructions;
+
+ body.emit(assign(r0CBE, r0C64, 0x01));
+
+ body.emit(assign(r0CBF, r0C63, 0x01));
+
+ body.emit(assign(r0CC0, r0C62, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0CC3->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0CC6 = less(r0CBC, body.constant(int(32)));
+ ir_if *f0CC5 = new(mem_ctx) ir_if(operand(r0CC6).val);
+ exec_list *const f0CC5_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0CC5->then_instructions;
+
+ body.emit(assign(r0CBE, lshift(r0C63, r0CC1), 0x01));
+
+ ir_expression *const r0CC7 = lshift(r0C62, r0CC1);
+ ir_expression *const r0CC8 = rshift(r0C63, r0CBC);
+ body.emit(assign(r0CBF, bit_or(r0CC7, r0CC8), 0x01));
+
+ body.emit(assign(r0CC0, rshift(r0C62, r0CBC), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0CC5->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0CCA = equal(r0CBC, body.constant(int(32)));
+ ir_if *f0CC9 = new(mem_ctx) ir_if(operand(r0CCA).val);
+ exec_list *const f0CC9_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0CC9->then_instructions;
+
+ body.emit(assign(r0CBE, r0C63, 0x01));
+
+ body.emit(assign(r0CBF, r0C62, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0CC9->else_instructions;
+
+ body.emit(assign(r0CBB, bit_or(r0C64, r0C63), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0CCC = less(r0CBC, body.constant(int(64)));
+ ir_if *f0CCB = new(mem_ctx) ir_if(operand(r0CCC).val);
+ exec_list *const f0CCB_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0CCB->then_instructions;
+
+ body.emit(assign(r0CBE, lshift(r0C62, r0CC1), 0x01));
+
+ ir_expression *const r0CCD = bit_and(r0CBC, body.constant(int(31)));
+ body.emit(assign(r0CBF, rshift(r0C62, r0CCD), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0CCB->else_instructions;
+
+ ir_variable *const r0CCE = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0CD0 = equal(r0CBC, body.constant(int(64)));
+ ir_if *f0CCF = new(mem_ctx) ir_if(operand(r0CD0).val);
+ exec_list *const f0CCF_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0CCF->then_instructions;
+
+ body.emit(assign(r0CCE, r0C62, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0CCF->else_instructions;
+
+ ir_expression *const r0CD1 = nequal(r0C62, body.constant(0u));
+ ir_expression *const r0CD2 = expr(ir_unop_b2i, r0CD1);
+ body.emit(assign(r0CCE, expr(ir_unop_i2u, r0CD2), 0x01));
+
+
+ body.instructions = f0CCF_parent_instructions;
+ body.emit(f0CCF);
+
+ /* END IF */
+
+ body.emit(assign(r0CBE, r0CCE, 0x01));
+
+ body.emit(assign(r0CBF, body.constant(0u), 0x01));
+
+
+ body.instructions = f0CCB_parent_instructions;
+ body.emit(f0CCB);
+
+ /* END IF */
+
+
+ body.instructions = f0CC9_parent_instructions;
+ body.emit(f0CC9);
+
+ /* END IF */
+
+ body.emit(assign(r0CC0, body.constant(0u), 0x01));
+
+
+ body.instructions = f0CC5_parent_instructions;
+ body.emit(f0CC5);
+
+ /* END IF */
+
+ ir_expression *const r0CD3 = nequal(r0CBB, body.constant(0u));
+ ir_expression *const r0CD4 = expr(ir_unop_b2i, r0CD3);
+ ir_expression *const r0CD5 = expr(ir_unop_i2u, r0CD4);
+ body.emit(assign(r0CBE, bit_or(r0CBE, r0CD5), 0x01));
+
+
+ body.instructions = f0CC3_parent_instructions;
+ body.emit(f0CC3);
+
+ /* END IF */
+
+ body.emit(assign(r0CA3, r0CC0, 0x01));
+
+ body.emit(assign(r0CA4, r0CBF, 0x01));
+
+ body.emit(assign(r0CA5, r0CBE, 0x01));
+
+ body.emit(assign(r0CA2, body.constant(0u), 0x01));
+
+ ir_expression *const r0CD6 = less(r0CBE, body.constant(0u));
+ ir_expression *const r0CD7 = expr(ir_unop_b2i, r0CD6);
+ body.emit(assign(r0CA8, expr(ir_unop_i2u, r0CD7), 0x01));
+
+
+ body.instructions = f0CB9_parent_instructions;
+ body.emit(f0CB9);
+
+ /* END IF */
+
+
+ body.instructions = f0CB6_parent_instructions;
+ body.emit(f0CB6);
+
+ /* END IF */
+
+
+ body.instructions = f0CAB_parent_instructions;
+ body.emit(f0CAB);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f0CD8 = new(mem_ctx) ir_if(operand(r0CA6).val);
+ exec_list *const f0CD8_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0CD8->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0CDA = nequal(r0CA8, body.constant(0u));
+ ir_if *f0CD9 = new(mem_ctx) ir_if(operand(r0CDA).val);
+ exec_list *const f0CD9_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0CD9->then_instructions;
+
+ ir_variable *const r0CDB = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0CDB);
+ body.emit(assign(r0CDB, add(r0CA4, body.constant(1u)), 0x01));
+
+ ir_expression *const r0CDC = less(r0CDB, r0CA4);
+ ir_expression *const r0CDD = expr(ir_unop_b2i, r0CDC);
+ ir_expression *const r0CDE = expr(ir_unop_i2u, r0CDD);
+ body.emit(assign(r0CA3, add(r0CA3, r0CDE), 0x01));
+
+ ir_expression *const r0CDF = neg(r0CA5);
+ ir_expression *const r0CE0 = equal(r0CA5, r0CDF);
+ ir_expression *const r0CE1 = expr(ir_unop_b2i, r0CE0);
+ ir_expression *const r0CE2 = expr(ir_unop_i2u, r0CE1);
+ ir_expression *const r0CE3 = bit_and(r0CE2, body.constant(1u));
+ ir_expression *const r0CE4 = expr(ir_unop_bit_not, r0CE3);
+ body.emit(assign(r0CA4, bit_and(r0CDB, r0CE4), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0CD9->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0CE6 = bit_or(r0CA3, r0CA4);
+ ir_expression *const r0CE7 = equal(r0CE6, body.constant(0u));
+ ir_if *f0CE5 = new(mem_ctx) ir_if(operand(r0CE7).val);
+ exec_list *const f0CE5_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0CE5->then_instructions;
+
+ body.emit(assign(r0CA2, body.constant(0u), 0x01));
+
+
+ body.instructions = f0CE5_parent_instructions;
+ body.emit(f0CE5);
+
+ /* END IF */
+
+
+ body.instructions = f0CD9_parent_instructions;
+ body.emit(f0CD9);
+
+ /* END IF */
+
+ ir_variable *const r0CE8 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r0CE8);
+ ir_expression *const r0CE9 = lshift(r09D5, body.constant(int(31)));
+ ir_expression *const r0CEA = lshift(r0CA2, body.constant(int(20)));
+ ir_expression *const r0CEB = add(r0CE9, r0CEA);
+ body.emit(assign(r0CE8, add(r0CEB, r0CA3), 0x01));
+
+ body.emit(assign(r0CE8, r0CA4, 0x02));
+
+ body.emit(assign(r0CA7, r0CE8, 0x03));
+
+ body.emit(assign(r0CA6, body.constant(false), 0x01));
+
+
+ body.instructions = f0CD8_parent_instructions;
+ body.emit(f0CD8);
+
+ /* END IF */
+
+ body.emit(assign(r09D6, r0CA7, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0C59->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0CED = less(swizzle_y(r09DB), swizzle_y(r09DC));
+ ir_if *f0CEC = new(mem_ctx) ir_if(operand(r0CED).val);
+ exec_list *const f0CEC_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0CEC->then_instructions;
+
+ ir_variable *const r0CEE = body.make_temp(glsl_type::uint_type, "z0Ptr");
+ ir_variable *const r0CEF = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r0CEF, sub(swizzle_y(r09DC), swizzle_y(r09DB)), 0x01));
+
+ ir_expression *const r0CF0 = sub(swizzle_x(r09DC), swizzle_x(r09DB));
+ ir_expression *const r0CF1 = less(swizzle_y(r09DC), swizzle_y(r09DB));
+ ir_expression *const r0CF2 = expr(ir_unop_b2i, r0CF1);
+ ir_expression *const r0CF3 = expr(ir_unop_i2u, r0CF2);
+ body.emit(assign(r0CEE, sub(r0CF0, r0CF3), 0x01));
+
+ body.emit(assign(r09D8, add(r09DA, body.constant(4294967295u)), 0x01));
+
+ ir_variable *const r0CF4 = body.make_temp(glsl_type::uint_type, "zExp");
+ body.emit(assign(r0CF4, add(r09D8, body.constant(4294967286u)), 0x01));
+
+ ir_variable *const r0CF5 = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r0CF5, r0CEE, 0x01));
+
+ ir_variable *const r0CF6 = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r0CF6, r0CEF, 0x01));
+
+ ir_variable *const r0CF7 = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac2", ir_var_auto);
+ body.emit(r0CF7);
+ ir_variable *const r0CF8 = new(mem_ctx) ir_variable(glsl_type::int_type, "shiftCount", ir_var_auto);
+ body.emit(r0CF8);
+ /* IF CONDITION */
+ ir_expression *const r0CFA = equal(r0CEE, body.constant(0u));
+ ir_if *f0CF9 = new(mem_ctx) ir_if(operand(r0CFA).val);
+ exec_list *const f0CF9_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0CF9->then_instructions;
+
+ body.emit(assign(r0CF5, r0CEF, 0x01));
+
+ body.emit(assign(r0CF6, body.constant(0u), 0x01));
+
+ body.emit(assign(r0CF4, add(r0CF4, body.constant(4294967264u)), 0x01));
+
+
+ body.instructions = f0CF9_parent_instructions;
+ body.emit(f0CF9);
+
+ /* END IF */
+
+ ir_variable *const r0CFB = body.make_temp(glsl_type::uint_type, "a");
+ body.emit(assign(r0CFB, r0CF5, 0x01));
+
+ ir_variable *const r0CFC = body.make_temp(glsl_type::uint_type, "return_value");
+ ir_variable *const r0CFD = new(mem_ctx) ir_variable(glsl_type::uint_type, "shiftCount", ir_var_auto);
+ body.emit(r0CFD);
+ /* IF CONDITION */
+ ir_expression *const r0CFF = equal(r0CF5, body.constant(0u));
+ ir_if *f0CFE = new(mem_ctx) ir_if(operand(r0CFF).val);
+ exec_list *const f0CFE_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0CFE->then_instructions;
+
+ body.emit(assign(r0CFC, body.constant(32u), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0CFE->else_instructions;
+
+ body.emit(assign(r0CFD, body.constant(0u), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0D01 = bit_and(r0CF5, body.constant(4294901760u));
+ ir_expression *const r0D02 = equal(r0D01, body.constant(0u));
+ ir_if *f0D00 = new(mem_ctx) ir_if(operand(r0D02).val);
+ exec_list *const f0D00_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D00->then_instructions;
+
+ body.emit(assign(r0CFD, body.constant(16u), 0x01));
+
+ body.emit(assign(r0CFB, lshift(r0CF5, body.constant(int(16))), 0x01));
+
+
+ body.instructions = f0D00_parent_instructions;
+ body.emit(f0D00);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0D04 = bit_and(r0CFB, body.constant(4278190080u));
+ ir_expression *const r0D05 = equal(r0D04, body.constant(0u));
+ ir_if *f0D03 = new(mem_ctx) ir_if(operand(r0D05).val);
+ exec_list *const f0D03_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D03->then_instructions;
+
+ body.emit(assign(r0CFD, add(r0CFD, body.constant(8u)), 0x01));
+
+ body.emit(assign(r0CFB, lshift(r0CFB, body.constant(int(8))), 0x01));
+
+
+ body.instructions = f0D03_parent_instructions;
+ body.emit(f0D03);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0D07 = bit_and(r0CFB, body.constant(4026531840u));
+ ir_expression *const r0D08 = equal(r0D07, body.constant(0u));
+ ir_if *f0D06 = new(mem_ctx) ir_if(operand(r0D08).val);
+ exec_list *const f0D06_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D06->then_instructions;
+
+ body.emit(assign(r0CFD, add(r0CFD, body.constant(4u)), 0x01));
+
+ body.emit(assign(r0CFB, lshift(r0CFB, body.constant(int(4))), 0x01));
+
+
+ body.instructions = f0D06_parent_instructions;
+ body.emit(f0D06);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0D0A = bit_and(r0CFB, body.constant(3221225472u));
+ ir_expression *const r0D0B = equal(r0D0A, body.constant(0u));
+ ir_if *f0D09 = new(mem_ctx) ir_if(operand(r0D0B).val);
+ exec_list *const f0D09_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D09->then_instructions;
+
+ body.emit(assign(r0CFD, add(r0CFD, body.constant(2u)), 0x01));
+
+ body.emit(assign(r0CFB, lshift(r0CFB, body.constant(int(2))), 0x01));
+
+
+ body.instructions = f0D09_parent_instructions;
+ body.emit(f0D09);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0D0D = bit_and(r0CFB, body.constant(2147483648u));
+ ir_expression *const r0D0E = equal(r0D0D, body.constant(0u));
+ ir_if *f0D0C = new(mem_ctx) ir_if(operand(r0D0E).val);
+ exec_list *const f0D0C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D0C->then_instructions;
+
+ body.emit(assign(r0CFD, add(r0CFD, body.constant(1u)), 0x01));
+
+
+ body.instructions = f0D0C_parent_instructions;
+ body.emit(f0D0C);
+
+ /* END IF */
+
+ body.emit(assign(r0CFC, r0CFD, 0x01));
+
+
+ body.instructions = f0CFE_parent_instructions;
+ body.emit(f0CFE);
+
+ /* END IF */
+
+ ir_expression *const r0D0F = expr(ir_unop_u2i, r0CFC);
+ body.emit(assign(r0CF8, add(r0D0F, body.constant(int(-11))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0D11 = lequal(body.constant(int(0)), r0CF8);
+ ir_if *f0D10 = new(mem_ctx) ir_if(operand(r0D11).val);
+ exec_list *const f0D10_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D10->then_instructions;
+
+ body.emit(assign(r0CF7, body.constant(0u), 0x01));
+
+ ir_variable *const r0D12 = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r0D12, lshift(r0CF6, r0CF8), 0x01));
+
+ ir_variable *const r0D13 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0D15 = equal(r0CF8, body.constant(int(0)));
+ ir_if *f0D14 = new(mem_ctx) ir_if(operand(r0D15).val);
+ exec_list *const f0D14_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D14->then_instructions;
+
+ body.emit(assign(r0D13, r0CF5, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0D14->else_instructions;
+
+ ir_expression *const r0D16 = lshift(r0CF5, r0CF8);
+ ir_expression *const r0D17 = neg(r0CF8);
+ ir_expression *const r0D18 = bit_and(r0D17, body.constant(int(31)));
+ ir_expression *const r0D19 = rshift(r0CF6, r0D18);
+ body.emit(assign(r0D13, bit_or(r0D16, r0D19), 0x01));
+
+
+ body.instructions = f0D14_parent_instructions;
+ body.emit(f0D14);
+
+ /* END IF */
+
+ body.emit(assign(r0CF5, r0D13, 0x01));
+
+ body.emit(assign(r0CF6, r0D12, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0D10->else_instructions;
+
+ ir_variable *const r0D1A = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r0D1A, body.constant(0u), 0x01));
+
+ ir_variable *const r0D1B = body.make_temp(glsl_type::int_type, "count");
+ body.emit(assign(r0D1B, neg(r0CF8), 0x01));
+
+ ir_variable *const r0D1C = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r0D1C);
+ ir_variable *const r0D1D = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0D1D);
+ ir_variable *const r0D1E = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r0D1E);
+ ir_variable *const r0D1F = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r0D20 = neg(r0D1B);
+ body.emit(assign(r0D1F, bit_and(r0D20, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0D22 = equal(r0D1B, body.constant(int(0)));
+ ir_if *f0D21 = new(mem_ctx) ir_if(operand(r0D22).val);
+ exec_list *const f0D21_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D21->then_instructions;
+
+ body.emit(assign(r0D1C, r0D1A, 0x01));
+
+ body.emit(assign(r0D1D, r0CF6, 0x01));
+
+ body.emit(assign(r0D1E, r0CF5, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0D21->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0D24 = less(r0D1B, body.constant(int(32)));
+ ir_if *f0D23 = new(mem_ctx) ir_if(operand(r0D24).val);
+ exec_list *const f0D23_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D23->then_instructions;
+
+ body.emit(assign(r0D1C, lshift(r0CF6, r0D1F), 0x01));
+
+ ir_expression *const r0D25 = lshift(r0CF5, r0D1F);
+ ir_expression *const r0D26 = rshift(r0CF6, r0D1B);
+ body.emit(assign(r0D1D, bit_or(r0D25, r0D26), 0x01));
+
+ body.emit(assign(r0D1E, rshift(r0CF5, r0D1B), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0D23->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0D28 = equal(r0D1B, body.constant(int(32)));
+ ir_if *f0D27 = new(mem_ctx) ir_if(operand(r0D28).val);
+ exec_list *const f0D27_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D27->then_instructions;
+
+ body.emit(assign(r0D1C, r0CF6, 0x01));
+
+ body.emit(assign(r0D1D, r0CF5, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0D27->else_instructions;
+
+ body.emit(assign(r0D1A, bit_or(body.constant(0u), r0CF6), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0D2A = less(r0D1B, body.constant(int(64)));
+ ir_if *f0D29 = new(mem_ctx) ir_if(operand(r0D2A).val);
+ exec_list *const f0D29_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D29->then_instructions;
+
+ body.emit(assign(r0D1C, lshift(r0CF5, r0D1F), 0x01));
+
+ ir_expression *const r0D2B = bit_and(r0D1B, body.constant(int(31)));
+ body.emit(assign(r0D1D, rshift(r0CF5, r0D2B), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0D29->else_instructions;
+
+ ir_variable *const r0D2C = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0D2E = equal(r0D1B, body.constant(int(64)));
+ ir_if *f0D2D = new(mem_ctx) ir_if(operand(r0D2E).val);
+ exec_list *const f0D2D_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D2D->then_instructions;
+
+ body.emit(assign(r0D2C, r0CF5, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0D2D->else_instructions;
+
+ ir_expression *const r0D2F = nequal(r0CF5, body.constant(0u));
+ ir_expression *const r0D30 = expr(ir_unop_b2i, r0D2F);
+ body.emit(assign(r0D2C, expr(ir_unop_i2u, r0D30), 0x01));
+
+
+ body.instructions = f0D2D_parent_instructions;
+ body.emit(f0D2D);
+
+ /* END IF */
+
+ body.emit(assign(r0D1C, r0D2C, 0x01));
+
+ body.emit(assign(r0D1D, body.constant(0u), 0x01));
+
+
+ body.instructions = f0D29_parent_instructions;
+ body.emit(f0D29);
+
+ /* END IF */
+
+
+ body.instructions = f0D27_parent_instructions;
+ body.emit(f0D27);
+
+ /* END IF */
+
+ body.emit(assign(r0D1E, body.constant(0u), 0x01));
+
+
+ body.instructions = f0D23_parent_instructions;
+ body.emit(f0D23);
+
+ /* END IF */
+
+ ir_expression *const r0D31 = nequal(r0D1A, body.constant(0u));
+ ir_expression *const r0D32 = expr(ir_unop_b2i, r0D31);
+ ir_expression *const r0D33 = expr(ir_unop_i2u, r0D32);
+ body.emit(assign(r0D1C, bit_or(r0D1C, r0D33), 0x01));
+
+
+ body.instructions = f0D21_parent_instructions;
+ body.emit(f0D21);
+
+ /* END IF */
+
+ body.emit(assign(r0CF5, r0D1E, 0x01));
+
+ body.emit(assign(r0CF6, r0D1D, 0x01));
+
+ body.emit(assign(r0CF7, r0D1C, 0x01));
+
+
+ body.instructions = f0D10_parent_instructions;
+ body.emit(f0D10);
+
+ /* END IF */
+
+ ir_expression *const r0D34 = expr(ir_unop_i2u, r0CF8);
+ body.emit(assign(r0CF4, sub(r0CF4, r0D34), 0x01));
+
+ ir_variable *const r0D35 = body.make_temp(glsl_type::uint_type, "zExp");
+ body.emit(assign(r0D35, r0CF4, 0x01));
+
+ ir_variable *const r0D36 = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r0D36, r0CF5, 0x01));
+
+ ir_variable *const r0D37 = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r0D37, r0CF6, 0x01));
+
+ ir_variable *const r0D38 = body.make_temp(glsl_type::uint_type, "zFrac2");
+ body.emit(assign(r0D38, r0CF7, 0x01));
+
+ ir_variable *const r0D39 = body.make_temp(glsl_type::bool_type, "execute_flag");
+ body.emit(assign(r0D39, body.constant(true), 0x01));
+
+ ir_variable *const r0D3A = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r0D3B = new(mem_ctx) ir_variable(glsl_type::uint_type, "increment", ir_var_auto);
+ body.emit(r0D3B);
+ ir_expression *const r0D3C = less(r0CF7, body.constant(0u));
+ ir_expression *const r0D3D = expr(ir_unop_b2i, r0D3C);
+ body.emit(assign(r0D3B, expr(ir_unop_i2u, r0D3D), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0D3F = lequal(body.constant(2045u), r0CF4);
+ ir_if *f0D3E = new(mem_ctx) ir_if(operand(r0D3F).val);
+ exec_list *const f0D3E_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D3E->then_instructions;
+
+ ir_variable *const r0D40 = body.make_temp(glsl_type::bool_type, "or_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0D42 = less(body.constant(2045u), r0CF4);
+ ir_if *f0D41 = new(mem_ctx) ir_if(operand(r0D42).val);
+ exec_list *const f0D41_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D41->then_instructions;
+
+ body.emit(assign(r0D40, body.constant(true), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0D41->else_instructions;
+
+ ir_variable *const r0D43 = body.make_temp(glsl_type::bool_type, "and_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0D45 = equal(r0CF4, body.constant(2045u));
+ ir_if *f0D44 = new(mem_ctx) ir_if(operand(r0D45).val);
+ exec_list *const f0D44_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D44->then_instructions;
+
+ ir_expression *const r0D46 = equal(body.constant(2097151u), r0CF5);
+ ir_expression *const r0D47 = equal(body.constant(4294967295u), r0CF6);
+ body.emit(assign(r0D43, logic_and(r0D46, r0D47), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0D44->else_instructions;
+
+ body.emit(assign(r0D43, body.constant(false), 0x01));
+
+
+ body.instructions = f0D44_parent_instructions;
+ body.emit(f0D44);
+
+ /* END IF */
+
+ ir_expression *const r0D48 = nequal(r0D3B, body.constant(0u));
+ body.emit(assign(r0D40, logic_and(r0D43, r0D48), 0x01));
+
+
+ body.instructions = f0D41_parent_instructions;
+ body.emit(f0D41);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f0D49 = new(mem_ctx) ir_if(operand(r0D40).val);
+ exec_list *const f0D49_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D49->then_instructions;
+
+ ir_variable *const r0D4A = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r0D4A);
+ ir_expression *const r0D4B = lshift(r09D5, body.constant(int(31)));
+ body.emit(assign(r0D4A, add(r0D4B, body.constant(2146435072u)), 0x01));
+
+ body.emit(assign(r0D4A, body.constant(0u), 0x02));
+
+ body.emit(assign(r0D3A, r0D4A, 0x03));
+
+ body.emit(assign(r0D39, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0D49->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0D4D = less(r0CF4, body.constant(0u));
+ ir_if *f0D4C = new(mem_ctx) ir_if(operand(r0D4D).val);
+ exec_list *const f0D4C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D4C->then_instructions;
+
+ ir_variable *const r0D4E = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r0D4E, r0CF7, 0x01));
+
+ ir_variable *const r0D4F = body.make_temp(glsl_type::int_type, "count");
+ ir_expression *const r0D50 = neg(r0CF4);
+ body.emit(assign(r0D4F, expr(ir_unop_u2i, r0D50), 0x01));
+
+ ir_variable *const r0D51 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r0D51);
+ ir_variable *const r0D52 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0D52);
+ ir_variable *const r0D53 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r0D53);
+ ir_variable *const r0D54 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r0D55 = neg(r0D4F);
+ body.emit(assign(r0D54, bit_and(r0D55, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0D57 = equal(r0D4F, body.constant(int(0)));
+ ir_if *f0D56 = new(mem_ctx) ir_if(operand(r0D57).val);
+ exec_list *const f0D56_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D56->then_instructions;
+
+ body.emit(assign(r0D51, r0CF7, 0x01));
+
+ body.emit(assign(r0D52, r0CF6, 0x01));
+
+ body.emit(assign(r0D53, r0CF5, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0D56->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0D59 = less(r0D4F, body.constant(int(32)));
+ ir_if *f0D58 = new(mem_ctx) ir_if(operand(r0D59).val);
+ exec_list *const f0D58_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D58->then_instructions;
+
+ body.emit(assign(r0D51, lshift(r0CF6, r0D54), 0x01));
+
+ ir_expression *const r0D5A = lshift(r0CF5, r0D54);
+ ir_expression *const r0D5B = rshift(r0CF6, r0D4F);
+ body.emit(assign(r0D52, bit_or(r0D5A, r0D5B), 0x01));
+
+ body.emit(assign(r0D53, rshift(r0CF5, r0D4F), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0D58->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0D5D = equal(r0D4F, body.constant(int(32)));
+ ir_if *f0D5C = new(mem_ctx) ir_if(operand(r0D5D).val);
+ exec_list *const f0D5C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D5C->then_instructions;
+
+ body.emit(assign(r0D51, r0CF6, 0x01));
+
+ body.emit(assign(r0D52, r0CF5, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0D5C->else_instructions;
+
+ body.emit(assign(r0D4E, bit_or(r0CF7, r0CF6), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0D5F = less(r0D4F, body.constant(int(64)));
+ ir_if *f0D5E = new(mem_ctx) ir_if(operand(r0D5F).val);
+ exec_list *const f0D5E_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D5E->then_instructions;
+
+ body.emit(assign(r0D51, lshift(r0CF5, r0D54), 0x01));
+
+ ir_expression *const r0D60 = bit_and(r0D4F, body.constant(int(31)));
+ body.emit(assign(r0D52, rshift(r0CF5, r0D60), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0D5E->else_instructions;
+
+ ir_variable *const r0D61 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0D63 = equal(r0D4F, body.constant(int(64)));
+ ir_if *f0D62 = new(mem_ctx) ir_if(operand(r0D63).val);
+ exec_list *const f0D62_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D62->then_instructions;
+
+ body.emit(assign(r0D61, r0CF5, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0D62->else_instructions;
+
+ ir_expression *const r0D64 = nequal(r0CF5, body.constant(0u));
+ ir_expression *const r0D65 = expr(ir_unop_b2i, r0D64);
+ body.emit(assign(r0D61, expr(ir_unop_i2u, r0D65), 0x01));
+
+
+ body.instructions = f0D62_parent_instructions;
+ body.emit(f0D62);
+
+ /* END IF */
+
+ body.emit(assign(r0D51, r0D61, 0x01));
+
+ body.emit(assign(r0D52, body.constant(0u), 0x01));
+
+
+ body.instructions = f0D5E_parent_instructions;
+ body.emit(f0D5E);
+
+ /* END IF */
+
+
+ body.instructions = f0D5C_parent_instructions;
+ body.emit(f0D5C);
+
+ /* END IF */
+
+ body.emit(assign(r0D53, body.constant(0u), 0x01));
+
+
+ body.instructions = f0D58_parent_instructions;
+ body.emit(f0D58);
+
+ /* END IF */
+
+ ir_expression *const r0D66 = nequal(r0D4E, body.constant(0u));
+ ir_expression *const r0D67 = expr(ir_unop_b2i, r0D66);
+ ir_expression *const r0D68 = expr(ir_unop_i2u, r0D67);
+ body.emit(assign(r0D51, bit_or(r0D51, r0D68), 0x01));
+
+
+ body.instructions = f0D56_parent_instructions;
+ body.emit(f0D56);
+
+ /* END IF */
+
+ body.emit(assign(r0D36, r0D53, 0x01));
+
+ body.emit(assign(r0D37, r0D52, 0x01));
+
+ body.emit(assign(r0D38, r0D51, 0x01));
+
+ body.emit(assign(r0D35, body.constant(0u), 0x01));
+
+ ir_expression *const r0D69 = less(r0D51, body.constant(0u));
+ ir_expression *const r0D6A = expr(ir_unop_b2i, r0D69);
+ body.emit(assign(r0D3B, expr(ir_unop_i2u, r0D6A), 0x01));
+
+
+ body.instructions = f0D4C_parent_instructions;
+ body.emit(f0D4C);
+
+ /* END IF */
+
+
+ body.instructions = f0D49_parent_instructions;
+ body.emit(f0D49);
+
+ /* END IF */
+
+
+ body.instructions = f0D3E_parent_instructions;
+ body.emit(f0D3E);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f0D6B = new(mem_ctx) ir_if(operand(r0D39).val);
+ exec_list *const f0D6B_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D6B->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0D6D = nequal(r0D3B, body.constant(0u));
+ ir_if *f0D6C = new(mem_ctx) ir_if(operand(r0D6D).val);
+ exec_list *const f0D6C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D6C->then_instructions;
+
+ ir_variable *const r0D6E = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0D6E);
+ body.emit(assign(r0D6E, add(r0D37, body.constant(1u)), 0x01));
+
+ ir_expression *const r0D6F = less(r0D6E, r0D37);
+ ir_expression *const r0D70 = expr(ir_unop_b2i, r0D6F);
+ ir_expression *const r0D71 = expr(ir_unop_i2u, r0D70);
+ body.emit(assign(r0D36, add(r0D36, r0D71), 0x01));
+
+ ir_expression *const r0D72 = neg(r0D38);
+ ir_expression *const r0D73 = equal(r0D38, r0D72);
+ ir_expression *const r0D74 = expr(ir_unop_b2i, r0D73);
+ ir_expression *const r0D75 = expr(ir_unop_i2u, r0D74);
+ ir_expression *const r0D76 = bit_and(r0D75, body.constant(1u));
+ ir_expression *const r0D77 = expr(ir_unop_bit_not, r0D76);
+ body.emit(assign(r0D37, bit_and(r0D6E, r0D77), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0D6C->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0D79 = bit_or(r0D36, r0D37);
+ ir_expression *const r0D7A = equal(r0D79, body.constant(0u));
+ ir_if *f0D78 = new(mem_ctx) ir_if(operand(r0D7A).val);
+ exec_list *const f0D78_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D78->then_instructions;
+
+ body.emit(assign(r0D35, body.constant(0u), 0x01));
+
+
+ body.instructions = f0D78_parent_instructions;
+ body.emit(f0D78);
+
+ /* END IF */
+
+
+ body.instructions = f0D6C_parent_instructions;
+ body.emit(f0D6C);
+
+ /* END IF */
+
+ ir_variable *const r0D7B = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r0D7B);
+ ir_expression *const r0D7C = lshift(r09D5, body.constant(int(31)));
+ ir_expression *const r0D7D = lshift(r0D35, body.constant(int(20)));
+ ir_expression *const r0D7E = add(r0D7C, r0D7D);
+ body.emit(assign(r0D7B, add(r0D7E, r0D36), 0x01));
+
+ body.emit(assign(r0D7B, r0D37, 0x02));
+
+ body.emit(assign(r0D3A, r0D7B, 0x03));
+
+ body.emit(assign(r0D39, body.constant(false), 0x01));
+
+
+ body.instructions = f0D6B_parent_instructions;
+ body.emit(f0D6B);
+
+ /* END IF */
+
+ body.emit(assign(r09D6, r0D3A, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0CEC->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0D80 = less(swizzle_y(r09DC), swizzle_y(r09DB));
+ ir_if *f0D7F = new(mem_ctx) ir_if(operand(r0D80).val);
+ exec_list *const f0D7F_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D7F->then_instructions;
+
+ ir_variable *const r0D81 = body.make_temp(glsl_type::uint_type, "z0Ptr");
+ ir_variable *const r0D82 = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r0D82, sub(swizzle_y(r09DB), swizzle_y(r09DC)), 0x01));
+
+ ir_expression *const r0D83 = sub(swizzle_x(r09DB), swizzle_x(r09DC));
+ ir_expression *const r0D84 = less(swizzle_y(r09DB), swizzle_y(r09DC));
+ ir_expression *const r0D85 = expr(ir_unop_b2i, r0D84);
+ ir_expression *const r0D86 = expr(ir_unop_i2u, r0D85);
+ body.emit(assign(r0D81, sub(r0D83, r0D86), 0x01));
+
+ body.emit(assign(r09D5, bit_xor(r09D5, body.constant(1u)), 0x01));
+
+ body.emit(assign(r09D8, add(r09D9, body.constant(4294967295u)), 0x01));
+
+ ir_variable *const r0D87 = body.make_temp(glsl_type::uint_type, "zExp");
+ body.emit(assign(r0D87, add(r09D8, body.constant(4294967286u)), 0x01));
+
+ ir_variable *const r0D88 = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r0D88, r0D81, 0x01));
+
+ ir_variable *const r0D89 = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r0D89, r0D82, 0x01));
+
+ ir_variable *const r0D8A = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac2", ir_var_auto);
+ body.emit(r0D8A);
+ ir_variable *const r0D8B = new(mem_ctx) ir_variable(glsl_type::int_type, "shiftCount", ir_var_auto);
+ body.emit(r0D8B);
+ /* IF CONDITION */
+ ir_expression *const r0D8D = equal(r0D81, body.constant(0u));
+ ir_if *f0D8C = new(mem_ctx) ir_if(operand(r0D8D).val);
+ exec_list *const f0D8C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D8C->then_instructions;
+
+ body.emit(assign(r0D88, r0D82, 0x01));
+
+ body.emit(assign(r0D89, body.constant(0u), 0x01));
+
+ body.emit(assign(r0D87, add(r0D87, body.constant(4294967264u)), 0x01));
+
+
+ body.instructions = f0D8C_parent_instructions;
+ body.emit(f0D8C);
+
+ /* END IF */
+
+ ir_variable *const r0D8E = body.make_temp(glsl_type::uint_type, "a");
+ body.emit(assign(r0D8E, r0D88, 0x01));
+
+ ir_variable *const r0D8F = body.make_temp(glsl_type::uint_type, "return_value");
+ ir_variable *const r0D90 = new(mem_ctx) ir_variable(glsl_type::uint_type, "shiftCount", ir_var_auto);
+ body.emit(r0D90);
+ /* IF CONDITION */
+ ir_expression *const r0D92 = equal(r0D88, body.constant(0u));
+ ir_if *f0D91 = new(mem_ctx) ir_if(operand(r0D92).val);
+ exec_list *const f0D91_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D91->then_instructions;
+
+ body.emit(assign(r0D8F, body.constant(32u), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0D91->else_instructions;
+
+ body.emit(assign(r0D90, body.constant(0u), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0D94 = bit_and(r0D88, body.constant(4294901760u));
+ ir_expression *const r0D95 = equal(r0D94, body.constant(0u));
+ ir_if *f0D93 = new(mem_ctx) ir_if(operand(r0D95).val);
+ exec_list *const f0D93_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D93->then_instructions;
+
+ body.emit(assign(r0D90, body.constant(16u), 0x01));
+
+ body.emit(assign(r0D8E, lshift(r0D88, body.constant(int(16))), 0x01));
+
+
+ body.instructions = f0D93_parent_instructions;
+ body.emit(f0D93);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0D97 = bit_and(r0D8E, body.constant(4278190080u));
+ ir_expression *const r0D98 = equal(r0D97, body.constant(0u));
+ ir_if *f0D96 = new(mem_ctx) ir_if(operand(r0D98).val);
+ exec_list *const f0D96_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D96->then_instructions;
+
+ body.emit(assign(r0D90, add(r0D90, body.constant(8u)), 0x01));
+
+ body.emit(assign(r0D8E, lshift(r0D8E, body.constant(int(8))), 0x01));
+
+
+ body.instructions = f0D96_parent_instructions;
+ body.emit(f0D96);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0D9A = bit_and(r0D8E, body.constant(4026531840u));
+ ir_expression *const r0D9B = equal(r0D9A, body.constant(0u));
+ ir_if *f0D99 = new(mem_ctx) ir_if(operand(r0D9B).val);
+ exec_list *const f0D99_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D99->then_instructions;
+
+ body.emit(assign(r0D90, add(r0D90, body.constant(4u)), 0x01));
+
+ body.emit(assign(r0D8E, lshift(r0D8E, body.constant(int(4))), 0x01));
+
+
+ body.instructions = f0D99_parent_instructions;
+ body.emit(f0D99);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0D9D = bit_and(r0D8E, body.constant(3221225472u));
+ ir_expression *const r0D9E = equal(r0D9D, body.constant(0u));
+ ir_if *f0D9C = new(mem_ctx) ir_if(operand(r0D9E).val);
+ exec_list *const f0D9C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D9C->then_instructions;
+
+ body.emit(assign(r0D90, add(r0D90, body.constant(2u)), 0x01));
+
+ body.emit(assign(r0D8E, lshift(r0D8E, body.constant(int(2))), 0x01));
+
+
+ body.instructions = f0D9C_parent_instructions;
+ body.emit(f0D9C);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0DA0 = bit_and(r0D8E, body.constant(2147483648u));
+ ir_expression *const r0DA1 = equal(r0DA0, body.constant(0u));
+ ir_if *f0D9F = new(mem_ctx) ir_if(operand(r0DA1).val);
+ exec_list *const f0D9F_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0D9F->then_instructions;
+
+ body.emit(assign(r0D90, add(r0D90, body.constant(1u)), 0x01));
+
+
+ body.instructions = f0D9F_parent_instructions;
+ body.emit(f0D9F);
+
+ /* END IF */
+
+ body.emit(assign(r0D8F, r0D90, 0x01));
+
+
+ body.instructions = f0D91_parent_instructions;
+ body.emit(f0D91);
+
+ /* END IF */
+
+ ir_expression *const r0DA2 = expr(ir_unop_u2i, r0D8F);
+ body.emit(assign(r0D8B, add(r0DA2, body.constant(int(-11))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0DA4 = lequal(body.constant(int(0)), r0D8B);
+ ir_if *f0DA3 = new(mem_ctx) ir_if(operand(r0DA4).val);
+ exec_list *const f0DA3_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0DA3->then_instructions;
+
+ body.emit(assign(r0D8A, body.constant(0u), 0x01));
+
+ ir_variable *const r0DA5 = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r0DA5, lshift(r0D89, r0D8B), 0x01));
+
+ ir_variable *const r0DA6 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0DA8 = equal(r0D8B, body.constant(int(0)));
+ ir_if *f0DA7 = new(mem_ctx) ir_if(operand(r0DA8).val);
+ exec_list *const f0DA7_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0DA7->then_instructions;
+
+ body.emit(assign(r0DA6, r0D88, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0DA7->else_instructions;
+
+ ir_expression *const r0DA9 = lshift(r0D88, r0D8B);
+ ir_expression *const r0DAA = neg(r0D8B);
+ ir_expression *const r0DAB = bit_and(r0DAA, body.constant(int(31)));
+ ir_expression *const r0DAC = rshift(r0D89, r0DAB);
+ body.emit(assign(r0DA6, bit_or(r0DA9, r0DAC), 0x01));
+
+
+ body.instructions = f0DA7_parent_instructions;
+ body.emit(f0DA7);
+
+ /* END IF */
+
+ body.emit(assign(r0D88, r0DA6, 0x01));
+
+ body.emit(assign(r0D89, r0DA5, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0DA3->else_instructions;
+
+ ir_variable *const r0DAD = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r0DAD, body.constant(0u), 0x01));
+
+ ir_variable *const r0DAE = body.make_temp(glsl_type::int_type, "count");
+ body.emit(assign(r0DAE, neg(r0D8B), 0x01));
+
+ ir_variable *const r0DAF = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r0DAF);
+ ir_variable *const r0DB0 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0DB0);
+ ir_variable *const r0DB1 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r0DB1);
+ ir_variable *const r0DB2 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r0DB3 = neg(r0DAE);
+ body.emit(assign(r0DB2, bit_and(r0DB3, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0DB5 = equal(r0DAE, body.constant(int(0)));
+ ir_if *f0DB4 = new(mem_ctx) ir_if(operand(r0DB5).val);
+ exec_list *const f0DB4_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0DB4->then_instructions;
+
+ body.emit(assign(r0DAF, r0DAD, 0x01));
+
+ body.emit(assign(r0DB0, r0D89, 0x01));
+
+ body.emit(assign(r0DB1, r0D88, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0DB4->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0DB7 = less(r0DAE, body.constant(int(32)));
+ ir_if *f0DB6 = new(mem_ctx) ir_if(operand(r0DB7).val);
+ exec_list *const f0DB6_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0DB6->then_instructions;
+
+ body.emit(assign(r0DAF, lshift(r0D89, r0DB2), 0x01));
+
+ ir_expression *const r0DB8 = lshift(r0D88, r0DB2);
+ ir_expression *const r0DB9 = rshift(r0D89, r0DAE);
+ body.emit(assign(r0DB0, bit_or(r0DB8, r0DB9), 0x01));
+
+ body.emit(assign(r0DB1, rshift(r0D88, r0DAE), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0DB6->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0DBB = equal(r0DAE, body.constant(int(32)));
+ ir_if *f0DBA = new(mem_ctx) ir_if(operand(r0DBB).val);
+ exec_list *const f0DBA_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0DBA->then_instructions;
+
+ body.emit(assign(r0DAF, r0D89, 0x01));
+
+ body.emit(assign(r0DB0, r0D88, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0DBA->else_instructions;
+
+ body.emit(assign(r0DAD, bit_or(body.constant(0u), r0D89), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0DBD = less(r0DAE, body.constant(int(64)));
+ ir_if *f0DBC = new(mem_ctx) ir_if(operand(r0DBD).val);
+ exec_list *const f0DBC_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0DBC->then_instructions;
+
+ body.emit(assign(r0DAF, lshift(r0D88, r0DB2), 0x01));
+
+ ir_expression *const r0DBE = bit_and(r0DAE, body.constant(int(31)));
+ body.emit(assign(r0DB0, rshift(r0D88, r0DBE), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0DBC->else_instructions;
+
+ ir_variable *const r0DBF = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0DC1 = equal(r0DAE, body.constant(int(64)));
+ ir_if *f0DC0 = new(mem_ctx) ir_if(operand(r0DC1).val);
+ exec_list *const f0DC0_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0DC0->then_instructions;
+
+ body.emit(assign(r0DBF, r0D88, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0DC0->else_instructions;
+
+ ir_expression *const r0DC2 = nequal(r0D88, body.constant(0u));
+ ir_expression *const r0DC3 = expr(ir_unop_b2i, r0DC2);
+ body.emit(assign(r0DBF, expr(ir_unop_i2u, r0DC3), 0x01));
+
+
+ body.instructions = f0DC0_parent_instructions;
+ body.emit(f0DC0);
+
+ /* END IF */
+
+ body.emit(assign(r0DAF, r0DBF, 0x01));
+
+ body.emit(assign(r0DB0, body.constant(0u), 0x01));
+
+
+ body.instructions = f0DBC_parent_instructions;
+ body.emit(f0DBC);
+
+ /* END IF */
+
+
+ body.instructions = f0DBA_parent_instructions;
+ body.emit(f0DBA);
+
+ /* END IF */
+
+ body.emit(assign(r0DB1, body.constant(0u), 0x01));
+
+
+ body.instructions = f0DB6_parent_instructions;
+ body.emit(f0DB6);
+
+ /* END IF */
+
+ ir_expression *const r0DC4 = nequal(r0DAD, body.constant(0u));
+ ir_expression *const r0DC5 = expr(ir_unop_b2i, r0DC4);
+ ir_expression *const r0DC6 = expr(ir_unop_i2u, r0DC5);
+ body.emit(assign(r0DAF, bit_or(r0DAF, r0DC6), 0x01));
+
+
+ body.instructions = f0DB4_parent_instructions;
+ body.emit(f0DB4);
+
+ /* END IF */
+
+ body.emit(assign(r0D88, r0DB1, 0x01));
+
+ body.emit(assign(r0D89, r0DB0, 0x01));
+
+ body.emit(assign(r0D8A, r0DAF, 0x01));
+
+
+ body.instructions = f0DA3_parent_instructions;
+ body.emit(f0DA3);
+
+ /* END IF */
+
+ ir_expression *const r0DC7 = expr(ir_unop_i2u, r0D8B);
+ body.emit(assign(r0D87, sub(r0D87, r0DC7), 0x01));
+
+ ir_variable *const r0DC8 = body.make_temp(glsl_type::uint_type, "zExp");
+ body.emit(assign(r0DC8, r0D87, 0x01));
+
+ ir_variable *const r0DC9 = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r0DC9, r0D88, 0x01));
+
+ ir_variable *const r0DCA = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r0DCA, r0D89, 0x01));
+
+ ir_variable *const r0DCB = body.make_temp(glsl_type::uint_type, "zFrac2");
+ body.emit(assign(r0DCB, r0D8A, 0x01));
+
+ ir_variable *const r0DCC = body.make_temp(glsl_type::bool_type, "execute_flag");
+ body.emit(assign(r0DCC, body.constant(true), 0x01));
+
+ ir_variable *const r0DCD = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r0DCE = new(mem_ctx) ir_variable(glsl_type::uint_type, "increment", ir_var_auto);
+ body.emit(r0DCE);
+ ir_expression *const r0DCF = less(r0D8A, body.constant(0u));
+ ir_expression *const r0DD0 = expr(ir_unop_b2i, r0DCF);
+ body.emit(assign(r0DCE, expr(ir_unop_i2u, r0DD0), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0DD2 = lequal(body.constant(2045u), r0D87);
+ ir_if *f0DD1 = new(mem_ctx) ir_if(operand(r0DD2).val);
+ exec_list *const f0DD1_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0DD1->then_instructions;
+
+ ir_variable *const r0DD3 = body.make_temp(glsl_type::bool_type, "or_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0DD5 = less(body.constant(2045u), r0D87);
+ ir_if *f0DD4 = new(mem_ctx) ir_if(operand(r0DD5).val);
+ exec_list *const f0DD4_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0DD4->then_instructions;
+
+ body.emit(assign(r0DD3, body.constant(true), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0DD4->else_instructions;
+
+ ir_variable *const r0DD6 = body.make_temp(glsl_type::bool_type, "and_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0DD8 = equal(r0D87, body.constant(2045u));
+ ir_if *f0DD7 = new(mem_ctx) ir_if(operand(r0DD8).val);
+ exec_list *const f0DD7_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0DD7->then_instructions;
+
+ ir_expression *const r0DD9 = equal(body.constant(2097151u), r0D88);
+ ir_expression *const r0DDA = equal(body.constant(4294967295u), r0D89);
+ body.emit(assign(r0DD6, logic_and(r0DD9, r0DDA), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0DD7->else_instructions;
+
+ body.emit(assign(r0DD6, body.constant(false), 0x01));
+
+
+ body.instructions = f0DD7_parent_instructions;
+ body.emit(f0DD7);
+
+ /* END IF */
+
+ ir_expression *const r0DDB = nequal(r0DCE, body.constant(0u));
+ body.emit(assign(r0DD3, logic_and(r0DD6, r0DDB), 0x01));
+
+
+ body.instructions = f0DD4_parent_instructions;
+ body.emit(f0DD4);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f0DDC = new(mem_ctx) ir_if(operand(r0DD3).val);
+ exec_list *const f0DDC_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0DDC->then_instructions;
+
+ ir_variable *const r0DDD = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r0DDD);
+ ir_expression *const r0DDE = lshift(r09D5, body.constant(int(31)));
+ body.emit(assign(r0DDD, add(r0DDE, body.constant(2146435072u)), 0x01));
+
+ body.emit(assign(r0DDD, body.constant(0u), 0x02));
+
+ body.emit(assign(r0DCD, r0DDD, 0x03));
+
+ body.emit(assign(r0DCC, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0DDC->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0DE0 = less(r0D87, body.constant(0u));
+ ir_if *f0DDF = new(mem_ctx) ir_if(operand(r0DE0).val);
+ exec_list *const f0DDF_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0DDF->then_instructions;
+
+ ir_variable *const r0DE1 = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r0DE1, r0D8A, 0x01));
+
+ ir_variable *const r0DE2 = body.make_temp(glsl_type::int_type, "count");
+ ir_expression *const r0DE3 = neg(r0D87);
+ body.emit(assign(r0DE2, expr(ir_unop_u2i, r0DE3), 0x01));
+
+ ir_variable *const r0DE4 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r0DE4);
+ ir_variable *const r0DE5 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0DE5);
+ ir_variable *const r0DE6 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r0DE6);
+ ir_variable *const r0DE7 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r0DE8 = neg(r0DE2);
+ body.emit(assign(r0DE7, bit_and(r0DE8, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0DEA = equal(r0DE2, body.constant(int(0)));
+ ir_if *f0DE9 = new(mem_ctx) ir_if(operand(r0DEA).val);
+ exec_list *const f0DE9_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0DE9->then_instructions;
+
+ body.emit(assign(r0DE4, r0D8A, 0x01));
+
+ body.emit(assign(r0DE5, r0D89, 0x01));
+
+ body.emit(assign(r0DE6, r0D88, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0DE9->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0DEC = less(r0DE2, body.constant(int(32)));
+ ir_if *f0DEB = new(mem_ctx) ir_if(operand(r0DEC).val);
+ exec_list *const f0DEB_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0DEB->then_instructions;
+
+ body.emit(assign(r0DE4, lshift(r0D89, r0DE7), 0x01));
+
+ ir_expression *const r0DED = lshift(r0D88, r0DE7);
+ ir_expression *const r0DEE = rshift(r0D89, r0DE2);
+ body.emit(assign(r0DE5, bit_or(r0DED, r0DEE), 0x01));
+
+ body.emit(assign(r0DE6, rshift(r0D88, r0DE2), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0DEB->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0DF0 = equal(r0DE2, body.constant(int(32)));
+ ir_if *f0DEF = new(mem_ctx) ir_if(operand(r0DF0).val);
+ exec_list *const f0DEF_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0DEF->then_instructions;
+
+ body.emit(assign(r0DE4, r0D89, 0x01));
+
+ body.emit(assign(r0DE5, r0D88, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0DEF->else_instructions;
+
+ body.emit(assign(r0DE1, bit_or(r0D8A, r0D89), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0DF2 = less(r0DE2, body.constant(int(64)));
+ ir_if *f0DF1 = new(mem_ctx) ir_if(operand(r0DF2).val);
+ exec_list *const f0DF1_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0DF1->then_instructions;
+
+ body.emit(assign(r0DE4, lshift(r0D88, r0DE7), 0x01));
+
+ ir_expression *const r0DF3 = bit_and(r0DE2, body.constant(int(31)));
+ body.emit(assign(r0DE5, rshift(r0D88, r0DF3), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0DF1->else_instructions;
+
+ ir_variable *const r0DF4 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0DF6 = equal(r0DE2, body.constant(int(64)));
+ ir_if *f0DF5 = new(mem_ctx) ir_if(operand(r0DF6).val);
+ exec_list *const f0DF5_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0DF5->then_instructions;
+
+ body.emit(assign(r0DF4, r0D88, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0DF5->else_instructions;
+
+ ir_expression *const r0DF7 = nequal(r0D88, body.constant(0u));
+ ir_expression *const r0DF8 = expr(ir_unop_b2i, r0DF7);
+ body.emit(assign(r0DF4, expr(ir_unop_i2u, r0DF8), 0x01));
+
+
+ body.instructions = f0DF5_parent_instructions;
+ body.emit(f0DF5);
+
+ /* END IF */
+
+ body.emit(assign(r0DE4, r0DF4, 0x01));
+
+ body.emit(assign(r0DE5, body.constant(0u), 0x01));
+
+
+ body.instructions = f0DF1_parent_instructions;
+ body.emit(f0DF1);
+
+ /* END IF */
+
+
+ body.instructions = f0DEF_parent_instructions;
+ body.emit(f0DEF);
+
+ /* END IF */
+
+ body.emit(assign(r0DE6, body.constant(0u), 0x01));
+
+
+ body.instructions = f0DEB_parent_instructions;
+ body.emit(f0DEB);
+
+ /* END IF */
+
+ ir_expression *const r0DF9 = nequal(r0DE1, body.constant(0u));
+ ir_expression *const r0DFA = expr(ir_unop_b2i, r0DF9);
+ ir_expression *const r0DFB = expr(ir_unop_i2u, r0DFA);
+ body.emit(assign(r0DE4, bit_or(r0DE4, r0DFB), 0x01));
+
+
+ body.instructions = f0DE9_parent_instructions;
+ body.emit(f0DE9);
+
+ /* END IF */
+
+ body.emit(assign(r0DC9, r0DE6, 0x01));
+
+ body.emit(assign(r0DCA, r0DE5, 0x01));
+
+ body.emit(assign(r0DCB, r0DE4, 0x01));
+
+ body.emit(assign(r0DC8, body.constant(0u), 0x01));
+
+ ir_expression *const r0DFC = less(r0DE4, body.constant(0u));
+ ir_expression *const r0DFD = expr(ir_unop_b2i, r0DFC);
+ body.emit(assign(r0DCE, expr(ir_unop_i2u, r0DFD), 0x01));
+
+
+ body.instructions = f0DDF_parent_instructions;
+ body.emit(f0DDF);
+
+ /* END IF */
+
+
+ body.instructions = f0DDC_parent_instructions;
+ body.emit(f0DDC);
+
+ /* END IF */
+
+
+ body.instructions = f0DD1_parent_instructions;
+ body.emit(f0DD1);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f0DFE = new(mem_ctx) ir_if(operand(r0DCC).val);
+ exec_list *const f0DFE_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0DFE->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0E00 = nequal(r0DCE, body.constant(0u));
+ ir_if *f0DFF = new(mem_ctx) ir_if(operand(r0E00).val);
+ exec_list *const f0DFF_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0DFF->then_instructions;
+
+ ir_variable *const r0E01 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0E01);
+ body.emit(assign(r0E01, add(r0DCA, body.constant(1u)), 0x01));
+
+ ir_expression *const r0E02 = less(r0E01, r0DCA);
+ ir_expression *const r0E03 = expr(ir_unop_b2i, r0E02);
+ ir_expression *const r0E04 = expr(ir_unop_i2u, r0E03);
+ body.emit(assign(r0DC9, add(r0DC9, r0E04), 0x01));
+
+ ir_expression *const r0E05 = neg(r0DCB);
+ ir_expression *const r0E06 = equal(r0DCB, r0E05);
+ ir_expression *const r0E07 = expr(ir_unop_b2i, r0E06);
+ ir_expression *const r0E08 = expr(ir_unop_i2u, r0E07);
+ ir_expression *const r0E09 = bit_and(r0E08, body.constant(1u));
+ ir_expression *const r0E0A = expr(ir_unop_bit_not, r0E09);
+ body.emit(assign(r0DCA, bit_and(r0E01, r0E0A), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0DFF->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0E0C = bit_or(r0DC9, r0DCA);
+ ir_expression *const r0E0D = equal(r0E0C, body.constant(0u));
+ ir_if *f0E0B = new(mem_ctx) ir_if(operand(r0E0D).val);
+ exec_list *const f0E0B_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0E0B->then_instructions;
+
+ body.emit(assign(r0DC8, body.constant(0u), 0x01));
+
+
+ body.instructions = f0E0B_parent_instructions;
+ body.emit(f0E0B);
+
+ /* END IF */
+
+
+ body.instructions = f0DFF_parent_instructions;
+ body.emit(f0DFF);
+
+ /* END IF */
+
+ ir_variable *const r0E0E = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r0E0E);
+ ir_expression *const r0E0F = lshift(r09D5, body.constant(int(31)));
+ ir_expression *const r0E10 = lshift(r0DC8, body.constant(int(20)));
+ ir_expression *const r0E11 = add(r0E0F, r0E10);
+ body.emit(assign(r0E0E, add(r0E11, r0DC9), 0x01));
+
+ body.emit(assign(r0E0E, r0DCA, 0x02));
+
+ body.emit(assign(r0DCD, r0E0E, 0x03));
+
+ body.emit(assign(r0DCC, body.constant(false), 0x01));
+
+
+ body.instructions = f0DFE_parent_instructions;
+ body.emit(f0DFE);
+
+ /* END IF */
+
+ body.emit(assign(r09D6, r0DCD, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0D7F->else_instructions;
+
+ ir_variable *const r0E12 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r0E12);
+ body.emit(assign(r0E12, body.constant(0u), 0x01));
+
+ body.emit(assign(r0E12, body.constant(0u), 0x02));
+
+ body.emit(assign(r09D6, r0E12, 0x03));
+
+
+ body.instructions = f0D7F_parent_instructions;
+ body.emit(f0D7F);
+
+ /* END IF */
+
+
+ body.instructions = f0CEC_parent_instructions;
+ body.emit(f0CEC);
+
+ /* END IF */
+
+
+ body.instructions = f0C59_parent_instructions;
+ body.emit(f0C59);
+
+ /* END IF */
+
+
+ body.instructions = f0BC6_parent_instructions;
+ body.emit(f0BC6);
+
+ /* END IF */
+
+
+ body.instructions = f0B9F_parent_instructions;
+ body.emit(f0B9F);
+
+ /* END IF */
+
+
+ body.instructions = f0AC4_parent_instructions;
+ body.emit(f0AC4);
+
+ /* END IF */
+
+
+ body.instructions = f09ED_parent_instructions;
+ body.emit(f09ED);
+
+ /* END IF */
+
+ body.emit(assign(r0819, r09D6, 0x03));
+
+
+ body.instructions = f081C_parent_instructions;
+ body.emit(f081C);
+
+ /* END IF */
+
+ body.emit(ret(r0819));
+
+ sig->replace_parameters(&sig_parameters);
+ return sig;
+}
diff --git a/src/compiler/glsl/builtin_functions.cpp b/src/compiler/glsl/builtin_functions.cpp
index 03c92f5249..9b09147d27 100644
--- a/src/compiler/glsl/builtin_functions.cpp
+++ b/src/compiler/glsl/builtin_functions.cpp
@@ -3149,6 +3149,10 @@ builtin_builder::create_builtins()
generate_ir::flt64(mem_ctx, integer_functions_supported),
NULL);
+ add_function("__builtin_fadd64",
+ generate_ir::fadd64(mem_ctx, integer_functions_supported),
+ NULL);
+
#undef F
#undef FI
#undef FIUD_VEC
diff --git a/src/compiler/glsl/builtin_functions.h b/src/compiler/glsl/builtin_functions.h
index 0c440604b3..8cab06aa1d 100644
--- a/src/compiler/glsl/builtin_functions.h
+++ b/src/compiler/glsl/builtin_functions.h
@@ -78,6 +78,9 @@ fle64(void *mem_ctx, builtin_available_predicate avail);
ir_function_signature *
flt64(void *mem_ctx, builtin_available_predicate avail);
+ir_function_signature *
+fadd64(void *mem_ctx, builtin_available_predicate avail);
+
}
#endif /* BULITIN_FUNCTIONS_H */
diff --git a/src/compiler/glsl/float64.glsl b/src/compiler/glsl/float64.glsl
index c92947e91b..ae9441f78a 100644
--- a/src/compiler/glsl/float64.glsl
+++ b/src/compiler/glsl/float64.glsl
@@ -174,3 +174,577 @@ flt64( uvec2 a, uvec2 b )
return ( aSign != 0u ) ? lt64( b.x, b.y, a.x, a.y )
: lt64( a.x, a.y, b.x, b.y );
}
+
+/* Adds the 64-bit value formed by concatenating `a0' and `a1' to the 64-bit
+ * value formed by concatenating `b0' and `b1'. Addition is modulo 2^64, so
+ * any carry out is lost. The result is broken into two 32-bit pieces which
+ * are stored at the locations pointed to by `z0Ptr' and `z1Ptr'.
+ */
+void
+add64( uint a0, uint a1, uint b0, uint b1,
+ inout uint z0Ptr,
+ inout uint z1Ptr )
+{
+ uint z1;
+
+ z1 = a1 + b1;
+ z1Ptr = z1;
+ z0Ptr = a0 + b0 + uint ( z1 < a1 );
+}
+
+
+/* Subtracts the 64-bit value formed by concatenating `b0' and `b1' from the
+ * 64-bit value formed by concatenating `a0' and `a1'. Subtraction is modulo
+ * 2^64, so any borrow out (carry out) is lost. The result is broken into two
+ * 32-bit pieces which are stored at the locations pointed to by `z0Ptr' and
+ * `z1Ptr'.
+ */
+void
+sub64( uint a0, uint a1, uint b0, uint b1,
+ inout uint z0Ptr,
+ inout uint z1Ptr )
+{
+ z1Ptr = a1 - b1;
+ z0Ptr = a0 - b0 - uint ( a1 < b1 );
+}
+
+/* Returns 1 if the 64-bit value formed by concatenating `a0' and `a1' is
+ * equal to the 64-bit value formed by concatenating `b0' and `b1'. Otherwise,
+ * returns 0.
+ */
+bool
+eq64( uint a0, uint a1, uint b0, uint b1 )
+{
+ return ( a0 == b0 ) && ( a1 == b1 );
+}
+
+/* Returns 1 if the double-precision floating-point value `a' is a NaN;
+ * otherwise returns 0.
+ */
+bool
+float64_is_nan( uvec2 a )
+{
+ return ( 0xFFE00000u <= ( a.y<<1 ) ) &&
+ ( ( a.x != 0u ) || ( ( a.y & 0x000FFFFFu ) != 0u ) );
+}
+
+/* Returns 1 if the double-precision floating-point value `a' is a signaling
+ * NaN; otherwise returns 0.
+ */
+bool
+float64_is_signaling_nan( uvec2 a )
+{
+ return ( ( ( a.y>>19 ) & 0xFFFu ) == 0xFFEu ) &&
+ ( ( a.x != 0u ) || ( ( a.y & 0x0007FFFFu ) != 0u ) );
+}
+
+/* Shifts the 64-bit value formed by concatenating `a.x' and `a.y' right by the
+ * number of bits given in `count'. If any nonzero bits are shifted off, they
+ * are "jammed" into the least significant bit of the result by setting the
+ * least significant bit to 1. The value of `count' can be arbitrarily large;
+ * in particular, if `count' is greater than 64, the result will be either 0
+ * or 1, depending on whether the concatenation of `a.x' and `a.y' is zero or
+ * nonzero. The result is broken into two 32-bit pieces which are stored at
+ * the locations pointed to by `z0Ptr' and `z1Ptr'.
+ */
+void
+shift64RightJamming( uvec2 a,
+ int count,
+ inout uint z0Ptr,
+ inout uint z1Ptr )
+{
+ uint z0;
+ uint z1;
+ int negCount = ( - count ) & 31;
+
+ if ( count == 0 ) {
+ z1 = a.y;
+ z0 = a.x;
+ } else if ( count < 32 ) {
+ z1 = ( a.x<<negCount ) |
+ ( a.y>>count ) |
+ uint ( ( a.y<<negCount ) != 0u );
+ z0 = a.x>>count;
+ } else {
+ if ( count == 32 ) {
+ z1 = a.x | uint ( a.y != 0u );
+ } else if ( count < 64 ) {
+ z1 = ( a.x>>( count & 31 ) ) |
+ uint ( ( ( a.x<<negCount ) | a.y ) != 0u );
+ } else {
+ z1 = uint ( ( a.x | a.y ) != 0u );
+ }
+ z0 = 0u;
+ }
+ z1Ptr = z1;
+ z0Ptr = z0;
+}
+
+/* Shifts the 96-bit value formed by concatenating `a0', `a1', and `a2' right
+ * by 32 _plus_ the number of bits given in `count'. The shifted result is
+ * at most 64 nonzero bits; these are broken into two 32-bit pieces which are
+ * stored at the locations pointed to by `z0Ptr' and `z1Ptr'. The bits shifted
+ * off form a third 32-bit result as follows: The _last_ bit shifted off is
+ * the most-significant bit of the extra result, and the other 31 bits of the
+ * extra result are all zero if and only if _all_but_the_last_ bits shifted off
+ * were all zero. This extra result is stored in the location pointed to by
+ * `z2Ptr'. The value of `count' can be arbitrarily large.
+ * (This routine makes more sense if `a0', `a1', and `a2' are considered
+ * to form a fixed-point value with binary point between `a1' and `a2'. This
+ * fixed-point value is shifted right by the number of bits given in `count',
+ * and the integer part of the result is returned at the locations pointed to
+ * by `z0Ptr' and `z1Ptr'. The fractional part of the result may be slightly
+ * corrupted as described above, and is returned at the location pointed to by
+ * `z2Ptr'.)
+ */
+void
+shift64ExtraRightJamming( uint a0, uint a1, uint a2,
+ int count,
+ inout uint z0Ptr,
+ inout uint z1Ptr,
+ inout uint z2Ptr )
+{
+ uint z0;
+ uint z1;
+ uint z2;
+ int negCount = ( - count ) & 31;
+
+ if ( count == 0 ) {
+ z2 = a2;
+ z1 = a1;
+ z0 = a0;
+ } else {
+ if ( count < 32 ) {
+ z2 = a1<<negCount;
+ z1 = ( a0<<negCount ) | ( a1>>count );
+ z0 = a0>>count;
+ } else {
+ if ( count == 32 ) {
+ z2 = a1;
+ z1 = a0;
+ } else {
+ a2 |= a1;
+ if ( count < 64 ) {
+ z2 = a0<<negCount;
+ z1 = a0>>( count & 31 );
+ } else {
+ z2 = ( count == 64 ) ? a0 : uint ( a0 != 0u );
+ z1 = 0u;
+ }
+ }
+ z0 = 0u;
+ }
+ z2 |= uint ( a2 != 0u );
+ }
+ z2Ptr = z2;
+ z1Ptr = z1;
+ z0Ptr = z0;
+}
+
+/* Shifts the 64-bit value formed by concatenating `a0' and `a1' left by the
+ * number of bits given in `count'. Any bits shifted off are lost. The value
+ * of `count' must be less than 32. The result is broken into two 32-bit
+ * pieces which are stored at the locations pointed to by `z0Ptr' and `z1Ptr'.
+ */
+void shortShift64Left( uint a0, uint a1,
+ int count,
+ inout uint z0Ptr,
+ inout uint z1Ptr )
+{
+ z1Ptr = a1<<count;
+ z0Ptr =
+ ( count == 0 ) ? a0 : ( a0<<count ) | ( a1>>( ( - count ) & 31 ) );
+}
+
+/* Packs the sign `zSign', the exponent `zExp', and the significand formed by
+ * the concatenation of `zFrac0' and `zFrac1' into a double-precision floating-
+ * point value, returning the result. After being shifted into the proper
+ * positions, the three fields `zSign', `zExp', and `zFrac0' are simply added
+ * together to form the most significant 32 bits of the result. This means
+ * that any integer portion of `zFrac0' will be added into the exponent. Since
+ * a properly normalized significand will have an integer portion equal to 1,
+ * the `zExp' input should be 1 less than the desired result exponent whenever
+ * `zFrac0' and `zFrac1' concatenated form a complete, normalized significand.
+ */
+uvec2
+packFloat64( uint zSign, uint zExp, uint zFrac0, uint zFrac1 )
+{
+ uvec2 z;
+
+ z.x = ( zSign<<31 ) + ( zExp<<20 ) + zFrac0;
+ z.y = zFrac1;
+ return z;
+}
+
+/* Takes an abstract floating-point value having sign `zSign', exponent `zExp',
+ * and extended significand formed by the concatenation of `zFrac0', `zFrac1',
+ * and `zFrac2', and returns the proper double-precision floating-point value
+ * corresponding to the abstract input. Ordinarily, the abstract value is
+ * simply rounded and packed into the double-precision format, with the inexact
+ * exception raised if the abstract input cannot be represented exactly.
+ * However, if the abstract value is too large, the overflow and inexact
+ * exceptions are raised and an infinity or maximal finite value is returned.
+ * If the abstract value is too small, the input value is rounded to a
+ * subnormal number, and the underflow and inexact exceptions are raised if the
+ * abstract input cannot be represented exactly as a subnormal double-precision
+ * floating-point number.
+ * The input significand must be normalized or smaller. If the input
+ * significand is not normalized, `zExp' must be 0; in that case, the result
+ * returned is a subnormal number, and it must not require rounding. In the
+ * usual case that the input significand is normalized, `zExp' must be 1 less
+ * than the "true" floating-point exponent. The handling of underflow and
+ * overflow follows the IEEE Standard for Floating-Point Arithmetic.
+ */
+uvec2
+roundAndPackFloat64( uint zSign,
+ uint zExp,
+ uint zFrac0,
+ uint zFrac1,
+ uint zFrac2 )
+{
+ uint roundNearestEven;
+ uint increment;
+
+ roundNearestEven = uint ( FLOAT_ROUNDING_MODE == FLOAT_ROUND_NEAREST_EVEN );
+ increment = uint ( zFrac2 < 0u );
+ if ( roundNearestEven == 0u ) {
+ if ( FLOAT_ROUNDING_MODE == FLOAT_ROUND_TO_ZERO ) {
+ increment = 0u;
+ } else {
+ if ( zSign != 0u ) {
+ increment = uint ( ( FLOAT_ROUNDING_MODE == FLOAT_ROUND_DOWN ) &&
+ ( zFrac2 != 0u ) );
+ } else {
+ increment = uint ( ( FLOAT_ROUNDING_MODE == FLOAT_ROUND_UP ) &&
+ ( zFrac2 != 0u ) );
+ }
+ }
+ }
+ if ( 0x7FDu <= zExp ) {
+ if ( ( 0x7FDu < zExp ) ||
+ ( ( zExp == 0x7FDu ) &&
+ eq64( 0x001FFFFFu, 0xFFFFFFFFu, zFrac0, zFrac1 ) &&
+ ( increment != 0u ) ) ) {
+ if ( ( FLOAT_ROUNDING_MODE == FLOAT_ROUND_TO_ZERO ) ||
+ ( ( zSign != 0u ) && ( FLOAT_ROUNDING_MODE == FLOAT_ROUND_UP ) ) ||
+ ( ( zSign == 0u ) &&
+ ( FLOAT_ROUNDING_MODE == FLOAT_ROUND_DOWN ) ) ) {
+ return packFloat64( zSign, 0x7FEu, 0x000FFFFFu, 0xFFFFFFFFu );
+ }
+ return packFloat64( zSign, 0x7FFu, 0u, 0u );
+ }
+ if ( zExp < 0u ) {
+ shift64ExtraRightJamming(
+ zFrac0, zFrac1, zFrac2, int (-zExp), zFrac0, zFrac1, zFrac2 );
+ zExp = 0u;
+ if ( roundNearestEven != 0u ) {
+ increment = uint ( zFrac2 < 0u );
+ } else {
+ if ( zSign != 0u ) {
+ increment = uint ( ( FLOAT_ROUNDING_MODE == FLOAT_ROUND_DOWN ) &&
+ ( zFrac2 != 0u ) );
+ } else {
+ increment = uint ( ( FLOAT_ROUNDING_MODE == FLOAT_ROUND_UP ) &&
+ ( zFrac2 != 0u ) );
+ }
+ }
+ }
+ }
+ if ( increment != 0u ) {
+ add64( zFrac0, zFrac1, 0u, 1u, zFrac0, zFrac1 );
+ zFrac1 &= ~ ( uint ( zFrac2 + zFrac2 == 0u ) & roundNearestEven );
+ } else {
+ if ( ( zFrac0 | zFrac1 ) == 0u )
+ zExp = 0u;
+ }
+ return packFloat64( zSign, zExp, zFrac0, zFrac1 );
+}
+
+/* Returns the number of leading 0 bits before the most-significant 1 bit of
+ * `a'. If `a' is zero, 32 is returned.
+ */
+uint
+countLeadingZeros32( uint a )
+{
+ if ( a == 0u )
+ return 32u;
+
+ uint shiftCount = 0u;
+ if ( ( a & 0xFFFF0000u ) == 0u ) { shiftCount += 16u; a <<= 16; }
+ if ( ( a & 0xFF000000u ) == 0u ) { shiftCount += 8u; a <<= 8; }
+ if ( ( a & 0xF0000000u ) == 0u ) { shiftCount += 4u; a <<= 4; }
+ if ( ( a & 0xC0000000u ) == 0u ) { shiftCount += 2u; a <<= 2; }
+ if ( ( a & 0x80000000u ) == 0u ) { shiftCount += 1u; }
+ return shiftCount;
+}
+
+/* Takes an abstract floating-point value having sign `zSign', exponent `zExp',
+ * and significand formed by the concatenation of `zSig0' and `zSig1', and
+ * returns the proper double-precision floating-point value corresponding
+ * to the abstract input. This routine is just like `roundAndPackFloat64'
+ * except that the input significand has fewer bits and does not have to be
+ * normalized. In all cases, `zExp' must be 1 less than the "true" floating-
+ * point exponent.
+ */
+uvec2
+normalizeRoundAndPackFloat64( uint zSign,
+ uint zExp,
+ uint zFrac0,
+ uint zFrac1 )
+{
+ int shiftCount;
+ uint zFrac2;
+
+ if ( zFrac0 == 0u ) {
+ zFrac0 = zFrac1;
+ zFrac1 = 0u;
+ zExp -= 32u;
+ }
+ shiftCount = int ( countLeadingZeros32( zFrac0 ) ) - 11;
+ if ( 0 <= shiftCount ) {
+ zFrac2 = 0u;
+ shortShift64Left( zFrac0, zFrac1, shiftCount, zFrac0, zFrac1 );
+ } else {
+ shift64ExtraRightJamming(
+ zFrac0, zFrac1, 0u, - shiftCount, zFrac0, zFrac1, zFrac2 );
+ }
+ zExp -= uint ( shiftCount );
+ return roundAndPackFloat64( zSign, zExp, zFrac0, zFrac1, zFrac2 );
+}
+
+/* Takes two double-precision floating-point values `a' and `b', one of which
+ * is a NaN, and returns the appropriate NaN result. If either `a' or `b' is
+ * a signaling NaN, the invalid exception is raised.
+ */
+uvec2
+propagateFloat64NaN( uvec2 a, uvec2 b )
+{
+ bool aIsNaN;
+ bool aIsSignalingNaN;
+ bool bIsNaN;
+ bool bIsSignalingNaN;
+
+ aIsNaN = float64_is_nan( a );
+ aIsSignalingNaN = float64_is_signaling_nan( a );
+ bIsNaN = float64_is_nan( b );
+ bIsSignalingNaN = float64_is_signaling_nan( b );
+ a.y |= 0x00080000u;
+ b.y |= 0x00080000u;
+ if ( aIsNaN ) {
+ return ( aIsSignalingNaN && bIsNaN ) ? b : a;
+ } else {
+ return b;
+ }
+}
+
+/* Returns the result of adding the absolute values of the double-precision
+ * floating-point values `a' and `b'. If `zSign' is 1, the sum is negated
+ * before being returned. `zSign' is ignored if the result is a NaN. The
+ * addition is performed according to the IEEE Standard for Floating-Point
+ * Arithmetic.
+ */
+uvec2
+addFloat64Fracs( uvec2 a, uvec2 b, uint zSign )
+{
+ uvec2 aFrac;
+ uvec2 bFrac;
+ uint aExp;
+ uint bExp;
+ uint zExp;
+ uint zFrac0 = 0u;
+ uint zFrac1 = 0u;
+ uint zFrac2 = 0u;
+ int expDiff;
+
+ aFrac = extractFloat64Frac( a );
+ aExp = extractFloat64Exp( a );
+ bFrac = extractFloat64Frac( b );
+ bExp = extractFloat64Exp( b );
+ expDiff = int ( aExp ) - int ( bExp );
+ if ( 0 < expDiff ) {
+ if ( aExp == 0x7FFu ) {
+ if ( ( aFrac.x | aFrac.y ) != 0u ) {
+ return propagateFloat64NaN( a, b );
+ }
+ return a;
+ }
+ if ( bExp == 0u ) {
+ --expDiff;
+ } else {
+ bFrac.x |= 0x00100000u;
+ }
+ shift64ExtraRightJamming(
+ bFrac.x, bFrac.y, 0u, expDiff, bFrac.x, bFrac.y, zFrac2 );
+ zExp = aExp;
+ } else if ( expDiff < 0 ) {
+ if ( bExp == 0x7FFu ) {
+ if ( ( bFrac.x | bFrac.y ) != 0u ) {
+ return propagateFloat64NaN( a, b );
+ }
+ return packFloat64( zSign, 0x7FFu, 0u, 0u );
+ }
+ if ( aExp == 0u ) {
+ ++expDiff;
+ } else {
+ aFrac.x |= 0x00100000u;
+ }
+ shift64ExtraRightJamming(
+ aFrac.x, aFrac.y, 0u, - expDiff, aFrac.x, aFrac.y, zFrac2 );
+ zExp = bExp;
+ } else {
+ if ( aExp == 0x7FFu ) {
+ if ( ( aFrac.x | aFrac.y | bFrac.x | bFrac.y ) != 0u ) {
+ return propagateFloat64NaN( a, b );
+ }
+ return a;
+ }
+ add64( aFrac.x, aFrac.y, bFrac.x, bFrac.y, zFrac0, zFrac1 );
+ if ( aExp == 0u ) {
+ return packFloat64( zSign, 0u, zFrac0, zFrac1 );
+ }
+ zFrac2 = 0u;
+ zFrac0 |= 0x00200000u;
+ zExp = aExp;
+ shift64ExtraRightJamming(
+ zFrac0, zFrac1, zFrac2, 1, zFrac0, zFrac1, zFrac2 );
+ return roundAndPackFloat64( zSign, zExp, zFrac0, zFrac1, zFrac2 );
+ }
+ aFrac.x |= 0x00100000u;
+ add64( aFrac.x, aFrac.y, bFrac.x, bFrac.y, zFrac0, zFrac1 );
+ --zExp;
+ if ( zFrac0 < 0x00200000u ) {
+ return roundAndPackFloat64( zSign, zExp, zFrac0, zFrac2, zFrac2 );
+ }
+ ++zExp;
+ shift64ExtraRightJamming(
+ zFrac0, zFrac1, zFrac2, 1, zFrac0, zFrac1, zFrac2 );
+ return roundAndPackFloat64( zSign, zExp, zFrac0, zFrac1, zFrac2 );
+}
+
+/* Returns the result of subtracting the absolute values of the double-
+ * precision floating-point values `a' and `b'. If `zSign' is 1, the
+ * difference is negated before being returned. `zSign' is ignored if the
+ * result is a NaN. The subtraction is performed according to the IEEE
+ * Standard for Floating-Point Arithmetic.
+ */
+uvec2
+subFloat64Fracs( uvec2 a, uvec2 b, uint zSign )
+{
+ uvec2 aFrac;
+ uvec2 bFrac;
+ uvec2 z;
+ uint aExp;
+ uint bExp;
+ uint zExp;
+ uint zFrac0 = 0u;
+ uint zFrac1 = 0u;
+ int expDiff;
+
+ aFrac = extractFloat64Frac( a );
+ aExp = extractFloat64Exp( a );
+ bFrac = extractFloat64Frac( b );
+ bExp = extractFloat64Exp( b );
+ expDiff = int ( aExp ) - int ( bExp );
+ shortShift64Left( aFrac.x, aFrac.y, 10, aFrac.x, aFrac.y );
+ shortShift64Left( bFrac.x, bFrac.y, 10, bFrac.x, bFrac.y );
+ if ( 0 < expDiff ) {
+ if ( aExp == 0x7FFu ) {
+ if ( ( aFrac.x | aFrac.y ) != 0u ) {
+ return propagateFloat64NaN( a, b );
+ }
+ return a;
+ }
+ if ( bExp == 0u ) {
+ --expDiff;
+ } else {
+ bFrac.x |= 0x40000000u;
+ }
+ shift64RightJamming( bFrac, expDiff, bFrac.x, bFrac.y );
+ aFrac.x |= 0x40000000u;
+ sub64( aFrac.x, aFrac.y, bFrac.x, bFrac.y, zFrac0, zFrac1 );
+ zExp = aExp;
+ --zExp;
+ return normalizeRoundAndPackFloat64(
+ zSign, zExp - 10u, zFrac0, zFrac1 );
+ }
+ if ( expDiff < 0 ) {
+ if ( bExp == 0x7FFu ) {
+ if ( ( bFrac.x | bFrac.y ) != 0u ) {
+ return propagateFloat64NaN( a, b );
+ }
+ return packFloat64( zSign ^ 1u, 0x7FFu, 0u, 0u );
+ }
+ if ( aExp == 0u ) {
+ ++expDiff;
+ } else {
+ aFrac.x |= 0x40000000u;
+ }
+ shift64RightJamming( aFrac, - expDiff, aFrac.x, aFrac.y );
+ bFrac.x |= 0x40000000u;
+ sub64( bFrac.x, bFrac.y, aFrac.x, aFrac.y, zFrac0, zFrac1 );
+ zExp = bExp;
+ zSign ^= 1u;
+ --zExp;
+ return normalizeRoundAndPackFloat64(
+ zSign, zExp - 10u, zFrac0, zFrac1 );
+ }
+ if ( aExp == 0x7FFu ) {
+ if ( ( aFrac.x | aFrac.y | bFrac.x | bFrac.y ) != 0u ) {
+ return propagateFloat64NaN( a, b );
+ }
+ return uvec2( 0xFFFFFFFFu, 0xFFFFFFFFu );
+ }
+ if ( aExp == 0u ) {
+ aExp = 1u;
+ bExp = 1u;
+ }
+ if ( bFrac.x < aFrac.x ) {
+ sub64( aFrac.x, aFrac.y, bFrac.x, bFrac.y, zFrac0, zFrac1 );
+ zExp = aExp;
+ --zExp;
+ return normalizeRoundAndPackFloat64(
+ zSign, zExp - 10u, zFrac0, zFrac1 );
+ }
+ if ( aFrac.x < bFrac.x ) {
+ sub64( bFrac.x, bFrac.y, aFrac.x, aFrac.y, zFrac0, zFrac1 );
+ zExp = bExp;
+ zSign ^= 1u;
+ --zExp;
+ return normalizeRoundAndPackFloat64( zSign, zExp - 10u, zFrac0, zFrac1 );
+ }
+ if ( bFrac.y < aFrac.y ) {
+ sub64( aFrac.x, aFrac.y, bFrac.x, bFrac.y, zFrac0, zFrac1 );
+ zExp = aExp;
+ --zExp;
+ return normalizeRoundAndPackFloat64(
+ zSign, zExp - 10u, zFrac0, zFrac1 );
+ }
+ if ( aFrac.y < bFrac.y ) {
+ sub64( bFrac.x, bFrac.y, aFrac.x, aFrac.y, zFrac0, zFrac1 );
+ zExp = bExp;
+ zSign ^= 1u;
+ --zExp;
+ return normalizeRoundAndPackFloat64( zSign, zExp - 10u, zFrac0, zFrac1 );
+ }
+ return packFloat64(
+ uint ( FLOAT_ROUNDING_MODE == FLOAT_ROUND_DOWN ), 0u, 0u, 0u );
+}
+
+/* Returns the result of adding the double-precision floating-point values
+ * `a' and `b'. The operation is performed according to the IEEE Standard for
+ * Floating-Point Arithmetic.
+ */
+uvec2
+fadd64( uvec2 a, uvec2 b )
+{
+ uint aSign;
+ uint bSign;
+
+ aSign = extractFloat64Sign( a );
+ bSign = extractFloat64Sign( b );
+ if ( aSign == bSign ) {
+ return addFloat64Fracs( a, b, aSign );
+ } else {
+ return subFloat64Fracs( a, b, aSign );
+ }
+}
--
2.11.0
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