[Mesa-dev] [PATCH] radv/ac: fixup texture coord to have right number of channels.

Dave Airlie airlied at gmail.com
Wed Mar 8 22:27:14 UTC 2017


From: Dave Airlie <airlied at redhat.com>

Jason has patches to add validation to this area, this should fix
radv shaders.

Signed-off-by: Dave Airlie <airlied at redhat.com>
---
 src/amd/vulkan/radv_meta_bufimage.c   | 6 +++---
 src/amd/vulkan/radv_meta_resolve_cs.c | 2 +-
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/amd/vulkan/radv_meta_bufimage.c b/src/amd/vulkan/radv_meta_bufimage.c
index 9f67a68..4cdd070 100644
--- a/src/amd/vulkan/radv_meta_bufimage.c
+++ b/src/amd/vulkan/radv_meta_bufimage.c
@@ -85,7 +85,7 @@ build_nir_itob_compute_shader(struct radv_device *dev)
 	tex->sampler_dim = GLSL_SAMPLER_DIM_2D;
 	tex->op = nir_texop_txf;
 	tex->src[0].src_type = nir_tex_src_coord;
-	tex->src[0].src = nir_src_for_ssa(img_coord);
+	tex->src[0].src = nir_src_for_ssa(nir_channels(&b, img_coord, 0x3));
 	tex->src[1].src_type = nir_tex_src_lod;
 	tex->src[1].src = nir_src_for_ssa(nir_imm_int(&b, 0));
 	tex->dest_type = nir_type_float;
@@ -288,7 +288,7 @@ build_nir_btoi_compute_shader(struct radv_device *dev)
 	tex->sampler_dim = GLSL_SAMPLER_DIM_BUF;
 	tex->op = nir_texop_txf;
 	tex->src[0].src_type = nir_tex_src_coord;
-	tex->src[0].src = nir_src_for_ssa(buf_coord);
+	tex->src[0].src = nir_src_for_ssa(nir_channels(&b, buf_coord, 1));
 	tex->src[1].src_type = nir_tex_src_lod;
 	tex->src[1].src = nir_src_for_ssa(nir_imm_int(&b, 0));
 	tex->dest_type = nir_type_float;
@@ -477,7 +477,7 @@ build_nir_itoi_compute_shader(struct radv_device *dev)
 	tex->sampler_dim = GLSL_SAMPLER_DIM_2D;
 	tex->op = nir_texop_txf;
 	tex->src[0].src_type = nir_tex_src_coord;
-	tex->src[0].src = nir_src_for_ssa(src_coord);
+	tex->src[0].src = nir_src_for_ssa(nir_channels(&b, src_coord, 3));
 	tex->src[1].src_type = nir_tex_src_lod;
 	tex->src[1].src = nir_src_for_ssa(nir_imm_int(&b, 0));
 	tex->dest_type = nir_type_float;
diff --git a/src/amd/vulkan/radv_meta_resolve_cs.c b/src/amd/vulkan/radv_meta_resolve_cs.c
index 3272d1f..dc0672e 100644
--- a/src/amd/vulkan/radv_meta_resolve_cs.c
+++ b/src/amd/vulkan/radv_meta_resolve_cs.c
@@ -82,7 +82,7 @@ build_resolve_compute_shader(struct radv_device *dev, bool is_integer, int sampl
 	nir_ssa_dest_init(&dst_offset->instr, &dst_offset->dest, 2, 32, "dst_offset");
 	nir_builder_instr_insert(&b, &dst_offset->instr);
 
-	nir_ssa_def *img_coord = nir_iadd(&b, global_id, &src_offset->dest.ssa);
+	nir_ssa_def *img_coord = nir_channels(&b, nir_iadd(&b, global_id, &src_offset->dest.ssa), 0x3);
 	/* do a txf_ms on each sample */
 	nir_ssa_def *tmp;
 
-- 
2.9.3



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