[Mesa-dev] [PATCH 039/140] amdgpu/addrlib: support non-power2 height alignment (for linear surface)

[Marek Olšák]

From: Roy Zhan <roy.zhan at amd.com>

---
 src/amd/addrlib/core/addrlib1.cpp | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/src/amd/addrlib/core/addrlib1.cpp b/src/amd/addrlib/core/addrlib1.cpp
index 040891c..34e286e 100644
--- a/src/amd/addrlib/core/addrlib1.cpp
+++ b/src/amd/addrlib/core/addrlib1.cpp
@@ -3271,21 +3271,30 @@ VOID Lib::PadDimensions(
     }
     else // add this code to pass unit test, r600 linear mode is not align bpp to pow2 for linear
     {
         *pPitch += pitchAlign - 1;
         *pPitch /= pitchAlign;
         *pPitch *= pitchAlign;
     }
 
     if (padDims > 1)
     {
-        *pHeight = PowTwoAlign((*pHeight), heightAlign);
+        if (IsPow2(heightAlign))
+        {
+            *pHeight = PowTwoAlign((*pHeight), heightAlign);
+        }
+        else
+        {
+            *pHeight += heightAlign - 1;
+            *pHeight /= heightAlign;
+            *pHeight *= heightAlign;
+        }
     }
 
     if (padDims > 2 || thickness > 1)
     {
         // for cubemap single face, we do not pad slices.
         // if we pad it, the slice number should be set to 6 and current mip level > 1
         if (flags.cube && (!m_configFlags.noCubeMipSlicesPad || flags.cubeAsArray))
         {
             *pSlices = NextPow2(*pSlices);
         }
-- 
2.7.4