[Mesa-dev] [PATCH 2/9] i965: Move multiply by 4 for VS ATTR setup into the scalar backend.

Alejandro Piñeiro apinheiro at igalia.com
Fri May 5 07:17:32 UTC 2017


Reviewed-by: Alejandro Piñeiro <apinheiro at igalia.com>

On 05/05/17 04:11, Jason Ekstrand wrote:
> The vec4 backend will want to count in units of vec4s, not scalar
> components.  The simplest solution is to move the multiplication by 4
> into the scalar backend.  This also improves consistency with how we
> count varyings.
> ---
>  src/intel/compiler/brw_fs_nir.cpp | 2 +-
>  src/intel/compiler/brw_nir.c      | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp
> index 23cd4b7..3ab41df 100644
> --- a/src/intel/compiler/brw_fs_nir.cpp
> +++ b/src/intel/compiler/brw_fs_nir.cpp
> @@ -2251,7 +2251,7 @@ fs_visitor::nir_emit_vs_intrinsic(const fs_builder &bld,
>     }
>  
>     case nir_intrinsic_load_input: {
> -      fs_reg src = fs_reg(ATTR, instr->const_index[0], dest.type);
> +      fs_reg src = fs_reg(ATTR, nir_intrinsic_base(instr) * 4, dest.type);
>        unsigned first_component = nir_intrinsic_component(instr);
>        unsigned num_components = instr->num_components;
>        enum brw_reg_type type = dest.type;
> diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c
> index 0bc3237..7248594 100644
> --- a/src/intel/compiler/brw_nir.c
> +++ b/src/intel/compiler/brw_nir.c
> @@ -279,7 +279,7 @@ brw_nir_lower_vs_inputs(nir_shader *nir,
>                 int attr = nir_intrinsic_base(intrin);
>                 int slot = _mesa_bitcount_64(nir->info->inputs_read &
>                                              BITFIELD64_MASK(attr));
> -               nir_intrinsic_set_base(intrin, 4 * slot);
> +               nir_intrinsic_set_base(intrin, slot);
>              }
>           }
>        }



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