[Mesa-dev] [PATCH 5/9] intel/compiler/vs: Move inputs_read handling to generic code

Alejandro Piñeiro apinheiro at igalia.com
Fri May 5 07:20:57 UTC 2017


Reviewed-by: Alejandro Piñeiro <apinheiro at igalia.com>

On 05/05/17 04:11, Jason Ekstrand wrote:
> ---
>  src/intel/compiler/brw_vec4.cpp    | 7 +++++++
>  src/intel/vulkan/anv_pipeline.c    | 3 ---
>  src/mesa/drivers/dri/i965/brw_vs.c | 7 -------
>  3 files changed, 7 insertions(+), 10 deletions(-)
>
> diff --git a/src/intel/compiler/brw_vec4.cpp b/src/intel/compiler/brw_vec4.cpp
> index afef49a..21f34bc 100644
> --- a/src/intel/compiler/brw_vec4.cpp
> +++ b/src/intel/compiler/brw_vec4.cpp
> @@ -2784,6 +2784,13 @@ brw_compile_vs(const struct brw_compiler *compiler, void *log_data,
>        ((1 << shader->info->cull_distance_array_size) - 1) <<
>        shader->info->clip_distance_array_size;
>  
> +   prog_data->inputs_read = shader->info->inputs_read;
> +   prog_data->double_inputs_read = shader->info->double_inputs_read;
> +
> +   if (key->copy_edgeflag) {
> +      prog_data->inputs_read |= VERT_BIT_EDGEFLAG;
> +   }
> +
>     unsigned nr_attribute_slots = _mesa_bitcount_64(prog_data->inputs_read);
>  
>     /* gl_VertexID and gl_InstanceID are system values, but arrive via an
> diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
> index e96e2fc..dda5218 100644
> --- a/src/intel/vulkan/anv_pipeline.c
> +++ b/src/intel/vulkan/anv_pipeline.c
> @@ -525,9 +525,6 @@ anv_pipeline_compile_vs(struct anv_pipeline *pipeline,
>  
>        ralloc_steal(mem_ctx, nir);
>  
> -      prog_data.inputs_read = nir->info->inputs_read;
> -      prog_data.double_inputs_read = nir->info->double_inputs_read;
> -
>        brw_compute_vue_map(&pipeline->device->info,
>                            &prog_data.base.vue_map,
>                            nir->info->outputs_written,
> diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c
> index 74b07cb..9050866 100644
> --- a/src/mesa/drivers/dri/i965/brw_vs.c
> +++ b/src/mesa/drivers/dri/i965/brw_vs.c
> @@ -210,13 +210,6 @@ brw_codegen_vs_prog(struct brw_context *brw,
>  
>     uint64_t outputs_written =
>        brw_vs_outputs_written(brw, key, vp->program.info.outputs_written);
> -   prog_data.inputs_read = vp->program.info.inputs_read;
> -   prog_data.double_inputs_read = vp->program.info.double_inputs_read;
> -
> -   if (key->copy_edgeflag) {
> -      prog_data.inputs_read |= VERT_BIT_EDGEFLAG;
> -   }
> -
>     brw_compute_vue_map(devinfo,
>                         &prog_data.base.vue_map, outputs_written,
>                         vp->program.nir->info->separate_shader);



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