[Mesa-dev] [PATCH 3/3] intel: compiler: prevent integer overflow
Lionel Landwerlin
lionel.g.landwerlin at intel.com
Mon May 8 22:02:15 UTC 2017
CID: 1399477, 1399478 (Integer handling issues)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Cc: Matt Turner <mattst88 at gmail.com>
---
src/intel/compiler/brw_eu_validate.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/intel/compiler/brw_eu_validate.c b/src/intel/compiler/brw_eu_validate.c
index 2db7c5a915c..39728c19cac 100644
--- a/src/intel/compiler/brw_eu_validate.c
+++ b/src/intel/compiler/brw_eu_validate.c
@@ -621,7 +621,7 @@ general_restrictions_on_region_parameters(const struct gen_device_info *devinfo,
/* VertStride must be used to cross GRF register boundaries. This rule
* implies that elements within a 'Width' cannot cross GRF boundaries.
*/
- const uint64_t mask = (1 << element_size) - 1;
+ const uint64_t mask = (1ULL << element_size) - 1;
unsigned rowbase = subreg;
for (int y = 0; y < exec_size / width; y++) {
@@ -674,7 +674,7 @@ align1_access_mask(uint64_t access_mask[static 32],
unsigned exec_size, unsigned element_size, unsigned subreg,
unsigned vstride, unsigned width, unsigned hstride)
{
- const uint64_t mask = (1 << element_size) - 1;
+ const uint64_t mask = (1ULL << element_size) - 1;
unsigned rowbase = subreg;
unsigned element = 0;
--
2.11.0
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