[Mesa-dev] [PATCH v3 13/48] intel/fs: Use the original destination region for int MUL lowering

[Matt Turner]

On Wed, Oct 25, 2017 at 4:25 PM, Jason Ekstrand <jason at jlekstrand.net> wrote:
> Some hardware (CHV, BXT) have special restrictions on register regions
> when doing integer multiplication.  We want to respect those when we
> lower to DxW multiplication.

This is not a good commit message. I am very familiar with the CHV,
BXT restrictions you mention and I have no idea what this patch
accomplishes.

The commit message should say what the problem is and give an example,
explain how you are fixing it, and how you can reproduce the problem.
I'm going to need at least some of that information before I can look
into the SNB regression.