[Mesa-dev] [PATCH v3 13/48] intel/fs: Use the original destination region for int MUL lowering

Jason Ekstrand jason at jlekstrand.net
Tue Nov 14 15:40:21 UTC 2017

On Mon, Nov 13, 2017 at 3:32 PM, Matt Turner <mattst88 at gmail.com> wrote:

> On Wed, Oct 25, 2017 at 4:25 PM, Jason Ekstrand <jason at jlekstrand.net>
> wrote:
> > Some hardware (CHV, BXT) have special restrictions on register regions
> > when doing integer multiplication.  We want to respect those when we
> > lower to DxW multiplication.
> This is not a good commit message. I am very familiar with the CHV,
> BXT restrictions you mention and I have no idea what this patch
> accomplishes.
> The commit message should say what the problem is and give an example,
> explain how you are fixing it, and how you can reproduce the problem.
> I'm going to need at least some of that information before I can look
> into the SNB regression.

Yes, I could definitely have done better on this one.  What I was trying to
say, though too briefly, was that we have an issue with the little-core
restriction that source and destination strides must match for integer
MUL.  If you did have a strided MULL (not common, but it can happen), we
would reset the strides back to packed for some of the intermediate
calculations and this would break things.  The objective of this patch is
to use the destination region (won't be scalar) for all temporary values so
a valid MUL becomes a valid lowered MUL.  The only way I know of to
reproduce is to grab my subgroups work and run the integer multiply
reduction tests.
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