[Mesa-dev] [PATCH 09/23] radeonsi: just include si_pipe.h in r600_query.c

[Marek Olšák]

From: Marek Olšák <marek.olsak at amd.com>

---
 src/gallium/drivers/radeon/Makefile.am  | 1 +
 src/gallium/drivers/radeon/r600_query.c | 9 +++------
 2 files changed, 4 insertions(+), 6 deletions(-)

diff --git a/src/gallium/drivers/radeon/Makefile.am b/src/gallium/drivers/radeon/Makefile.am
index 7f64b76..d557092 100644
--- a/src/gallium/drivers/radeon/Makefile.am
+++ b/src/gallium/drivers/radeon/Makefile.am
@@ -1,17 +1,18 @@
 include Makefile.sources
 include $(top_srcdir)/src/gallium/Automake.inc
 
 
 AM_CFLAGS = \
 	$(GALLIUM_DRIVER_CFLAGS) \
 	$(RADEON_CFLAGS) \
+	-I$(top_srcdir)/src/amd/common \
 	-Wstrict-overflow=0
 # ^^ disable warnings about overflows (os_time_timeout)
 
 noinst_LTLIBRARIES = libradeon.la
 
 libradeon_la_SOURCES = \
 	$(C_SOURCES)
 
 if HAVE_GALLIUM_LLVM
 
diff --git a/src/gallium/drivers/radeon/r600_query.c b/src/gallium/drivers/radeon/r600_query.c
index 0a03061..8a000e2 100644
--- a/src/gallium/drivers/radeon/r600_query.c
+++ b/src/gallium/drivers/radeon/r600_query.c
@@ -15,32 +15,29 @@
  *
  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
 
+#include "../radeonsi/si_pipe.h"
 #include "r600_query.h"
 #include "r600_cs.h"
 #include "util/u_memory.h"
 #include "util/u_upload_mgr.h"
 #include "util/os_time.h"
 #include "tgsi/tgsi_text.h"
 #include "amd/common/sid.h"
 
-/* TODO: remove this: */
-void si_update_prims_generated_query_state(struct r600_common_context *rctx,
-					   unsigned type, int diff);
-
 #define R600_MAX_STREAMS 4
 
 struct r600_hw_query_params {
 	unsigned start_offset;
 	unsigned end_offset;
 	unsigned fence_offset;
 	unsigned pair_stride;
 	unsigned pair_count;
 };
 
@@ -801,21 +798,21 @@ static void r600_query_hw_do_emit_start(struct r600_common_context *ctx,
 
 static void r600_query_hw_emit_start(struct r600_common_context *ctx,
 				     struct r600_query_hw *query)
 {
 	uint64_t va;
 
 	if (!query->buffer.buf)
 		return; // previous buffer allocation failure
 
 	r600_update_occlusion_query_state(ctx, query->b.type, 1);
-	si_update_prims_generated_query_state(ctx, query->b.type, 1);
+	si_update_prims_generated_query_state((void*)ctx, query->b.type, 1);
 
 	ctx->need_gfx_cs_space(&ctx->b, query->num_cs_dw_begin + query->num_cs_dw_end,
 			       true);
 
 	/* Get a new query buffer if needed. */
 	if (query->buffer.results_end + query->result_size > query->buffer.buf->b.b.width0) {
 		struct r600_query_buffer *qbuf = MALLOC_STRUCT(r600_query_buffer);
 		*qbuf = query->buffer;
 		query->buffer.results_end = 0;
 		query->buffer.previous = qbuf;
@@ -915,21 +912,21 @@ static void r600_query_hw_emit_stop(struct r600_common_context *ctx,
 	va = query->buffer.buf->gpu_address + query->buffer.results_end;
 
 	query->ops->emit_stop(ctx, query, query->buffer.buf, va);
 
 	query->buffer.results_end += query->result_size;
 
 	if (!(query->flags & R600_QUERY_HW_FLAG_NO_START))
 		ctx->num_cs_dw_queries_suspend -= query->num_cs_dw_end;
 
 	r600_update_occlusion_query_state(ctx, query->b.type, -1);
-	si_update_prims_generated_query_state(ctx, query->b.type, -1);
+	si_update_prims_generated_query_state((void*)ctx, query->b.type, -1);
 }
 
 static void emit_set_predicate(struct r600_common_context *ctx,
 			       struct r600_resource *buf, uint64_t va,
 			       uint32_t op)
 {
 	struct radeon_winsys_cs *cs = ctx->gfx.cs;
 
 	if (ctx->chip_class >= GFX9) {
 		radeon_emit(cs, PKT3(PKT3_SET_PREDICATION, 2, 0));
-- 
2.7.4