[Mesa-dev] [PATCH] radv: do not allocate CMASK or DCC for small surfaces
Dieter Nützel
Dieter at nuetzel-hh.de
Thu Nov 30 04:26:44 UTC 2017
Tested-by: Dieter Nützel <Dieter at nuetzel-hh.de>
on RX580
with F1 2017
Dieter
Am 29.11.2017 14:48, schrieb Samuel Pitoiset:
> The idea is ported from RadeonSI, but using 512x512 instead of
> 256x256 seems slightly better. This improves dota2 performance
> by +2%.
>
> Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
> ---
> src/amd/vulkan/radv_image.c | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
> index c241e369b9..1bf2fa12ed 100644
> --- a/src/amd/vulkan/radv_image.c
> +++ b/src/amd/vulkan/radv_image.c
> @@ -805,6 +805,16 @@ radv_image_alloc_htile(struct radv_image *image)
> static inline bool
> radv_image_can_enable_dcc_or_cmask(struct radv_image *image)
> {
> + if (image->info.samples <= 1 &&
> + image->info.width <= 512 && image->info.height <= 512) {
> + /* Do not enable CMASK or DCC for small surfaces where the cost
> + * of the eliminate pass can be higher than the benefit of fast
> + * clear. RadeonSI does this, but the image threshold is
> + * different.
> + */
> + return false;
> + }
> +
> return image->usage & VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT &&
> (image->exclusive || image->queue_family_mask == 1);
> }
More information about the mesa-dev
mailing list