[Mesa-dev] [PATCH v3 00/34] i965 disk shader cache

Jordan Justen jordan.l.justen at intel.com
Sun Oct 22 20:01:08 UTC 2017


git://people.freedesktop.org/~jljusten/mesa i965-shader-cache-v3

The series adds support for a disk shader cache for i965, but it does
not enable it by default. To enable the i965 shader cache you need to
set the environment variable MESA_GLSL_CACHE_DISABLE=0.

v3:

 * Reworks suggested by Jason:

   "i965: add initial implementation of on disk shader cache" was
   reworked substantially to pull the program data read/write
   functions into two simple functions that are easily comparible.

   "intel/compiler: Remove final_program_size from brw_compile_*" was
   added as a follow on cleanup to "intel/compiler: add new field for
   storing program size"

Patch code review status:

glsl: move shader_cache type handling to glsl_types
    Reviewed-by: Timothy Arceri <tarceri at itsqueeze.com>
    Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>

nir/intrinsics: Set the correct num_indices for load_output
    Reviewed-by: Timothy Arceri <tarceri at itsqueeze.com>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>

compiler/types: Support [de]serializing void types
    Reviewed-by: Timothy Arceri <tarceri at itsqueeze.com>
    Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>

glsl: Add field initializers for glsl_struct_field default constructor
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

nir: Zero local_size const struct for valgrind & nir_serialize
    Reviewed-by: Timothy Arceri <tarceri at itsqueeze.com>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

intel/nir: Zero local index const struct for valgrind & nir_serialize
    Reviewed-by: Timothy Arceri <tarceri at itsqueeze.com>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

nir: Zero nir_load_const_instr::value for valgrind & nir_serialize
    Reviewed-by: Timothy Arceri <tarceri at itsqueeze.com>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

glsl_to_nir: Zero nir_variable struct for valgrind & nir_serialize
    Reviewed-by: Timothy Arceri <tarceri at itsqueeze.com>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

glsl_to_nir: Zero nir_constant in constant_copy for valgrind & nir_serialize
    Reviewed-by: Timothy Arceri <tarceri at itsqueeze.com>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

nir: add serialization and deserialization
    Acked-by: Timothy Arceri <tarceri at itsqueeze.com>
    Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>

nir: Add hooks for testing serialization
    Reviewed-by: Timothy Arceri <tarceri at itsqueeze.com>
    Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>

main: Add driver cache blob fields to gl_program
    Reviewed-by: Timothy Arceri <tarceri at itsqueeze.com>

glsl/shader_cache: Save and restore serialized nir in gl_program
    Reviewed-by: Timothy Arceri <tarceri at itsqueeze.com>

i965/link: Serialize program to nir after linking for shader cache

i965: Don't rely on nir for uses_texture_gather

intel/compiler: add new field for storing program size

intel/compiler: Remove final_program_size from brw_compile_*

blob: Don't set overrun if reading 0 bytes at end of data

intel/compiler: Add union types for prog_data and prog_key stages

intel/compiler: Add functions to get prog_data and prog_key sizes for a stage

i965: add initial implementation of on disk shader cache

i965: Add shader cache support for vertex and fragment stages

i965: add shader cache support for geometry shaders

i965: add shader cache support for tess stages

i965: Add shader cache support for compute
    Reviewed-by: Timothy Arceri <tarceri at itsqueeze.com>

mesa/glsl: add api_enabled flag to gl_transform_feedback_info

i965: add support for cached shaders with xfb qualifiers

i965: add cache fallback support using serialized nir
    Acked-by: Timothy Arceri <tarceri at itsqueeze.com>

i965: Don't link when the program was found in the disk cache

i965: Initialize sha1 hash of dri config options
    Reviewed-by: Timothy Arceri <tarceri at itsqueeze.com>

glsl/shader_cache: Save fs (BlendSupport) metadata
    Reviewed-by: Timothy Arceri <tarceri at itsqueeze.com>

disk_cache: Fix issue reading GLSL metadata
    Reviewed-by: Timothy Arceri <tarceri at itsqueeze.com>

dri drivers: Always add the sha1 build-id

i965: Initialize disk shader cache if MESA_GLSL_CACHE_DISABLE is false

=====

Cc: Timothy Arceri <tarceri at itsqueeze.com>
Cc: Jason Ekstrand <jason at jlekstrand.net>
Cc: Kenneth Graunke <kenneth at whitecape.org>

=====

Carl Worth (1):
  intel/compiler: add new field for storing program size

Connor Abbott (2):
  glsl: move shader_cache type handling to glsl_types
  nir: add serialization and deserialization

Jason Ekstrand (3):
  nir/intrinsics: Set the correct num_indices for load_output
  compiler/types: Support [de]serializing void types
  nir: Add hooks for testing serialization

Jordan Justen (22):
  glsl: Add field initializers for glsl_struct_field default constructor
  nir: Zero local_size const struct for valgrind & nir_serialize
  intel/nir: Zero local index const struct for valgrind & nir_serialize
  nir: Zero nir_load_const_instr::value for valgrind & nir_serialize
  glsl_to_nir: Zero nir_variable struct for valgrind & nir_serialize
  glsl_to_nir: Zero nir_constant in constant_copy for valgrind &
    nir_serialize
  main: Add driver cache blob fields to gl_program
  glsl/shader_cache: Save and restore serialized nir in gl_program
  i965/link: Serialize program to nir after linking for shader cache
  i965: Don't rely on nir for uses_texture_gather
  intel/compiler: Remove final_program_size from brw_compile_*
  blob: Don't set overrun if reading 0 bytes at end of data
  intel/compiler: Add union types for prog_data and prog_key stages
  intel/compiler: Add functions to get prog_data and prog_key sizes for
    a stage
  i965: Add shader cache support for compute
  i965: add cache fallback support using serialized nir
  i965: Don't link when the program was found in the disk cache
  i965: Initialize sha1 hash of dri config options
  glsl/shader_cache: Save fs (BlendSupport) metadata
  disk_cache: Fix issue reading GLSL metadata
  dri drivers: Always add the sha1 build-id
  i965: Initialize disk shader cache if MESA_GLSL_CACHE_DISABLE is false

Timothy Arceri (6):
  i965: add initial implementation of on disk shader cache
  i965: Add shader cache support for vertex and fragment stages
  i965: add shader cache support for geometry shaders
  i965: add shader cache support for tess stages
  mesa/glsl: add api_enabled flag to gl_transform_feedback_info
  i965: add support for cached shaders with xfb qualifiers

 src/compiler/Makefile.sources                    |    2 +
 src/compiler/blob.c                              |    2 +-
 src/compiler/glsl/glsl_to_nir.cpp                |    4 +-
 src/compiler/glsl/link_varyings.cpp              |    5 +-
 src/compiler/glsl/shader_cache.cpp               |  193 +---
 src/compiler/glsl_types.cpp                      |  174 +++
 src/compiler/glsl_types.h                        |   14 +
 src/compiler/nir/meson.build                     |    2 +
 src/compiler/nir/nir.c                           |    2 +-
 src/compiler/nir/nir.h                           |   17 +
 src/compiler/nir/nir_intrinsics.h                |    2 +-
 src/compiler/nir/nir_lower_system_values.c       |    1 +
 src/compiler/nir/nir_serialize.c                 | 1220 ++++++++++++++++++++++
 src/compiler/nir/nir_serialize.h                 |   43 +
 src/intel/blorp/blorp.c                          |   10 +-
 src/intel/blorp/blorp_blit.c                     |    5 +-
 src/intel/blorp/blorp_clear.c                    |   15 +-
 src/intel/blorp/blorp_priv.h                     |    6 +-
 src/intel/compiler/brw_compiler.c                |   36 +
 src/intel/compiler/brw_compiler.h                |   32 +-
 src/intel/compiler/brw_fs.cpp                    |    6 +-
 src/intel/compiler/brw_nir_lower_cs_intrinsics.c |    1 +
 src/intel/compiler/brw_shader.cpp                |   14 +-
 src/intel/compiler/brw_vec4.cpp                  |    7 +-
 src/intel/compiler/brw_vec4_gs_visitor.cpp       |   14 +-
 src/intel/compiler/brw_vec4_tcs.cpp              |   14 +-
 src/intel/vulkan/anv_pipeline.c                  |   23 +-
 src/mesa/drivers/dri/Makefile.am                 |    1 +
 src/mesa/drivers/dri/i965/Makefile.sources       |    1 +
 src/mesa/drivers/dri/i965/brw_context.c          |    6 +
 src/mesa/drivers/dri/i965/brw_context.h          |    1 +
 src/mesa/drivers/dri/i965/brw_cs.c               |   29 +-
 src/mesa/drivers/dri/i965/brw_cs.h               |    3 +
 src/mesa/drivers/dri/i965/brw_disk_cache.c       |  491 +++++++++
 src/mesa/drivers/dri/i965/brw_gs.c               |   27 +-
 src/mesa/drivers/dri/i965/brw_link.cpp           |   13 +
 src/mesa/drivers/dri/i965/brw_state.h            |    7 +
 src/mesa/drivers/dri/i965/brw_state_upload.c     |    3 +
 src/mesa/drivers/dri/i965/brw_tcs.c              |   28 +-
 src/mesa/drivers/dri/i965/brw_tes.c              |   27 +-
 src/mesa/drivers/dri/i965/brw_vs.c               |   31 +-
 src/mesa/drivers/dri/i965/brw_wm.c               |   33 +-
 src/mesa/drivers/dri/i965/brw_wm_surface_state.c |   12 +-
 src/mesa/drivers/dri/i965/meson.build            |    1 +
 src/mesa/drivers/dri/meson.build                 |    2 +-
 src/mesa/main/mtypes.h                           |    7 +
 src/mesa/program/program.c                       |    4 +
 src/util/disk_cache.c                            |    2 +-
 48 files changed, 2276 insertions(+), 317 deletions(-)
 create mode 100644 src/compiler/nir/nir_serialize.c
 create mode 100644 src/compiler/nir/nir_serialize.h
 create mode 100644 src/mesa/drivers/dri/i965/brw_disk_cache.c

-- 
2.15.0.rc0



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