[Mesa-dev] [PATCH v2 3/4] i965: Pass the EGL/DRI context priority through to the kernel

[Kenneth Graunke]

On Tuesday, April 11, 2017 9:11:56 AM PDT Chris Wilson wrote:
> Decode the EGL/DRI priority enum into the [-1023, 1023] range as
> interpreted by the kernel and call DRM_I915_GEM_CONTEXT_SETPARAM to
> adjust the priority. We use 0 as the default medium priority (also the
> kernel default) and so only need adjust up or down. By only doing the
> adjustment if not setting to medium, we can faithfully report any error
> whilst setting without worrying about kernel version.
> 
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Kenneth Graunke <kenneth at whitecape.org>
> ---
>  src/mesa/drivers/dri/i965/brw_bufmgr.c  | 22 ++++++++++++++++++++++
>  src/mesa/drivers/dri/i965/brw_bufmgr.h  |  3 +++
>  src/mesa/drivers/dri/i965/brw_context.c | 13 +++++++++++++
>  3 files changed, 38 insertions(+)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_bufmgr.c b/src/mesa/drivers/dri/i965/brw_bufmgr.c
> index 1c5ad2467a..ec00ba5af3 100644
> --- a/src/mesa/drivers/dri/i965/brw_bufmgr.c
> +++ b/src/mesa/drivers/dri/i965/brw_bufmgr.c
> @@ -1205,6 +1205,28 @@ brw_create_hw_context(struct brw_bufmgr *bufmgr)
>     return create.ctx_id;
>  }
>  
> +int brw_hw_context_set_priority(struct brw_bufmgr *bufmgr,
> +                                uint32_t ctx_id,
> +                                int priority)

int
brw_hw_context_set_priority(...)

Patch 2 is:
Acked-by: Kenneth Graunke <kenneth at whitecape.org>
(as long as Emil is happy, I'm fine with it)

Patches 3-4 are:
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

though I would like you to put in a #define or a comment for why you
chose 1023/2.  Maybe mention something about the range of values the
kernel allows userspace to request?  It'd be nice to see that at a
glance here without having to go look at the i915.ko source code.

> +{
> +#ifdef I915_CONTEXT_PARAM_PRIORITY
> +   struct drm_i915_gem_context_param p = {
> +      .ctx_id = ctx_id,
> +      .param = I915_CONTEXT_PARAM_PRIORITY,
> +      .value = priority,
> +   };
> +   int err;
> +
> +   err = 0;
> +   if (drmIoctl(bufmgr->fd, DRM_IOCTL_I915_GEM_CONTEXT_SETPARAM, &p))
> +      err = -errno;
> +
> +   return err;
> +#else
> +   return -EINVAL;
> +#endif
> +}
> +
>  void
>  brw_destroy_hw_context(struct brw_bufmgr *bufmgr, uint32_t ctx_id)
>  {
> diff --git a/src/mesa/drivers/dri/i965/brw_bufmgr.h b/src/mesa/drivers/dri/i965/brw_bufmgr.h
> index b27178b6fe..9b90ad4131 100644
> --- a/src/mesa/drivers/dri/i965/brw_bufmgr.h
> +++ b/src/mesa/drivers/dri/i965/brw_bufmgr.h
> @@ -263,6 +263,9 @@ void *brw_bo_map__wc(struct brw_bo *bo);
>  int brw_bo_wait(struct brw_bo *bo, int64_t timeout_ns);
>  
>  uint32_t brw_create_hw_context(struct brw_bufmgr *bufmgr);
> +int brw_hw_context_set_priority(struct brw_bufmgr *bufmgr,
> +                                uint32_t ctx_id,
> +                                int priority);
>  void brw_destroy_hw_context(struct brw_bufmgr *bufmgr, uint32_t ctx_id);
>  
>  int brw_bo_gem_export_to_prime(struct brw_bo *bo, int *prime_fd);
> diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
> index f13c61b3e0..bdc132ff84 100644
> --- a/src/mesa/drivers/dri/i965/brw_context.c
> +++ b/src/mesa/drivers/dri/i965/brw_context.c
> @@ -1102,6 +1102,19 @@ brwCreateContext(gl_api api,
>           intelDestroyContext(driContextPriv);
>           return false;
>        }
> +
> +      int hw_priority = 0;
> +      switch (priority) {
> +      case __DRI_CTX_PRIORITY_LOW: hw_priority = -1023/2; break;
> +      case __DRI_CTX_PRIORITY_HIGH: hw_priority = 1023/2; break;
> +      }
> +      if (hw_priority &&
> +          brw_hw_context_set_priority(brw->bufmgr, brw->hw_ctx, hw_priority)) {
> +         fprintf(stderr, "Failed to set priority [%d] for hardware context.\n",
> +                 hw_priority);
> +         intelDestroyContext(driContextPriv);
> +         return false;
> +      }
>     }
>  
>     if (brw_init_pipe_control(brw, devinfo)) {
> 

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