[Mesa-dev] [PATCH] intel/blorp/hiz: Emit CC viewport

[Pohjolainen, Topi]

On Tue, Apr 03, 2018 at 09:04:48PM +0300, Pohjolainen, Topi wrote:
> On Tue, Apr 03, 2018 at 07:40:34PM +0300, Topi Pohjolainen wrote:
> > Otherwise simulator for ICL complains that:
> > 
> > B-spec CC_ViewPort Minimum Depth cannot be greater than Maximum Depth
> 
> And it looks that there is real reason why even HIZ ops should
> specify it. In Bspec:
> 
> GT - 3D - vol2a.11 3D Pipeline - Windower - Depth Clear Value Format:
> 
> The clear value must be between the min and max depth values
> (inclusive) defined in the CC_VIEWPORT.

And the same text is actually found in 3DSTATE_WM_HZ_OP_BODY -
Depth Clear Value.

> 
> > 
> > CC: Jason Ekstrand <jason at jlekstrand.net>
> > CC: Kenneth Graunke <kenneth at whitecape.org>
> > Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
> > ---
> >  src/intel/blorp/blorp_genX_exec.h | 1 +
> >  1 file changed, 1 insertion(+)
> > 
> > diff --git a/src/intel/blorp/blorp_genX_exec.h b/src/intel/blorp/blorp_genX_exec.h
> > index 992bc99..e16d10c 100644
> > --- a/src/intel/blorp/blorp_genX_exec.h
> > +++ b/src/intel/blorp/blorp_genX_exec.h
> > @@ -1570,6 +1570,7 @@ blorp_emit_gen8_hiz_op(struct blorp_batch *batch,
> >      * emit 3DSTATE_MULTISAMPLE.
> >      */
> >     blorp_emit_3dstate_multisample(batch, params);
> > +   blorp_emit_cc_viewport(batch);
> >  
> >     /* If we can't alter the depth stencil config and multiple layers are
> >      * involved, the HiZ op will fail. This is because the op requires that a
> > -- 
> > 2.7.4
> >