[Mesa-dev] [PATCH] radeonsi: correct si_vgt_param_key on big endian machines

[Gert Wollny]

Am Montag, den 09.04.2018, 14:03 -0400 schrieb Marek Olšák:
> On Mon, Apr 9, 2018 at 10:51 AM, Bas Vermeulen <bas at daedalean.ai>
> wrote:
Which solution is better depends on what is done more often: reading
the index or writing to the bit fields. 

> > I am working on a new version of this patch. I have one version
> > which does away with all the bitfields, and uses functions to
> > update the index.
This emulates the code the compiler would create, but it requires that
for each bit field setters (and getters?) must be implemented. 

> > Another approach would be to change the union to a struct, and use
> > a function to get the index.
This method has the advantage that only the access to the index needs
new implementation.

> > Yet another approach would be to keep the contents of the union and
> > the index in one struct, and use a function to
> > (re)calculate the index.
I don't think that would make much sense. 

There is another option: Check at configuration time whether the bit
field layout is like the low or the high endian layout you already
implemented, and instead of basing the selection of the struct layout
on the big/low-endianess of the architecture, base it on this test.

It would probably be prudent to test both layouts and then fail
configuration if non of the two reflect the actual layout (at which
point one would have to thing about how to implement all the bit
shifting properly). 

> > 
> > Which would you prefer?
> > 
> 
> I don't mind bitfields. They make the code nice and tiny. Shifts
> would decrease readability.
The problem is, that the layout of bitfields is compiler dependend. 

Best, 
Gert