[Mesa-dev] [PATCH v2 09/18] intel/compiler: lower some 16-bit integer operations to 32-bit

[Jason Ekstrand]

Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

On Mon, Apr 30, 2018 at 7:18 AM, Iago Toral Quiroga <itoral at igalia.com>
wrote:

> These are not supported in hardware for 16-bit integers.
>
> We do the lowering pass after the optimization loop to ensure that we
> lower ALU operations injected by algebraic optimizations too.
> ---
>  src/intel/compiler/brw_nir.c | 21 +++++++++++++++++++++
>  1 file changed, 21 insertions(+)
>
> diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c
> index 16b0d86814..fb5e08fb33 100644
> --- a/src/intel/compiler/brw_nir.c
> +++ b/src/intel/compiler/brw_nir.c
> @@ -590,6 +590,25 @@ brw_nir_optimize(nir_shader *nir, const struct
> brw_compiler *compiler,
>     return nir;
>  }
>
> +static unsigned
> +lower_bit_size_callback(const nir_alu_instr *alu, void *data)
> +{
> +   assert(alu->dest.dest.is_ssa);
> +   if (alu->dest.dest.ssa.bit_size != 16)
> +      return 0;
> +
> +   switch (alu->op) {
> +   case nir_op_idiv:
> +   case nir_op_imod:
> +   case nir_op_irem:
> +   case nir_op_udiv:
> +   case nir_op_umod:
> +      return 32;
> +   default:
> +      return 0;
> +   }
> +}
> +
>  /* Does some simple lowering and runs the standard suite of optimizations
>   *
>   * This is intended to be called more-or-less directly after you get the
> @@ -643,6 +662,8 @@ brw_preprocess_nir(const struct brw_compiler
> *compiler, nir_shader *nir)
>
>     nir = brw_nir_optimize(nir, compiler, is_scalar);
>
> +   nir_lower_bit_size(nir, lower_bit_size_callback, NULL);
> +
>     if (is_scalar) {
>        OPT(nir_lower_load_const_to_scalar);
>     }
> --
> 2.14.1
>
>
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