[Mesa-dev] [PATCH 06/18] radeonsi: inline resq_fetch_args
Marek Olšák
maraeo at gmail.com
Sat Aug 4 07:54:45 UTC 2018
From: Marek Olšák <marek.olsak at amd.com>
---
.../drivers/radeonsi/si_shader_tgsi_mem.c | 96 +++++++------------
1 file changed, 34 insertions(+), 62 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
index 4fe8c41835e..d2aa8265b67 100644
--- a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
+++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
@@ -979,34 +979,20 @@ static void atomic_emit(
args.resource = emit_data->args[num_data];
memcpy(args.coords, &emit_data->args[num_data + 1], sizeof(args.coords));
args.dim = ac_image_dim_from_tgsi_target(ctx->screen, inst->Memory.Texture);
emit_data->output[emit_data->chan] =
ac_to_float(&ctx->ac, ac_build_image_opcode(&ctx->ac, &args));
}
}
-static void set_tex_fetch_args(struct si_shader_context *ctx,
- struct lp_build_emit_data *emit_data,
- struct ac_image_args *args,
- unsigned target)
-{
- args->dim = ac_texture_dim_from_tgsi_target(ctx->screen, target);
- args->unorm = target == TGSI_TEXTURE_RECT ||
- target == TGSI_TEXTURE_SHADOWRECT;
-
- /* Ugly, but we seem to have no other choice right now. */
- STATIC_ASSERT(sizeof(*args) <= sizeof(emit_data->args));
- memcpy(emit_data->args, args, sizeof(*args));
-}
-
static LLVMValueRef fix_resinfo(struct si_shader_context *ctx,
unsigned target, LLVMValueRef out)
{
LLVMBuilderRef builder = ctx->ac.builder;
/* 1D textures are allocated and used as 2D on GFX9. */
if (ctx->screen->info.chip_class >= GFX9 &&
(target == TGSI_TEXTURE_1D_ARRAY ||
target == TGSI_TEXTURE_SHADOW1D_ARRAY)) {
LLVMValueRef layers =
@@ -1022,80 +1008,67 @@ static LLVMValueRef fix_resinfo(struct si_shader_context *ctx,
LLVMValueRef imm2 = LLVMConstInt(ctx->i32, 2, 0);
LLVMValueRef z = LLVMBuildExtractElement(builder, out, imm2, "");
z = LLVMBuildSDiv(builder, z, LLVMConstInt(ctx->i32, 6, 0), "");
out = LLVMBuildInsertElement(builder, out, z, imm2, "");
}
return out;
}
-static void resq_fetch_args(
- struct lp_build_tgsi_context * bld_base,
- struct lp_build_emit_data * emit_data)
-{
- struct si_shader_context *ctx = si_shader_context(bld_base);
- const struct tgsi_full_instruction *inst = emit_data->inst;
- const struct tgsi_full_src_register *reg = &inst->Src[0];
-
- emit_data->dst_type = ctx->v4i32;
-
- if (reg->Register.File == TGSI_FILE_BUFFER) {
- emit_data->args[0] = shader_buffer_fetch_rsrc(ctx, reg, false);
- emit_data->arg_count = 1;
- } else if (inst->Memory.Texture == TGSI_TEXTURE_BUFFER) {
- image_fetch_rsrc(bld_base, reg, false, inst->Memory.Texture,
- &emit_data->args[0]);
- emit_data->arg_count = 1;
- } else {
- struct ac_image_args args = {};
- unsigned image_target;
-
- if (inst->Memory.Texture == TGSI_TEXTURE_3D)
- image_target = TGSI_TEXTURE_2D_ARRAY;
- else
- image_target = inst->Memory.Texture;
-
- image_fetch_rsrc(bld_base, reg, false, inst->Memory.Texture,
- &args.resource);
- args.lod = ctx->i32_0;
- args.dmask = 0xf;
- set_tex_fetch_args(ctx, emit_data, &args, image_target);
- }
-}
-
static void resq_emit(
const struct lp_build_tgsi_action *action,
struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
LLVMBuilderRef builder = ctx->ac.builder;
const struct tgsi_full_instruction *inst = emit_data->inst;
- LLVMValueRef out;
+ const struct tgsi_full_src_register *reg = &inst->Src[0];
- if (inst->Src[0].Register.File == TGSI_FILE_BUFFER) {
- out = LLVMBuildExtractElement(builder, emit_data->args[0],
- LLVMConstInt(ctx->i32, 2, 0), "");
- } else if (inst->Memory.Texture == TGSI_TEXTURE_BUFFER) {
- out = get_buffer_size(bld_base, emit_data->args[0]);
- } else {
- struct ac_image_args args;
+ if (reg->Register.File == TGSI_FILE_BUFFER) {
+ LLVMValueRef rsrc = shader_buffer_fetch_rsrc(ctx, reg, false);
- memcpy(&args, emit_data->args, sizeof(args)); /* ugly */
- args.opcode = ac_image_get_resinfo;
- out = ac_build_image_opcode(&ctx->ac, &args);
+ emit_data->output[emit_data->chan] =
+ LLVMBuildExtractElement(builder, rsrc,
+ LLVMConstInt(ctx->i32, 2, 0), "");
+ return;
+ }
+
+ /* Images */
+ if (inst->Memory.Texture == TGSI_TEXTURE_BUFFER) {
+ LLVMValueRef rsrc;
- out = fix_resinfo(ctx, inst->Memory.Texture, out);
+ image_fetch_rsrc(bld_base, reg, false, inst->Memory.Texture, &rsrc);
+ emit_data->output[emit_data->chan] =
+ get_buffer_size(bld_base, rsrc);
+ return;
}
- emit_data->output[emit_data->chan] = out;
+ struct ac_image_args args = {};
+ unsigned image_target;
+
+ if (inst->Memory.Texture == TGSI_TEXTURE_3D)
+ image_target = TGSI_TEXTURE_2D_ARRAY;
+ else
+ image_target = inst->Memory.Texture;
+
+ image_fetch_rsrc(bld_base, reg, false, inst->Memory.Texture,
+ &args.resource);
+ args.opcode = ac_image_get_resinfo;
+ args.dim = ac_texture_dim_from_tgsi_target(ctx->screen, image_target);
+ args.lod = ctx->i32_0;
+ args.dmask = 0xf;
+
+ emit_data->output[emit_data->chan] =
+ fix_resinfo(ctx, inst->Memory.Texture,
+ ac_build_image_opcode(&ctx->ac, &args));
}
/**
* Load an image view, fmask view. or sampler state descriptor.
*/
LLVMValueRef si_load_sampler_desc(struct si_shader_context *ctx,
LLVMValueRef list, LLVMValueRef index,
enum ac_descriptor_type type)
{
LLVMBuilderRef builder = ctx->ac.builder;
@@ -1872,21 +1845,20 @@ void si_shader_context_init_mem(struct si_shader_context *ctx)
bld_base->op_actions[TGSI_OPCODE_TG4].emit = build_tex_intrinsic;
bld_base->op_actions[TGSI_OPCODE_LODQ].emit = build_tex_intrinsic;
bld_base->op_actions[TGSI_OPCODE_TXQS].emit = si_llvm_emit_txqs;
bld_base->op_actions[TGSI_OPCODE_FBFETCH].emit = si_llvm_emit_fbfetch;
bld_base->op_actions[TGSI_OPCODE_LOAD].fetch_args = load_fetch_args;
bld_base->op_actions[TGSI_OPCODE_LOAD].emit = load_emit;
bld_base->op_actions[TGSI_OPCODE_STORE].fetch_args = store_fetch_args;
bld_base->op_actions[TGSI_OPCODE_STORE].emit = store_emit;
- bld_base->op_actions[TGSI_OPCODE_RESQ].fetch_args = resq_fetch_args;
bld_base->op_actions[TGSI_OPCODE_RESQ].emit = resq_emit;
tmpl.fetch_args = atomic_fetch_args;
tmpl.emit = atomic_emit;
bld_base->op_actions[TGSI_OPCODE_ATOMUADD] = tmpl;
bld_base->op_actions[TGSI_OPCODE_ATOMUADD].intr_name = "add";
bld_base->op_actions[TGSI_OPCODE_ATOMXCHG] = tmpl;
bld_base->op_actions[TGSI_OPCODE_ATOMXCHG].intr_name = "swap";
bld_base->op_actions[TGSI_OPCODE_ATOMCAS] = tmpl;
bld_base->op_actions[TGSI_OPCODE_ATOMCAS].intr_name = "cmpswap";
--
2.17.1
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