[Mesa-dev] [PATCH 07/18] radeonsi: merge txq_emit and resq_emit

Marek Olšák maraeo at gmail.com
Sat Aug 4 07:54:46 UTC 2018


From: Marek Olšák <marek.olsak at amd.com>

---
 .../drivers/radeonsi/si_shader_tgsi_mem.c     | 93 +++++++++----------
 1 file changed, 45 insertions(+), 48 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
index d2aa8265b67..68ef9f6d8d0 100644
--- a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
+++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
@@ -22,20 +22,25 @@
  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
 
 #include "si_shader_internal.h"
 #include "si_pipe.h"
 #include "sid.h"
 #include "tgsi/tgsi_build.h"
 #include "tgsi/tgsi_util.h"
 #include "ac_llvm_util.h"
 
+static void tex_fetch_ptrs(struct lp_build_tgsi_context *bld_base,
+			   struct lp_build_emit_data *emit_data,
+			   LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
+			   LLVMValueRef *fmask_ptr);
+
 /**
  * Given a v8i32 resource descriptor for a buffer, extract the size of the
  * buffer in number of elements and return it as an i32.
  */
 static LLVMValueRef get_buffer_size(
 	struct lp_build_tgsi_context *bld_base,
 	LLVMValueRef descriptor)
 {
 	struct si_shader_context *ctx = si_shader_context(bld_base);
 	LLVMBuilderRef builder = ctx->ac.builder;
@@ -1016,59 +1021,79 @@ static LLVMValueRef fix_resinfo(struct si_shader_context *ctx,
 }
 
 static void resq_emit(
 		const struct lp_build_tgsi_action *action,
 		struct lp_build_tgsi_context *bld_base,
 		struct lp_build_emit_data *emit_data)
 {
 	struct si_shader_context *ctx = si_shader_context(bld_base);
 	LLVMBuilderRef builder = ctx->ac.builder;
 	const struct tgsi_full_instruction *inst = emit_data->inst;
-	const struct tgsi_full_src_register *reg = &inst->Src[0];
+	const struct tgsi_full_src_register *reg =
+		&inst->Src[inst->Instruction.Opcode == TGSI_OPCODE_TXQ ? 1 : 0];
 
 	if (reg->Register.File == TGSI_FILE_BUFFER) {
 		LLVMValueRef rsrc = shader_buffer_fetch_rsrc(ctx, reg, false);
 
 		emit_data->output[emit_data->chan] =
 			LLVMBuildExtractElement(builder, rsrc,
 						LLVMConstInt(ctx->i32, 2, 0), "");
 		return;
 	}
 
-	/* Images */
-	if (inst->Memory.Texture == TGSI_TEXTURE_BUFFER) {
+	if (inst->Instruction.Opcode == TGSI_OPCODE_TXQ &&
+	    inst->Texture.Texture == TGSI_TEXTURE_BUFFER) {
+		LLVMValueRef rsrc;
+
+		tex_fetch_ptrs(bld_base, emit_data, &rsrc, NULL, NULL);
+		/* Read the size from the buffer descriptor directly. */
+		emit_data->output[emit_data->chan] =
+			get_buffer_size(bld_base, rsrc);
+		return;
+	}
+
+	if (inst->Instruction.Opcode == TGSI_OPCODE_RESQ &&
+	    inst->Memory.Texture == TGSI_TEXTURE_BUFFER) {
 		LLVMValueRef rsrc;
 
 		image_fetch_rsrc(bld_base, reg, false, inst->Memory.Texture, &rsrc);
 		emit_data->output[emit_data->chan] =
 			get_buffer_size(bld_base, rsrc);
 		return;
 	}
 
-	struct ac_image_args args = {};
-	unsigned image_target;
+	unsigned target;
 
-	if (inst->Memory.Texture == TGSI_TEXTURE_3D)
-		image_target = TGSI_TEXTURE_2D_ARRAY;
-	else
-		image_target = inst->Memory.Texture;
+	if (inst->Instruction.Opcode == TGSI_OPCODE_TXQ) {
+		target = inst->Texture.Texture;
+	} else {
+		if (inst->Memory.Texture == TGSI_TEXTURE_3D)
+			target = TGSI_TEXTURE_2D_ARRAY;
+		else
+			target = inst->Memory.Texture;
+	}
 
-	image_fetch_rsrc(bld_base, reg, false, inst->Memory.Texture,
-			 &args.resource);
+	struct ac_image_args args = {};
 	args.opcode = ac_image_get_resinfo;
-	args.dim = ac_texture_dim_from_tgsi_target(ctx->screen, image_target);
-	args.lod = ctx->i32_0;
+	args.dim = ac_texture_dim_from_tgsi_target(ctx->screen, target);
 	args.dmask = 0xf;
 
+	if (inst->Instruction.Opcode == TGSI_OPCODE_TXQ) {
+		tex_fetch_ptrs(bld_base, emit_data, &args.resource, NULL, NULL);
+		args.lod = lp_build_emit_fetch(bld_base, inst, 0, TGSI_CHAN_X);
+	} else {
+		image_fetch_rsrc(bld_base, reg, false, target, &args.resource);
+		args.lod = ctx->i32_0;
+	}
+
 	emit_data->output[emit_data->chan] =
-		fix_resinfo(ctx, inst->Memory.Texture,
-			    ac_build_image_opcode(&ctx->ac, &args));
+		fix_resinfo(ctx, target, ac_build_image_opcode(&ctx->ac, &args));
 }
 
 /**
  * Load an image view, fmask view. or sampler state descriptor.
  */
 LLVMValueRef si_load_sampler_desc(struct si_shader_context *ctx,
 				  LLVMValueRef list, LLVMValueRef index,
 				  enum ac_descriptor_type type)
 {
 	LLVMBuilderRef builder = ctx->ac.builder;
@@ -1123,24 +1148,24 @@ static LLVMValueRef sici_fix_sampler_aniso(struct si_shader_context *ctx,
 
 	img7 = LLVMBuildExtractElement(ctx->ac.builder, res,
 				       LLVMConstInt(ctx->i32, 7, 0), "");
 	samp0 = LLVMBuildExtractElement(ctx->ac.builder, samp,
 					ctx->i32_0, "");
 	samp0 = LLVMBuildAnd(ctx->ac.builder, samp0, img7, "");
 	return LLVMBuildInsertElement(ctx->ac.builder, samp, samp0,
 				      ctx->i32_0, "");
 }
 
-static void tex_fetch_ptrs(
-	struct lp_build_tgsi_context *bld_base,
-	struct lp_build_emit_data *emit_data,
-	LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr, LLVMValueRef *fmask_ptr)
+static void tex_fetch_ptrs(struct lp_build_tgsi_context *bld_base,
+			   struct lp_build_emit_data *emit_data,
+			   LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
+			   LLVMValueRef *fmask_ptr)
 {
 	struct si_shader_context *ctx = si_shader_context(bld_base);
 	LLVMValueRef list = LLVMGetParam(ctx->main_fn, ctx->param_samplers_and_images);
 	const struct tgsi_full_instruction *inst = emit_data->inst;
 	const struct tgsi_full_src_register *reg;
 	unsigned target = inst->Texture.Texture;
 	unsigned sampler_src;
 	LLVMValueRef index;
 
 	sampler_src = emit_data->inst->Instruction.NumSrcRegs - 1;
@@ -1185,48 +1210,20 @@ static void tex_fetch_ptrs(
 						          AC_DESC_FMASK);
 	} else if (target != TGSI_TEXTURE_BUFFER) {
 		if (samp_ptr) {
 			*samp_ptr = si_load_sampler_desc(ctx, list, index,
 						         AC_DESC_SAMPLER);
 			*samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
 		}
 	}
 }
 
-static void txq_emit(const struct lp_build_tgsi_action *action,
-		     struct lp_build_tgsi_context *bld_base,
-		     struct lp_build_emit_data *emit_data)
-{
-	struct si_shader_context *ctx = si_shader_context(bld_base);
-	const struct tgsi_full_instruction *inst = emit_data->inst;
-	unsigned target = inst->Texture.Texture;
-	struct ac_image_args args = {};
-
-	tex_fetch_ptrs(bld_base, emit_data, &args.resource, NULL, NULL);
-
-	if (target == TGSI_TEXTURE_BUFFER) {
-		/* Read the size from the buffer descriptor directly. */
-		emit_data->output[emit_data->chan] =
-			get_buffer_size(bld_base, args.resource);
-		return;
-	}
-
-	args.opcode = ac_image_get_resinfo;
-	args.dim = ac_texture_dim_from_tgsi_target(ctx->screen, target);
-	args.lod = lp_build_emit_fetch(bld_base, inst, 0, TGSI_CHAN_X);
-	args.dmask = 0xf;
-
-	LLVMValueRef result = ac_build_image_opcode(&ctx->ac, &args);
-
-	emit_data->output[emit_data->chan] = fix_resinfo(ctx, target, result);
-}
-
 /* Gather4 should follow the same rules as bilinear filtering, but the hardware
  * incorrectly forces nearest filtering if the texture format is integer.
  * The only effect it has on Gather4, which always returns 4 texels for
  * bilinear filtering, is that the final coordinates are off by 0.5 of
  * the texel size.
  *
  * The workaround is to subtract 0.5 from the unnormalized coordinates,
  * or (0.5 / size) from the normalized coordinates.
  *
  * However, cube textures with 8_8_8_8 data formats require a different
@@ -1834,21 +1831,21 @@ void si_shader_context_init_mem(struct si_shader_context *ctx)
 	bld_base->op_actions[TGSI_OPCODE_TEX_LZ].emit = build_tex_intrinsic;
 	bld_base->op_actions[TGSI_OPCODE_TEX2].emit = build_tex_intrinsic;
 	bld_base->op_actions[TGSI_OPCODE_TXB].emit = build_tex_intrinsic;
 	bld_base->op_actions[TGSI_OPCODE_TXB2].emit = build_tex_intrinsic;
 	bld_base->op_actions[TGSI_OPCODE_TXD].emit = build_tex_intrinsic;
 	bld_base->op_actions[TGSI_OPCODE_TXF].emit = build_tex_intrinsic;
 	bld_base->op_actions[TGSI_OPCODE_TXF_LZ].emit = build_tex_intrinsic;
 	bld_base->op_actions[TGSI_OPCODE_TXL].emit = build_tex_intrinsic;
 	bld_base->op_actions[TGSI_OPCODE_TXL2].emit = build_tex_intrinsic;
 	bld_base->op_actions[TGSI_OPCODE_TXP].emit = build_tex_intrinsic;
-	bld_base->op_actions[TGSI_OPCODE_TXQ].emit = txq_emit;
+	bld_base->op_actions[TGSI_OPCODE_TXQ].emit = resq_emit;
 	bld_base->op_actions[TGSI_OPCODE_TG4].emit = build_tex_intrinsic;
 	bld_base->op_actions[TGSI_OPCODE_LODQ].emit = build_tex_intrinsic;
 	bld_base->op_actions[TGSI_OPCODE_TXQS].emit = si_llvm_emit_txqs;
 
 	bld_base->op_actions[TGSI_OPCODE_FBFETCH].emit = si_llvm_emit_fbfetch;
 
 	bld_base->op_actions[TGSI_OPCODE_LOAD].fetch_args = load_fetch_args;
 	bld_base->op_actions[TGSI_OPCODE_LOAD].emit = load_emit;
 	bld_base->op_actions[TGSI_OPCODE_STORE].fetch_args = store_fetch_args;
 	bld_base->op_actions[TGSI_OPCODE_STORE].emit = store_emit;
-- 
2.17.1



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