[Mesa-dev] [PATCH v2 17/53] intel/compiler: lower some 16-bit float operations to 32-bit

Iago Toral Quiroga itoral at igalia.com
Wed Dec 19 11:50:45 UTC 2018


The hardware doesn't support half-float for these.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
---
 src/intel/compiler/brw_nir.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c
index a1ab8290271..8801f7f77b0 100644
--- a/src/intel/compiler/brw_nir.c
+++ b/src/intel/compiler/brw_nir.c
@@ -621,6 +621,11 @@ lower_bit_size_callback(const nir_alu_instr *alu, UNUSED void *data)
    case nir_op_irem:
    case nir_op_udiv:
    case nir_op_umod:
+   case nir_op_fceil:
+   case nir_op_ffloor:
+   case nir_op_ffract:
+   case nir_op_fround_even:
+   case nir_op_ftrunc:
       return 32;
    default:
       return 0;
-- 
2.17.1



More information about the mesa-dev mailing list