[Mesa-dev] [PATCH v2 16/53] intel/compiler: handle conversions to half-float

[Pohjolainen, Topi]

On Wed, Dec 19, 2018 at 12:50:44PM +0100, Iago Toral Quiroga wrote:
> There are some hardware restrictions that brw_nir_lower_conversions should
> have taken care of before we get here.

This patch and v2 of the previous:

Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>

> ---
>  src/intel/compiler/brw_fs_nir.cpp | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp
> index d12b5bc7652..797050e8f02 100644
> --- a/src/intel/compiler/brw_fs_nir.cpp
> +++ b/src/intel/compiler/brw_fs_nir.cpp
> @@ -816,6 +816,9 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr)
>         */
>  
>     case nir_op_f2f16:
> +   case nir_op_i2f16:
> +   case nir_op_u2f16:
> +      assert(type_sz(op[0].type) < 8); /* brw_nir_lower_conversions */
>        inst = bld.MOV(result, op[0]);
>        inst->saturate = instr->dest.saturate;
>        break;
> @@ -857,8 +860,6 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr)
>     case nir_op_u2u32:
>     case nir_op_i2i16:
>     case nir_op_u2u16:
> -   case nir_op_i2f16:
> -   case nir_op_u2f16:
>     case nir_op_i2i8:
>     case nir_op_u2u8:
>        inst = bld.MOV(result, op[0]);
> -- 
> 2.17.1
> 
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