[Mesa-dev] [PATCH 2/2] intel/compiler: Use null destination register for memory fence messages

[Anuj Phogat]

On Wed, Feb 7, 2018 at 2:46 PM, Kenneth Graunke <kenneth at whitecape.org>
wrote:

> On Wednesday, February 7, 2018 1:21:53 PM PST Anuj Phogat wrote:
> > On Wed, Feb 7, 2018 at 12:24 PM, Francisco Jerez wrote:
> > > Anuj Phogat writes:
> > > > On Wed, Feb 7, 2018 at 11:55 AM, Francisco Jerez wrote:
> > > > > You can also just drop the patch, unless you want to change the
> > > > > front-end in addition to stop allocating a destination for memory
> fences
> > > > > on HSW-SKL in order to save a small amount of register pressure?
> > > > >
> > > > It also fixes a fulsim error other than reducing register pressure.
> > >
> > > On what platform?
> >
> > I noticed this on Icelake. But, I'm sure it exists on CNL as well.
>
> But in patch 1, you always set commit enable on Gen10+.  So you wouldn't
> hit the "no commit" case that wants a null destination.
>
> I'm guessing you saw that before you wrote patch 1 (and reordered them)?
>
​I think that's what happened. I'll test it again.​
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