[Mesa-dev] [PATCH 02/14] ac/shader_info: start gathering tess output info

[Dave Airlie]

From: Dave Airlie <airlied at redhat.com>

This gathers the ls outputs written by the vertex shader,
and the tcs outputs, these are needed to calculate certain
tcs parameters.

These have to be separate for combined gfx9 shaders.

Signed-off-by: Dave Airlie <airlied at redhat.com>
---
 src/amd/common/ac_shader_info.c | 48 +++++++++++++++++++++++++++++++++++++++--
 src/amd/common/ac_shader_info.h |  5 +++++
 2 files changed, 51 insertions(+), 2 deletions(-)

diff --git a/src/amd/common/ac_shader_info.c b/src/amd/common/ac_shader_info.c
index 5ae8a720462..5f2b34e34d0 100644
--- a/src/amd/common/ac_shader_info.c
+++ b/src/amd/common/ac_shader_info.c
@@ -30,6 +30,23 @@ static void mark_sampler_desc(const nir_variable *var,
 	info->desc_set_used_mask |= (1 << var->data.descriptor_set);
 }
 
+static void mark_ls_output(struct ac_shader_info *info,
+			   uint32_t param, int num_slots)
+{
+	uint64_t mask = (1ull << num_slots) - 1ull;
+	info->vs.ls_outputs_written |= (mask << param);
+}
+
+static void mark_tess_output(struct ac_shader_info *info,
+			     bool is_patch, uint32_t param, int num_slots)
+{
+	uint64_t mask = (1ull << num_slots) - 1ull;
+	if (is_patch)
+		info->tcs.patch_outputs_written |= (mask << param);
+	else
+		info->tcs.outputs_written |= (mask << param);
+}
+
 static void
 gather_intrinsic_info(const nir_shader *nir, const nir_intrinsic_instr *instr,
 		      struct ac_shader_info *info)
@@ -146,6 +163,18 @@ gather_intrinsic_info(const nir_shader *nir, const nir_intrinsic_instr *instr,
 			}
 		}
 		break;
+	case nir_intrinsic_store_var:
+		if (nir->info.stage == MESA_SHADER_TESS_CTRL) {
+			nir_deref_var *dvar = instr->variables[0];
+			nir_variable *var = dvar->var;
+
+			if (var->data.mode == nir_var_shader_out) {
+				unsigned param = shader_io_get_unique_index(var->data.location);
+				int num_slots = glsl_count_attribute_slots(glsl_without_array(var->type), false);
+				mark_tess_output(info, var->data.patch, param, num_slots);
+			}
+		}
+		break;
 	default:
 		break;
 	}
@@ -238,14 +267,29 @@ gather_info_output_decl_ps(const nir_shader *nir, const nir_variable *var,
 	}
 }
 
+static void
+gather_info_output_decl_vs(const nir_shader *nir, const nir_variable *var,
+			   struct ac_shader_info *info)
+{
+	int idx = var->data.location;
+	unsigned param = shader_io_get_unique_index(idx);
+	int num_slots = glsl_count_attribute_slots(var->type, false);
+	mark_ls_output(info, param, num_slots);
+}
+
 static void
 gather_info_output_decl(const nir_shader *nir, const nir_variable *var,
-			struct ac_shader_info *info)
+			struct ac_shader_info *info,
+			const struct ac_nir_compiler_options *options)
 {
 	switch (nir->info.stage) {
 	case MESA_SHADER_FRAGMENT:
 		gather_info_output_decl_ps(nir, var, info);
 		break;
+	case MESA_SHADER_VERTEX:
+		if (options->key.vs.as_ls)
+			gather_info_output_decl_vs(nir, var, info);
+		break;
 	default:
 		break;
 	}
@@ -270,5 +314,5 @@ ac_nir_shader_info_pass(const struct nir_shader *nir,
 	}
 
 	nir_foreach_variable(variable, &nir->outputs)
-		gather_info_output_decl(nir, variable, info);
+		gather_info_output_decl(nir, variable, info, options);
 }
diff --git a/src/amd/common/ac_shader_info.h b/src/amd/common/ac_shader_info.h
index 9574380877a..52741f5935c 100644
--- a/src/amd/common/ac_shader_info.h
+++ b/src/amd/common/ac_shader_info.h
@@ -37,6 +37,7 @@ struct ac_shader_info {
 	bool uses_invocation_id;
 	bool uses_prim_id;
 	struct {
+		uint64_t ls_outputs_written;
 		uint8_t input_usage_mask[VERT_ATTRIB_MAX];
 		bool has_vertex_buffers; /* needs vertex buffers and base/start */
 		bool needs_draw_id;
@@ -57,6 +58,10 @@ struct ac_shader_info {
 		bool uses_thread_id[3];
 		bool uses_local_invocation_idx;
 	} cs;
+	struct {
+		uint64_t outputs_written;
+		uint64_t patch_outputs_written;
+	} tcs;
 };
 
 /* A NIR pass to gather all the info needed to optimise the allocation patterns
-- 
2.14.3