[Mesa-dev] [PATCH v3 00/13] Use clear color address in surface state.
Rafael Antognolli
rafael.antognolli at intel.com
Wed Feb 21 21:45:09 UTC 2018
Rebase of this series after lots of aux surface changes on anv.
Cc: Jason Ekstrand <jason at jlekstrand.net>
Cc: Jordan Justen <jordan.l.justen at intel.com>
Cc: Topi Pohjolainen <topi.pohjolainen at intel.com>
Rafael Antognolli (13):
anv/image: Do not override lower bits of dword.
genxml: Preserve fields that share dword space with addresses.
intel/genxml: Use a single field for clear color address on gen10.
intel/isl: Update size of clear color value.
intel/genxml: Add Clear Color struct.
intel/isl: Add support to emit clear value address.
intel/blorp: Add suport for fast clear address.
i965/miptree: Add space to store the clear value in the aux surface.
i965/blorp: Update the fast clear color entry buffer.
i965/surface_state: Emit the clear color address instead of value.
i965/surface_state: Silence warning.
anv: Emit the fast clear color address, instead of value.
anv: Use clear address for HiZ fast clears too.
src/intel/blorp/blorp_genX_exec.h | 12 ++++--
src/intel/genxml/gen10.xml | 15 +++++--
src/intel/genxml/gen11.xml | 7 ++--
src/intel/genxml/gen_pack_header.py | 9 +++-
src/intel/isl/isl.c | 29 +++++++++----
src/intel/isl/isl.h | 14 +++++++
src/intel/isl/isl_surface_state.c | 18 ++++++--
src/intel/vulkan/anv_device.c | 19 +++++++++
src/intel/vulkan/anv_image.c | 53 ++++++++++++++++++------
src/intel/vulkan/anv_private.h | 8 +++-
src/intel/vulkan/genX_cmd_buffer.c | 52 +++++++++++++++++++++--
src/mesa/drivers/dri/i965/brw_blorp.c | 26 ++++++++++++
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 18 +++++++-
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 10 +++++
14 files changed, 245 insertions(+), 45 deletions(-)
--
2.14.3
More information about the mesa-dev
mailing list