[Mesa-dev] [PATCH] anv: Don't assert that stencil HiZ clears are single-slice

[Nanley Chery]

On Wed, Feb 21, 2018 at 01:08:26PM -0800, Jason Ekstrand wrote:
> It's true for depth HiZ clears because we only have HiZ on single-slice
> images right now.  However, for stencil-only clears there is no such
> restriction.
> ---
>  src/intel/vulkan/genX_cmd_buffer.c | 9 ++++++---
>  1 file changed, 6 insertions(+), 3 deletions(-)
> 

This patch is
Reviewed-by: Nanley Chery <nanley.g.chery at intel.com>

> diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c
> index 8015a42..ce54624 100644
> --- a/src/intel/vulkan/genX_cmd_buffer.c
> +++ b/src/intel/vulkan/genX_cmd_buffer.c
> @@ -3438,9 +3438,12 @@ cmd_buffer_begin_subpass(struct anv_cmd_buffer *cmd_buffer,
>                                                       VK_IMAGE_ASPECT_STENCIL_BIT)) {
>           if (att_state->fast_clear) {
>              /* We currently only support HiZ for single-layer images */
> -            assert(iview->planes[0].isl.base_level == 0);
> -            assert(iview->planes[0].isl.base_array_layer == 0);
> -            assert(fb->layers == 1);
> +            if (att_state->pending_clear_aspects & VK_IMAGE_ASPECT_DEPTH_BIT) {
> +               assert(iview->image->planes[0].aux_usage == ISL_AUX_USAGE_HIZ);
> +               assert(iview->planes[0].isl.base_level == 0);
> +               assert(iview->planes[0].isl.base_array_layer == 0);
> +               assert(fb->layers == 1);
> +            }
>  
>              anv_image_hiz_clear(cmd_buffer, image,
>                                  att_state->pending_clear_aspects,
> -- 
> 2.5.0.400.gff86faf
> 
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