[Mesa-dev] [PATCH 6/8] radeonsi: assume has_virtual_memory == true

[Marek Olšák]

From: Marek Olšák <marek.olsak at amd.com>

---
 src/gallium/drivers/radeon/r600_buffer_common.c | 28 ++++++++-----------------
 src/gallium/drivers/radeon/r600_pipe_common.c   | 24 ++++++++-------------
 2 files changed, 18 insertions(+), 34 deletions(-)

diff --git a/src/gallium/drivers/radeon/r600_buffer_common.c b/src/gallium/drivers/radeon/r600_buffer_common.c
index 2106b9b..2b4b7bb 100644
--- a/src/gallium/drivers/radeon/r600_buffer_common.c
+++ b/src/gallium/drivers/radeon/r600_buffer_common.c
@@ -210,35 +210,30 @@ bool si_alloc_resource(struct si_screen *sscreen,
 	if (!new_buf) {
 		return false;
 	}
 
 	/* Replace the pointer such that if res->buf wasn't NULL, it won't be
 	 * NULL. This should prevent crashes with multiple contexts using
 	 * the same buffer where one of the contexts invalidates it while
 	 * the others are using it. */
 	old_buf = res->buf;
 	res->buf = new_buf; /* should be atomic */
+	res->gpu_address = sscreen->ws->buffer_get_virtual_address(res->buf);
 
-	if (sscreen->info.has_virtual_memory) {
-		res->gpu_address = sscreen->ws->buffer_get_virtual_address(res->buf);
+	if (res->flags & RADEON_FLAG_32BIT) {
+		uint64_t start = res->gpu_address;
+		uint64_t last = start + res->bo_size - 1;
+		(void)start;
+		(void)last;
 
-		if (res->flags & RADEON_FLAG_32BIT) {
-			uint64_t start = res->gpu_address;
-			uint64_t last = start + res->bo_size - 1;
-			(void)start;
-			(void)last;
-
-			assert((start >> 32) == sscreen->info.address32_hi);
-			assert((last >> 32) == sscreen->info.address32_hi);
-		}
-	} else {
-		res->gpu_address = 0;
+		assert((start >> 32) == sscreen->info.address32_hi);
+		assert((last >> 32) == sscreen->info.address32_hi);
 	}
 
 	pb_reference(&old_buf, NULL);
 
 	util_range_set_empty(&res->valid_buffer_range);
 	res->TC_L2_dirty = false;
 
 	/* Print debug information. */
 	if (sscreen->debug_flags & DBG(VM) && res->b.b.target == PIPE_BUFFER) {
 		fprintf(stderr, "VM start=0x%"PRIX64"  end=0x%"PRIX64" | Buffer %"PRIu64" bytes\n",
@@ -678,26 +673,21 @@ si_buffer_from_user_memory(struct pipe_screen *screen,
 	util_range_add(&rbuffer->valid_buffer_range, 0, templ->width0);
 	util_range_add(&rbuffer->b.valid_buffer_range, 0, templ->width0);
 
 	/* Convert a user pointer to a buffer. */
 	rbuffer->buf = ws->buffer_from_ptr(ws, user_memory, templ->width0);
 	if (!rbuffer->buf) {
 		FREE(rbuffer);
 		return NULL;
 	}
 
-	if (sscreen->info.has_virtual_memory)
-		rbuffer->gpu_address =
-			ws->buffer_get_virtual_address(rbuffer->buf);
-	else
-		rbuffer->gpu_address = 0;
-
+	rbuffer->gpu_address = ws->buffer_get_virtual_address(rbuffer->buf);
 	rbuffer->vram_usage = 0;
 	rbuffer->gart_usage = templ->width0;
 
 	return &rbuffer->b.b;
 }
 
 static struct pipe_resource *si_resource_create(struct pipe_screen *screen,
 						const struct pipe_resource *templ)
 {
 	if (templ->target == PIPE_BUFFER) {
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c
index d46cb64..3496d6e 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -128,23 +128,20 @@ void si_gfx_write_event_eop(struct r600_common_context *ctx,
 }
 
 unsigned si_gfx_write_fence_dwords(struct si_screen *screen)
 {
 	unsigned dwords = 6;
 
 	if (screen->info.chip_class == CIK ||
 	    screen->info.chip_class == VI)
 		dwords *= 2;
 
-	if (!screen->info.has_virtual_memory)
-		dwords += 2;
-
 	return dwords;
 }
 
 void si_gfx_wait_fence(struct r600_common_context *ctx,
 		       uint64_t va, uint32_t ref, uint32_t mask)
 {
 	struct radeon_winsys_cs *cs = ctx->gfx.cs;
 
 	radeon_emit(cs, PKT3(PKT3_WAIT_REG_MEM, 5, 0));
 	radeon_emit(cs, WAIT_REG_MEM_EQUAL | WAIT_REG_MEM_MEM_SPACE(1));
@@ -215,32 +212,29 @@ void si_need_dma_space(struct r600_common_context *ctx, unsigned num_dw,
 	 * prevent read-after-write hazards.
 	 */
 	if ((dst &&
 	     ctx->ws->cs_is_buffer_referenced(ctx->dma.cs, dst->buf,
 					      RADEON_USAGE_READWRITE)) ||
 	    (src &&
 	     ctx->ws->cs_is_buffer_referenced(ctx->dma.cs, src->buf,
 					      RADEON_USAGE_WRITE)))
 		r600_dma_emit_wait_idle(ctx);
 
-	/* If GPUVM is not supported, the CS checker needs 2 entries
-	 * in the buffer list per packet, which has to be done manually.
-	 */
-	if (ctx->screen->info.has_virtual_memory) {
-		if (dst)
-			radeon_add_to_buffer_list(ctx, &ctx->dma, dst,
-						  RADEON_USAGE_WRITE,
-						  RADEON_PRIO_SDMA_BUFFER);
-		if (src)
-			radeon_add_to_buffer_list(ctx, &ctx->dma, src,
-						  RADEON_USAGE_READ,
-						  RADEON_PRIO_SDMA_BUFFER);
+	if (dst) {
+		radeon_add_to_buffer_list(ctx, &ctx->dma, dst,
+					  RADEON_USAGE_WRITE,
+					  RADEON_PRIO_SDMA_BUFFER);
+	}
+	if (src) {
+		radeon_add_to_buffer_list(ctx, &ctx->dma, src,
+					  RADEON_USAGE_READ,
+					  RADEON_PRIO_SDMA_BUFFER);
 	}
 
 	/* this function is called before all DMA calls, so increment this. */
 	ctx->num_dma_calls++;
 }
 
 static void r600_flush_dma_ring(void *ctx, unsigned flags,
 				struct pipe_fence_handle **fence)
 {
 	struct r600_common_context *rctx = (struct r600_common_context *)ctx;
-- 
2.7.4