[Mesa-dev] [PATCH 01/13] nir: allow 64 bit shifts

[Jason Ekstrand]

I do not think this patch does what you think it does.  The old opcode
allowed you to shift any bit size integer by a 32-bit integer.  The new
version allows you to shift N bits by N bits.  In particular, you can't
shift a 16-bit by a 32-bit value.

I'm not sure what the best thing is to do here.  Really, the size of src1
doesn't really matter as 8-bit is enough to do any shifting needed for a
64-bit src0.  You can always compose with a u2u32 to get any src1 bit size
you want.  We picked 32 because it's been the GL default for a long time.

On Wed, Feb 28, 2018 at 11:51 AM, Rob Clark <robdclark at gmail.com> wrote:

> From: Karol Herbst <kherbst at redhat.com>
>
> This is a thing for OpenCL kernels.
>
> Signed-off-by: Rob Clark <robdclark at gmail.com>
> ---
>  src/compiler/nir/nir_opcodes.py | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/src/compiler/nir/nir_opcodes.py b/src/compiler/nir/nir_
> opcodes.py
> index 278562b2bd1..c4d2c7805eb 100644
> --- a/src/compiler/nir/nir_opcodes.py
> +++ b/src/compiler/nir/nir_opcodes.py
> @@ -479,9 +479,9 @@ binop("seq", tfloat32, commutative, "(src0 == src1) ?
> 1.0f : 0.0f") # Set on Equ
>  binop("sne", tfloat32, commutative, "(src0 != src1) ? 1.0f : 0.0f") # Set
> on Not Equal
>
>
> -opcode("ishl", 0, tint, [0, 0], [tint, tuint32], "", "src0 << src1")
> -opcode("ishr", 0, tint, [0, 0], [tint, tuint32], "", "src0 >> src1")
> -opcode("ushr", 0, tuint, [0, 0], [tuint, tuint32], "", "src0 >> src1")
> +opcode("ishl", 0, tint, [0, 0], [tint, tuint], "", "src0 << src1")
> +opcode("ishr", 0, tint, [0, 0], [tint, tuint], "", "src0 >> src1")
> +opcode("ushr", 0, tuint, [0, 0], [tuint, tuint], "", "src0 >> src1")
>
>  # bitwise logic operators
>  #
> --
> 2.14.3
>
>
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