[Mesa-dev] [PATCH 01/13] nir: allow 64 bit shifts

Rob Clark robdclark at gmail.com
Wed Feb 28 19:51:31 UTC 2018


From: Karol Herbst <kherbst at redhat.com>

This is a thing for OpenCL kernels.

Signed-off-by: Rob Clark <robdclark at gmail.com>
---
 src/compiler/nir/nir_opcodes.py | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/compiler/nir/nir_opcodes.py b/src/compiler/nir/nir_opcodes.py
index 278562b2bd1..c4d2c7805eb 100644
--- a/src/compiler/nir/nir_opcodes.py
+++ b/src/compiler/nir/nir_opcodes.py
@@ -479,9 +479,9 @@ binop("seq", tfloat32, commutative, "(src0 == src1) ? 1.0f : 0.0f") # Set on Equ
 binop("sne", tfloat32, commutative, "(src0 != src1) ? 1.0f : 0.0f") # Set on Not Equal
 
 
-opcode("ishl", 0, tint, [0, 0], [tint, tuint32], "", "src0 << src1")
-opcode("ishr", 0, tint, [0, 0], [tint, tuint32], "", "src0 >> src1")
-opcode("ushr", 0, tuint, [0, 0], [tuint, tuint32], "", "src0 >> src1")
+opcode("ishl", 0, tint, [0, 0], [tint, tuint], "", "src0 << src1")
+opcode("ishr", 0, tint, [0, 0], [tint, tuint], "", "src0 >> src1")
+opcode("ushr", 0, tuint, [0, 0], [tuint, tuint], "", "src0 >> src1")
 
 # bitwise logic operators
 #
-- 
2.14.3



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