[Mesa-dev] [PATCH] gallium: remove pipe_blend_state::dither
Marek Olšák
maraeo at gmail.com
Wed Jan 31 19:55:28 UTC 2018
From: Marek Olšák <marek.olsak at amd.com>
very few drivers actually implement it.
---
src/gallium/auxiliary/util/u_dump_state.c | 1 -
src/gallium/auxiliary/vl/vl_compositor.c | 1 -
src/gallium/auxiliary/vl/vl_idct.c | 1 -
src/gallium/auxiliary/vl/vl_mc.c | 1 -
src/gallium/auxiliary/vl/vl_zscan.c | 1 -
src/gallium/docs/source/cso/blend.rst | 10 ----------
src/gallium/drivers/etnaviv/etnaviv_blend.c | 14 +++-----------
src/gallium/drivers/freedreno/a2xx/fd2_blend.c | 3 ---
src/gallium/drivers/freedreno/a3xx/fd3_blend.c | 3 ---
src/gallium/drivers/freedreno/a4xx/fd4_blend.c | 3 ---
src/gallium/drivers/freedreno/a5xx/fd5_blend.c | 3 ---
src/gallium/drivers/i915/i915_state.c | 3 ---
src/gallium/drivers/nouveau/nv30/nv30_state.c | 2 +-
src/gallium/drivers/r300/r300_state.c | 12 ------------
src/gallium/drivers/trace/tr_dump_state.c | 2 --
src/gallium/drivers/virgl/virgl_encode.c | 2 +-
src/gallium/include/pipe/p_state.h | 1 -
src/gallium/state_trackers/nine/nine_pipe.c | 2 --
src/gallium/state_trackers/va/surface.c | 1 -
src/gallium/state_trackers/vdpau/output.c | 1 -
src/mesa/state_tracker/st_atom_blend.c | 2 --
src/mesa/state_tracker/st_cb_clear.c | 3 ---
22 files changed, 5 insertions(+), 67 deletions(-)
diff --git a/src/gallium/auxiliary/util/u_dump_state.c b/src/gallium/auxiliary/util/u_dump_state.c
index b68de13..ddaafef 100644
--- a/src/gallium/auxiliary/util/u_dump_state.c
+++ b/src/gallium/auxiliary/util/u_dump_state.c
@@ -591,21 +591,20 @@ util_dump_blend_state(FILE *stream, const struct pipe_blend_state *state)
{
unsigned valid_entries = 1;
if (!state) {
util_dump_null(stream);
return;
}
util_dump_struct_begin(stream, "pipe_blend_state");
- util_dump_member(stream, bool, state, dither);
util_dump_member(stream, bool, state, alpha_to_coverage);
util_dump_member(stream, bool, state, alpha_to_one);
util_dump_member(stream, bool, state, logicop_enable);
if (state->logicop_enable) {
util_dump_member(stream, enum_func, state, logicop_func);
}
else {
util_dump_member(stream, bool, state, independent_blend_enable);
diff --git a/src/gallium/auxiliary/vl/vl_compositor.c b/src/gallium/auxiliary/vl/vl_compositor.c
index 725bfd9..d264d87 100644
--- a/src/gallium/auxiliary/vl/vl_compositor.c
+++ b/src/gallium/auxiliary/vl/vl_compositor.c
@@ -579,21 +579,20 @@ init_pipe_state(struct vl_compositor *c)
sampler.min_img_filter = PIPE_TEX_FILTER_NEAREST;
sampler.mag_img_filter = PIPE_TEX_FILTER_NEAREST;
c->sampler_nearest = c->pipe->create_sampler_state(c->pipe, &sampler);
memset(&blend, 0, sizeof blend);
blend.independent_blend_enable = 0;
blend.rt[0].blend_enable = 0;
blend.logicop_enable = 0;
blend.logicop_func = PIPE_LOGICOP_CLEAR;
blend.rt[0].colormask = PIPE_MASK_RGBA;
- blend.dither = 0;
c->blend_clear = c->pipe->create_blend_state(c->pipe, &blend);
blend.rt[0].blend_enable = 1;
blend.rt[0].rgb_func = PIPE_BLEND_ADD;
blend.rt[0].rgb_src_factor = PIPE_BLENDFACTOR_SRC_ALPHA;
blend.rt[0].rgb_dst_factor = PIPE_BLENDFACTOR_INV_SRC_ALPHA;
blend.rt[0].alpha_func = PIPE_BLEND_ADD;
blend.rt[0].alpha_src_factor = PIPE_BLENDFACTOR_ONE;
blend.rt[0].alpha_dst_factor = PIPE_BLENDFACTOR_ONE;
c->blend_add = c->pipe->create_blend_state(c->pipe, &blend);
diff --git a/src/gallium/auxiliary/vl/vl_idct.c b/src/gallium/auxiliary/vl/vl_idct.c
index 3e6f581..9995087 100644
--- a/src/gallium/auxiliary/vl/vl_idct.c
+++ b/src/gallium/auxiliary/vl/vl_idct.c
@@ -528,21 +528,20 @@ init_state(struct vl_idct *idct)
blend.rt[0].rgb_func = PIPE_BLEND_ADD;
blend.rt[0].rgb_src_factor = PIPE_BLENDFACTOR_ONE;
blend.rt[0].rgb_dst_factor = PIPE_BLENDFACTOR_ONE;
blend.rt[0].alpha_func = PIPE_BLEND_ADD;
blend.rt[0].alpha_src_factor = PIPE_BLENDFACTOR_ONE;
blend.rt[0].alpha_dst_factor = PIPE_BLENDFACTOR_ONE;
blend.logicop_enable = 0;
blend.logicop_func = PIPE_LOGICOP_CLEAR;
/* Needed to allow color writes to FB, even if blending disabled */
blend.rt[0].colormask = PIPE_MASK_RGBA;
- blend.dither = 0;
idct->blend = idct->pipe->create_blend_state(idct->pipe, &blend);
if (!idct->blend)
goto error_blend;
for (i = 0; i < 2; ++i) {
memset(&sampler, 0, sizeof(sampler));
sampler.wrap_s = PIPE_TEX_WRAP_REPEAT;
sampler.wrap_t = PIPE_TEX_WRAP_REPEAT;
sampler.wrap_r = PIPE_TEX_WRAP_REPEAT;
sampler.min_img_filter = PIPE_TEX_FILTER_NEAREST;
diff --git a/src/gallium/auxiliary/vl/vl_mc.c b/src/gallium/auxiliary/vl/vl_mc.c
index a202fac..944b4fc 100644
--- a/src/gallium/auxiliary/vl/vl_mc.c
+++ b/src/gallium/auxiliary/vl/vl_mc.c
@@ -402,21 +402,20 @@ init_pipe_state(struct vl_mc *r)
blend.rt[0].blend_enable = 1;
blend.rt[0].rgb_func = PIPE_BLEND_ADD;
blend.rt[0].rgb_src_factor = PIPE_BLENDFACTOR_SRC_ALPHA;
blend.rt[0].rgb_dst_factor = PIPE_BLENDFACTOR_ZERO;
blend.rt[0].alpha_func = PIPE_BLEND_ADD;
blend.rt[0].alpha_src_factor = PIPE_BLENDFACTOR_SRC_ALPHA;
blend.rt[0].alpha_dst_factor = PIPE_BLENDFACTOR_ZERO;
blend.logicop_enable = 0;
blend.logicop_func = PIPE_LOGICOP_CLEAR;
blend.rt[0].colormask = i;
- blend.dither = 0;
r->blend_clear[i] = r->pipe->create_blend_state(r->pipe, &blend);
if (!r->blend_clear[i])
goto error_blend;
blend.rt[0].rgb_dst_factor = PIPE_BLENDFACTOR_ONE;
blend.rt[0].alpha_dst_factor = PIPE_BLENDFACTOR_ONE;
r->blend_add[i] = r->pipe->create_blend_state(r->pipe, &blend);
if (!r->blend_add[i])
goto error_blend;
diff --git a/src/gallium/auxiliary/vl/vl_zscan.c b/src/gallium/auxiliary/vl/vl_zscan.c
index 75013c4..f15bf69 100644
--- a/src/gallium/auxiliary/vl/vl_zscan.c
+++ b/src/gallium/auxiliary/vl/vl_zscan.c
@@ -309,21 +309,20 @@ init_state(struct vl_zscan *zscan)
blend.rt[0].rgb_func = PIPE_BLEND_ADD;
blend.rt[0].rgb_src_factor = PIPE_BLENDFACTOR_ONE;
blend.rt[0].rgb_dst_factor = PIPE_BLENDFACTOR_ONE;
blend.rt[0].alpha_func = PIPE_BLEND_ADD;
blend.rt[0].alpha_src_factor = PIPE_BLENDFACTOR_ONE;
blend.rt[0].alpha_dst_factor = PIPE_BLENDFACTOR_ONE;
blend.logicop_enable = 0;
blend.logicop_func = PIPE_LOGICOP_CLEAR;
/* Needed to allow color writes to FB, even if blending disabled */
blend.rt[0].colormask = PIPE_MASK_RGBA;
- blend.dither = 0;
zscan->blend = zscan->pipe->create_blend_state(zscan->pipe, &blend);
if (!zscan->blend)
goto error_blend;
for (i = 0; i < 3; ++i) {
memset(&sampler, 0, sizeof(sampler));
sampler.wrap_s = PIPE_TEX_WRAP_REPEAT;
sampler.wrap_t = PIPE_TEX_WRAP_REPEAT;
sampler.wrap_r = PIPE_TEX_WRAP_CLAMP_TO_EDGE;
sampler.min_img_filter = PIPE_TEX_FILTER_NEAREST;
diff --git a/src/gallium/docs/source/cso/blend.rst b/src/gallium/docs/source/cso/blend.rst
index 7316e5c..d08a297 100644
--- a/src/gallium/docs/source/cso/blend.rst
+++ b/src/gallium/docs/source/cso/blend.rst
@@ -54,30 +54,20 @@ and performing one of the following operations per-channel:
.. note::
The logical operation names and definitions match those of the OpenGL API,
and are similar to the ROP2 and ROP3 definitions of GDI. This is
intentional, to ease transitions to Gallium.
Members
-------
These members affect all render targets.
-dither
-%%%%%%
-
-Whether dithering is enabled.
-
-.. note::
- Dithering is completely implementation-dependent. It may be ignored by
- drivers for any reason, and some render targets may always or never be
- dithered depending on their format or usage flags.
-
logicop_enable
%%%%%%%%%%%%%%
Whether the blender should perform a logicop instead of blending.
logicop_func
%%%%%%%%%%%%
The logicop to use. One of ``PIPE_LOGICOP``.
diff --git a/src/gallium/drivers/etnaviv/etnaviv_blend.c b/src/gallium/drivers/etnaviv/etnaviv_blend.c
index 9c23411..13ff17e 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_blend.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_blend.c
@@ -85,31 +85,23 @@ etna_blend_state_create(struct pipe_context *pctx,
VIV_FEATURE(ctx->screen, chipMinorFeatures2, LOGIC_OP);
co->PE_LOGIC_OP =
VIVS_PE_LOGIC_OP_OP(logicop_enable ? so->logicop_func : LOGIC_OP_COPY) |
0x000E4000 /* ??? */;
co->fo_allowed = !alpha_enable && !logicop_enable;
/* independent_blend_enable not needed: only one rt supported */
/* XXX alpha_to_coverage / alpha_to_one? */
- /* Set dither registers based on dither status. These registers set the
- * dither pattern,
- * for now, set the same values as the blob.
- */
- if (so->dither) {
- co->PE_DITHER[0] = 0x6e4ca280;
- co->PE_DITHER[1] = 0x5d7f91b3;
- } else {
- co->PE_DITHER[0] = 0xffffffff;
- co->PE_DITHER[1] = 0xffffffff;
- }
+
+ co->PE_DITHER[0] = 0xffffffff;
+ co->PE_DITHER[1] = 0xffffffff;
return co;
}
bool
etna_update_blend(struct etna_context *ctx)
{
struct pipe_framebuffer_state *pfb = &ctx->framebuffer_s;
struct pipe_blend_state *pblend = ctx->blend;
struct etna_blend_state *blend = etna_blend_state(pblend);
diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_blend.c b/src/gallium/drivers/freedreno/a2xx/fd2_blend.c
index 4e99179..d17357f 100644
--- a/src/gallium/drivers/freedreno/a2xx/fd2_blend.c
+++ b/src/gallium/drivers/freedreno/a2xx/fd2_blend.c
@@ -100,15 +100,12 @@ fd2_blend_state_create(struct pipe_context *pctx,
if (rt->colormask & PIPE_MASK_G)
so->rb_colormask |= A2XX_RB_COLOR_MASK_WRITE_GREEN;
if (rt->colormask & PIPE_MASK_B)
so->rb_colormask |= A2XX_RB_COLOR_MASK_WRITE_BLUE;
if (rt->colormask & PIPE_MASK_A)
so->rb_colormask |= A2XX_RB_COLOR_MASK_WRITE_ALPHA;
if (!rt->blend_enable)
so->rb_colorcontrol |= A2XX_RB_COLORCONTROL_BLEND_DISABLE;
- if (cso->dither)
- so->rb_colorcontrol |= A2XX_RB_COLORCONTROL_DITHER_MODE(DITHER_ALWAYS);
-
return so;
}
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_blend.c b/src/gallium/drivers/freedreno/a3xx/fd3_blend.c
index 35360f3..1e48139 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_blend.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_blend.c
@@ -120,20 +120,17 @@ fd3_blend_state_create(struct pipe_context *pctx,
A3XX_RB_MRT_CONTROL_COMPONENT_ENABLE(rt->colormask);
if (rt->blend_enable)
so->rb_mrt[i].control |=
A3XX_RB_MRT_CONTROL_READ_DEST_ENABLE |
A3XX_RB_MRT_CONTROL_BLEND |
A3XX_RB_MRT_CONTROL_BLEND2;
if (reads_dest)
so->rb_mrt[i].control |= A3XX_RB_MRT_CONTROL_READ_DEST_ENABLE;
-
- if (cso->dither)
- so->rb_mrt[i].control |= A3XX_RB_MRT_CONTROL_DITHER_MODE(DITHER_ALWAYS);
}
if (cso->rt[0].blend_enable && util_blend_state_is_dual(cso, 0))
so->rb_render_control = A3XX_RB_RENDER_CONTROL_DUAL_COLOR_IN_ENABLE;
return so;
}
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_blend.c b/src/gallium/drivers/freedreno/a4xx/fd4_blend.c
index e262e05..fa9621e 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_blend.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_blend.c
@@ -125,20 +125,17 @@ fd4_blend_state_create(struct pipe_context *pctx,
A4XX_RB_MRT_CONTROL_READ_DEST_ENABLE |
A4XX_RB_MRT_CONTROL_BLEND |
A4XX_RB_MRT_CONTROL_BLEND2;
mrt_blend |= (1 << i);
}
if (reads_dest) {
so->rb_mrt[i].control |= A4XX_RB_MRT_CONTROL_READ_DEST_ENABLE;
mrt_blend |= (1 << i);
}
-
- if (cso->dither)
- so->rb_mrt[i].buf_info |= A4XX_RB_MRT_BUF_INFO_DITHER_MODE(DITHER_ALWAYS);
}
so->rb_fs_output = A4XX_RB_FS_OUTPUT_ENABLE_BLEND(mrt_blend) |
COND(cso->independent_blend_enable, A4XX_RB_FS_OUTPUT_INDEPENDENT_BLEND);
return so;
}
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_blend.c b/src/gallium/drivers/freedreno/a5xx/fd5_blend.c
index 98b6d44..eda6318 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_blend.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_blend.c
@@ -127,22 +127,19 @@ fd5_blend_state_create(struct pipe_context *pctx,
A5XX_RB_MRT_CONTROL_BLEND |
A5XX_RB_MRT_CONTROL_BLEND2;
mrt_blend |= (1 << i);
so->lrz_write = false;
}
if (reads_dest) {
// so->rb_mrt[i].control |= A5XX_RB_MRT_CONTROL_READ_DEST_ENABLE;
mrt_blend |= (1 << i);
}
-
-// if (cso->dither)
-// so->rb_mrt[i].buf_info |= A5XX_RB_MRT_BUF_INFO_DITHER_MODE(DITHER_ALWAYS);
}
so->rb_blend_cntl = A5XX_RB_BLEND_CNTL_ENABLE_BLEND(mrt_blend) |
COND(cso->independent_blend_enable, A5XX_RB_BLEND_CNTL_INDEPENDENT_BLEND);
so->sp_blend_cntl = A5XX_SP_BLEND_CNTL_UNK8 |
COND(mrt_blend, A5XX_SP_BLEND_CNTL_ENABLED);
return so;
}
diff --git a/src/gallium/drivers/i915/i915_state.c b/src/gallium/drivers/i915/i915_state.c
index ddc2709..d837850 100644
--- a/src/gallium/drivers/i915/i915_state.c
+++ b/src/gallium/drivers/i915/i915_state.c
@@ -137,23 +137,20 @@ i915_create_blend_state(struct pipe_context *pipe,
}
}
cso_data->modes4 |= (_3DSTATE_MODES_4_CMD |
ENABLE_LOGIC_OP_FUNC |
LOGIC_OP_FUNC(i915_translate_logic_op(blend->logicop_func)));
if (blend->logicop_enable)
cso_data->LIS5 |= S5_LOGICOP_ENABLE;
- if (blend->dither)
- cso_data->LIS5 |= S5_COLOR_DITHER_ENABLE;
-
/* We potentially do some fixup at emission for non-BGRA targets */
if ((blend->rt[0].colormask & PIPE_MASK_R) == 0)
cso_data->LIS5 |= S5_WRITEDISABLE_RED;
if ((blend->rt[0].colormask & PIPE_MASK_G) == 0)
cso_data->LIS5 |= S5_WRITEDISABLE_GREEN;
if ((blend->rt[0].colormask & PIPE_MASK_B) == 0)
cso_data->LIS5 |= S5_WRITEDISABLE_BLUE;
diff --git a/src/gallium/drivers/nouveau/nv30/nv30_state.c b/src/gallium/drivers/nouveau/nv30/nv30_state.c
index 2a81225..3b86e07 100644
--- a/src/gallium/drivers/nouveau/nv30/nv30_state.c
+++ b/src/gallium/drivers/nouveau/nv30/nv30_state.c
@@ -52,21 +52,21 @@ nv30_blend_state_create(struct pipe_context *pipe,
if (cso->logicop_enable) {
SB_MTHD30(so, COLOR_LOGIC_OP_ENABLE, 2);
SB_DATA (so, 1);
SB_DATA (so, nvgl_logicop_func(cso->logicop_func));
} else {
SB_MTHD30(so, COLOR_LOGIC_OP_ENABLE, 1);
SB_DATA (so, 0);
}
SB_MTHD30(so, DITHER_ENABLE, 1);
- SB_DATA (so, cso->dither);
+ SB_DATA (so, 0);
blend[0] = cso->rt[0].blend_enable;
cmask[0] = !!(cso->rt[0].colormask & PIPE_MASK_A) << 24 |
!!(cso->rt[0].colormask & PIPE_MASK_R) << 16 |
!!(cso->rt[0].colormask & PIPE_MASK_G) << 8 |
!!(cso->rt[0].colormask & PIPE_MASK_B);
if (cso->independent_blend_enable) {
blend[1] = 0;
cmask[1] = 0;
for (i = 1; i < 4; i++) {
diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c
index 437df48..ace8940 100644
--- a/src/gallium/drivers/r300/r300_state.c
+++ b/src/gallium/drivers/r300/r300_state.c
@@ -448,32 +448,20 @@ static void* r300_create_blend_state(struct pipe_context* pipe,
alpha_blend_control_noalpha_noclamp |= r300_translate_blend_function(eqA, FALSE);
}
}
/* PIPE_LOGICOP_* don't need to be translated, fortunately. */
if (state->logicop_enable) {
rop = R300_RB3D_ROPCNTL_ROP_ENABLE |
(state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT;
}
- /* Neither fglrx nor classic r300 ever set this, regardless of dithering
- * state. Since it's an optional implementation detail, we can leave it
- * out and never dither.
- *
- * This could be revisited if we ever get quality or conformance hints.
- *
- if (state->dither) {
- dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT |
- R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT;
- }
- */
-
/* Build a command buffer. */
{
unsigned (*func[COLORMASK_NUM_SWIZZLES])(unsigned) = {
bgra_cmask,
rgba_cmask,
rrrr_cmask,
aaaa_cmask,
grrg_cmask,
arra_cmask,
bgra_cmask,
diff --git a/src/gallium/drivers/trace/tr_dump_state.c b/src/gallium/drivers/trace/tr_dump_state.c
index e7e3223..81e727f 100644
--- a/src/gallium/drivers/trace/tr_dump_state.c
+++ b/src/gallium/drivers/trace/tr_dump_state.c
@@ -414,22 +414,20 @@ void trace_dump_blend_state(const struct pipe_blend_state *state)
if (!trace_dumping_enabled_locked())
return;
if (!state) {
trace_dump_null();
return;
}
trace_dump_struct_begin("pipe_blend_state");
- trace_dump_member(bool, state, dither);
-
trace_dump_member(bool, state, logicop_enable);
trace_dump_member(uint, state, logicop_func);
trace_dump_member(bool, state, independent_blend_enable);
trace_dump_member_begin("rt");
if (state->independent_blend_enable)
valid_entries = PIPE_MAX_COLOR_BUFS;
trace_dump_struct_array(rt_blend_state, state->rt, valid_entries);
trace_dump_member_end();
diff --git a/src/gallium/drivers/virgl/virgl_encode.c b/src/gallium/drivers/virgl/virgl_encode.c
index ee68fe0..e459536 100644
--- a/src/gallium/drivers/virgl/virgl_encode.c
+++ b/src/gallium/drivers/virgl/virgl_encode.c
@@ -83,21 +83,21 @@ int virgl_encode_blend_state(struct virgl_context *ctx,
{
uint32_t tmp;
int i;
virgl_encoder_write_cmd_dword(ctx, VIRGL_CMD0(VIRGL_CCMD_CREATE_OBJECT, VIRGL_OBJECT_BLEND, VIRGL_OBJ_BLEND_SIZE));
virgl_encoder_write_dword(ctx->cbuf, handle);
tmp =
VIRGL_OBJ_BLEND_S0_INDEPENDENT_BLEND_ENABLE(blend_state->independent_blend_enable) |
VIRGL_OBJ_BLEND_S0_LOGICOP_ENABLE(blend_state->logicop_enable) |
- VIRGL_OBJ_BLEND_S0_DITHER(blend_state->dither) |
+ VIRGL_OBJ_BLEND_S0_DITHER(0) |
VIRGL_OBJ_BLEND_S0_ALPHA_TO_COVERAGE(blend_state->alpha_to_coverage) |
VIRGL_OBJ_BLEND_S0_ALPHA_TO_ONE(blend_state->alpha_to_one);
virgl_encoder_write_dword(ctx->cbuf, tmp);
tmp = VIRGL_OBJ_BLEND_S1_LOGICOP_FUNC(blend_state->logicop_func);
virgl_encoder_write_dword(ctx->cbuf, tmp);
for (i = 0; i < VIRGL_MAX_COLOR_BUFS; i++) {
tmp =
diff --git a/src/gallium/include/pipe/p_state.h b/src/gallium/include/pipe/p_state.h
index 10d21db..6bfd661 100644
--- a/src/gallium/include/pipe/p_state.h
+++ b/src/gallium/include/pipe/p_state.h
@@ -336,21 +336,20 @@ struct pipe_rt_blend_state
unsigned colormask:4; /**< bitmask of PIPE_MASK_R/G/B/A */
};
struct pipe_blend_state
{
unsigned independent_blend_enable:1;
unsigned logicop_enable:1;
unsigned logicop_func:4; /**< PIPE_LOGICOP_x */
- unsigned dither:1;
unsigned alpha_to_coverage:1;
unsigned alpha_to_one:1;
struct pipe_rt_blend_state rt[PIPE_MAX_COLOR_BUFS];
};
struct pipe_blend_color
{
float color[4];
};
diff --git a/src/gallium/state_trackers/nine/nine_pipe.c b/src/gallium/state_trackers/nine/nine_pipe.c
index a28b4c6..a98ba10 100644
--- a/src/gallium/state_trackers/nine/nine_pipe.c
+++ b/src/gallium/state_trackers/nine/nine_pipe.c
@@ -152,22 +152,20 @@ nine_convert_blend_state_fixup(struct pipe_blend_state *blend, const DWORD *rs)
}
}
void
nine_convert_blend_state(struct pipe_blend_state *blend_state, const DWORD *rs)
{
struct pipe_blend_state blend;
memset(&blend, 0, sizeof(blend)); /* memcmp safety */
- blend.dither = !!rs[D3DRS_DITHERENABLE];
-
/* blend.alpha_to_one = 0; */
blend.alpha_to_coverage = rs[NINED3DRS_ALPHACOVERAGE] & 1;
blend.rt[0].blend_enable = !!rs[D3DRS_ALPHABLENDENABLE];
if (blend.rt[0].blend_enable) {
blend.rt[0].rgb_func = d3dblendop_to_pipe_blend(rs[D3DRS_BLENDOP]);
blend.rt[0].rgb_src_factor = d3dblend_color_to_pipe_blendfactor(rs[D3DRS_SRCBLEND]);
blend.rt[0].rgb_dst_factor = d3dblend_color_to_pipe_blendfactor(rs[D3DRS_DESTBLEND]);
if (rs[D3DRS_SEPARATEALPHABLENDENABLE]) {
blend.rt[0].alpha_func = d3dblendop_to_pipe_blend(rs[D3DRS_BLENDOPALPHA]);
diff --git a/src/gallium/state_trackers/va/surface.c b/src/gallium/state_trackers/va/surface.c
index 636505b..8ac4b5e 100644
--- a/src/gallium/state_trackers/va/surface.c
+++ b/src/gallium/state_trackers/va/surface.c
@@ -243,21 +243,20 @@ vlVaPutSubpictures(vlVaSurface *surf, vlVaDriver *drv,
blend.rt[0].blend_enable = 1;
blend.rt[0].rgb_src_factor = PIPE_BLENDFACTOR_SRC_ALPHA;
blend.rt[0].rgb_dst_factor = PIPE_BLENDFACTOR_INV_SRC_ALPHA;
blend.rt[0].alpha_src_factor = PIPE_BLENDFACTOR_ZERO;
blend.rt[0].alpha_dst_factor = PIPE_BLENDFACTOR_ZERO;
blend.rt[0].rgb_func = PIPE_BLEND_ADD;
blend.rt[0].alpha_func = PIPE_BLEND_ADD;
blend.rt[0].colormask = PIPE_MASK_RGBA;
blend.logicop_enable = 0;
blend.logicop_func = PIPE_LOGICOP_CLEAR;
- blend.dither = 0;
blend_state = drv->pipe->create_blend_state(drv->pipe, &blend);
vl_compositor_clear_layers(&drv->cstate);
vl_compositor_set_layer_blend(&drv->cstate, 0, blend_state, false);
upload_sampler(drv->pipe, sub->sampler, &box, buf->data,
sub->image->pitches[0], 0, 0);
vl_compositor_set_rgba_layer(&drv->cstate, &drv->compositor, 0, sub->sampler,
&sr, NULL, NULL);
vl_compositor_set_layer_dst_area(&drv->cstate, 0, &dr);
vl_compositor_render(&drv->cstate, &drv->compositor, surf_draw, dirty_area, false);
diff --git a/src/gallium/state_trackers/vdpau/output.c b/src/gallium/state_trackers/vdpau/output.c
index 8ef8268..c2208b4 100644
--- a/src/gallium/state_trackers/vdpau/output.c
+++ b/src/gallium/state_trackers/vdpau/output.c
@@ -602,21 +602,20 @@ BlenderToPipe(struct pipe_context *context,
blend.rt[0].alpha_dst_factor = BlendFactorToPipe(blend_state->blend_factor_destination_alpha);
blend.rt[0].rgb_func = BlendEquationToPipe(blend_state->blend_equation_color);
blend.rt[0].alpha_func = BlendEquationToPipe(blend_state->blend_equation_alpha);
} else {
blend.rt[0].blend_enable = 0;
}
blend.logicop_enable = 0;
blend.logicop_func = PIPE_LOGICOP_CLEAR;
blend.rt[0].colormask = PIPE_MASK_RGBA;
- blend.dither = 0;
return context->create_blend_state(context, &blend);
}
static struct vertex4f *
ColorsToPipe(VdpColor const *colors, uint32_t flags, struct vertex4f result[4])
{
unsigned i;
struct vertex4f *dst = result;
diff --git a/src/mesa/state_tracker/st_atom_blend.c b/src/mesa/state_tracker/st_atom_blend.c
index cc2c288..429d4b1 100644
--- a/src/mesa/state_tracker/st_atom_blend.c
+++ b/src/mesa/state_tracker/st_atom_blend.c
@@ -205,22 +205,20 @@ st_update_blend( struct st_context *st )
translate_blend(ctx->Color.Blend[i].SrcA);
blend->rt[i].alpha_dst_factor =
translate_blend(ctx->Color.Blend[i].DstA);
}
}
}
else {
/* no blending / logicop */
}
- blend->dither = ctx->Color.DitherFlag;
-
if (_mesa_is_multisample_enabled(ctx) &&
!(ctx->DrawBuffer->_IntegerBuffers & 0x1)) {
/* Unlike in gallium/d3d10 these operations are only performed
* if both msaa is enabled and we have a multisample buffer.
*/
blend->alpha_to_coverage = ctx->Multisample.SampleAlphaToCoverage;
blend->alpha_to_one = ctx->Multisample.SampleAlphaToOne;
}
cso_set_blend(st->cso_context, blend);
diff --git a/src/mesa/state_tracker/st_cb_clear.c b/src/mesa/state_tracker/st_cb_clear.c
index 6867718..54e665a 100644
--- a/src/mesa/state_tracker/st_cb_clear.c
+++ b/src/mesa/state_tracker/st_cb_clear.c
@@ -221,23 +221,20 @@ clear_with_quad(struct gl_context *ctx, unsigned clear_buffers)
int i;
blend.independent_blend_enable = num_buffers > 1;
for (i = 0; i < num_buffers; i++) {
if (!(clear_buffers & (PIPE_CLEAR_COLOR0 << i)))
continue;
blend.rt[i].colormask = GET_COLORMASK(ctx->Color.ColorMask, i);
}
-
- if (ctx->Color.DitherFlag)
- blend.dither = 1;
}
cso_set_blend(cso, &blend);
}
/* depth_stencil state: always pass/set to ref value */
{
struct pipe_depth_stencil_alpha_state depth_stencil;
memset(&depth_stencil, 0, sizeof(depth_stencil));
if (clear_buffers & PIPE_CLEAR_DEPTH) {
depth_stencil.depth.enabled = 1;
--
2.7.4
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