[Mesa-dev] [PATCH v2 02/22] i965/fs: Implement float64/int64 to float16 conversion

[Samuel Iglesias Gonsálvez]

It is not supported directly in the HW, we need to convert to a 32-bit
type first as intermediate step.

v2 (Iago): handle conversions from 64-bit integers as well

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias at igalia.com>
---

Added missing (u)int64 -> fp16 conversion and fixed issues with the
fallthroughs.

 src/intel/compiler/brw_fs_nir.cpp | 47 ++++++++++++++++++++++++++++---
 1 file changed, 43 insertions(+), 4 deletions(-)

diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp
index 3f13dafaac4..26312ce82e3 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++ b/src/intel/compiler/brw_fs_nir.cpp
@@ -755,6 +755,19 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr)
        */
 
    case nir_op_f2f16_undef:
+      /* BDW PRM, vol02, Command Reference Instructions, mov - MOVE:
+       *
+       *   "There is no direct conversion from HF to DF or DF to HF.
+       *    Use two instructions and F (Float) as an intermediate type.
+       */
+      if (nir_src_bit_size(instr->src[0].src) == 64) {
+         fs_reg tmp = bld.vgrf(BRW_REGISTER_TYPE_F, 1);
+         inst = bld.MOV(tmp, op[0]);
+         inst->saturate = instr->dest.saturate;
+         inst = bld.MOV(result, tmp);
+         inst->saturate = instr->dest.saturate;
+         break;
+      }
       inst = bld.MOV(result, op[0]);
       inst->saturate = instr->dest.saturate;
       break;
@@ -793,7 +806,10 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr)
          inst->saturate = instr->dest.saturate;
          break;
       }
-      /* fallthrough */
+      inst = bld.MOV(result, op[0]);
+      inst->saturate = instr->dest.saturate;
+      break;
+
    case nir_op_i2f64:
    case nir_op_i2i64:
    case nir_op_u2f64:
@@ -821,7 +837,32 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr)
          inst->saturate = instr->dest.saturate;
          break;
       }
-      /* fallthrough */
+      inst = bld.MOV(result, op[0]);
+      inst->saturate = instr->dest.saturate;
+      break;
+
+   case nir_op_i2f16:
+   case nir_op_u2f16:
+      /* BDW PRM, vol02, Command Reference Instructions, mov - MOVE:
+       *
+       *    "There is no direct conversion from HF to Q/UQ or Q/UQ to HF.
+       *     Use two instructions and F (Float) or a word integer type or a
+       *     DWord integer type as an intermediate type."
+       */
+      if (nir_src_bit_size(instr->src[0].src) == 64) {
+         brw_reg_type reg_type = instr->op == nir_op_i2f16 ?
+            BRW_REGISTER_TYPE_D : BRW_REGISTER_TYPE_UD;
+         fs_reg tmp = bld.vgrf(reg_type, 1);
+         inst = bld.MOV(tmp, op[0]);
+         inst->saturate = instr->dest.saturate;
+         inst = bld.MOV(result, tmp);
+         inst->saturate = instr->dest.saturate;
+         break;
+      }
+      inst = bld.MOV(result, op[0]);
+      inst->saturate = instr->dest.saturate;
+      break;
+
    case nir_op_f2f32:
    case nir_op_f2i32:
    case nir_op_f2u32:
@@ -831,8 +872,6 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr)
    case nir_op_u2u32:
    case nir_op_i2i16:
    case nir_op_u2u16:
-   case nir_op_i2f16:
-   case nir_op_u2f16:
       inst = bld.MOV(result, op[0]);
       inst->saturate = instr->dest.saturate;
       break;
-- 
2.17.1